imx_ccm_composite.c revision 1.1 1 1.1 skrll /* $NetBSD: imx_ccm_composite.c,v 1.1 2020/12/23 14:42:38 skrll Exp $ */
2 1.1 skrll
3 1.1 skrll /*-
4 1.1 skrll * Copyright (c) 2020 Jared McNeill <jmcneill (at) invisible.ca>
5 1.1 skrll * All rights reserved.
6 1.1 skrll *
7 1.1 skrll * Redistribution and use in source and binary forms, with or without
8 1.1 skrll * modification, are permitted provided that the following conditions
9 1.1 skrll * are met:
10 1.1 skrll * 1. Redistributions of source code must retain the above copyright
11 1.1 skrll * notice, this list of conditions and the following disclaimer.
12 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 skrll * notice, this list of conditions and the following disclaimer in the
14 1.1 skrll * documentation and/or other materials provided with the distribution.
15 1.1 skrll *
16 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 skrll * SUCH DAMAGE.
27 1.1 skrll */
28 1.1 skrll
29 1.1 skrll #include <sys/cdefs.h>
30 1.1 skrll __KERNEL_RCSID(0, "$NetBSD: imx_ccm_composite.c,v 1.1 2020/12/23 14:42:38 skrll Exp $");
31 1.1 skrll
32 1.1 skrll #include <sys/param.h>
33 1.1 skrll #include <sys/bus.h>
34 1.1 skrll
35 1.1 skrll #include <dev/clk/clk_backend.h>
36 1.1 skrll
37 1.1 skrll #include <arm/nxp/imx_ccm.h>
38 1.1 skrll
39 1.1 skrll #include <dev/fdt/fdtvar.h>
40 1.1 skrll
41 1.1 skrll #define CCM_TARGET_ROOT 0x00
42 1.1 skrll #define TARGET_ROOT_ENABLE __BIT(28)
43 1.1 skrll #define TARGET_ROOT_MUX __BITS(26,24)
44 1.1 skrll #define TARGET_ROOT_PRE_PODF __BITS(18,16)
45 1.1 skrll #define TARGET_ROOT_POST_PODF __BITS(5,0)
46 1.1 skrll
47 1.1 skrll int
48 1.1 skrll imx_ccm_composite_enable(struct imx_ccm_softc *sc, struct imx_ccm_clk *clk,
49 1.1 skrll int enable)
50 1.1 skrll {
51 1.1 skrll struct imx_ccm_composite *composite = &clk->u.composite;
52 1.1 skrll uint32_t val;
53 1.1 skrll
54 1.1 skrll KASSERT(clk->type == IMX_CCM_COMPOSITE);
55 1.1 skrll
56 1.1 skrll val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
57 1.1 skrll if (enable)
58 1.1 skrll val |= TARGET_ROOT_ENABLE;
59 1.1 skrll else
60 1.1 skrll val &= ~TARGET_ROOT_ENABLE;
61 1.1 skrll CCM_WRITE(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT, val);
62 1.1 skrll
63 1.1 skrll return 0;
64 1.1 skrll }
65 1.1 skrll
66 1.1 skrll u_int
67 1.1 skrll imx_ccm_composite_get_rate(struct imx_ccm_softc *sc,
68 1.1 skrll struct imx_ccm_clk *clk)
69 1.1 skrll {
70 1.1 skrll struct imx_ccm_composite *composite = &clk->u.composite;
71 1.1 skrll struct clk *clkp, *clkp_parent;
72 1.1 skrll
73 1.1 skrll KASSERT(clk->type == IMX_CCM_COMPOSITE);
74 1.1 skrll
75 1.1 skrll clkp = &clk->base;
76 1.1 skrll clkp_parent = clk_get_parent(clkp);
77 1.1 skrll if (clkp_parent == NULL)
78 1.1 skrll return 0;
79 1.1 skrll
80 1.1 skrll const u_int prate = clk_get_rate(clkp_parent);
81 1.1 skrll if (prate == 0)
82 1.1 skrll return 0;
83 1.1 skrll
84 1.1 skrll const uint32_t val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
85 1.1 skrll const u_int pre_div = __SHIFTOUT(val, TARGET_ROOT_PRE_PODF) + 1;
86 1.1 skrll const u_int post_div = __SHIFTOUT(val, TARGET_ROOT_POST_PODF) + 1;
87 1.1 skrll
88 1.1 skrll return prate / pre_div / post_div;
89 1.1 skrll }
90 1.1 skrll
91 1.1 skrll int
92 1.1 skrll imx_ccm_composite_set_rate(struct imx_ccm_softc *sc,
93 1.1 skrll struct imx_ccm_clk *clk, u_int rate)
94 1.1 skrll {
95 1.1 skrll struct imx_ccm_composite *composite = &clk->u.composite;
96 1.1 skrll u_int best_prediv, best_postdiv, best_diff;
97 1.1 skrll struct imx_ccm_clk *rclk_parent;
98 1.1 skrll struct clk *clk_parent;
99 1.1 skrll uint32_t val;
100 1.1 skrll
101 1.1 skrll KASSERT(clk->type == IMX_CCM_COMPOSITE);
102 1.1 skrll
103 1.1 skrll if (composite->flags & IMX_COMPOSITE_SET_RATE_PARENT) {
104 1.1 skrll clk_parent = clk_get_parent(&clk->base);
105 1.1 skrll if (clk_parent == NULL)
106 1.1 skrll return ENXIO;
107 1.1 skrll return clk_set_rate(clk_parent, rate);
108 1.1 skrll }
109 1.1 skrll
110 1.1 skrll best_prediv = 0;
111 1.1 skrll best_postdiv = 0;
112 1.1 skrll best_diff = INT_MAX;
113 1.1 skrll
114 1.1 skrll val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
115 1.1 skrll const u_int mux = __SHIFTOUT(val, TARGET_ROOT_MUX);
116 1.1 skrll
117 1.1 skrll if (mux >= composite->nparents)
118 1.1 skrll return EIO;
119 1.1 skrll
120 1.1 skrll rclk_parent = imx_ccm_clock_find(sc, composite->parents[mux]);
121 1.1 skrll if (rclk_parent != NULL)
122 1.1 skrll clk_parent = &rclk_parent->base;
123 1.1 skrll else
124 1.1 skrll clk_parent = fdtbus_clock_byname(composite->parents[mux]);
125 1.1 skrll if (clk_parent == NULL)
126 1.1 skrll return EIO;
127 1.1 skrll
128 1.1 skrll const u_int prate = clk_get_rate(clk_parent);
129 1.1 skrll if (prate == 0)
130 1.1 skrll return ERANGE;
131 1.1 skrll
132 1.1 skrll for (u_int prediv = 1; prediv <= __SHIFTOUT_MASK(TARGET_ROOT_PRE_PODF) + 1; prediv++) {
133 1.1 skrll for (u_int postdiv = 1; postdiv <= __SHIFTOUT_MASK(TARGET_ROOT_POST_PODF) + 1; postdiv++) {
134 1.1 skrll const u_int cur_rate = prate / prediv / postdiv;
135 1.1 skrll const int diff = (int)rate - (int)cur_rate;
136 1.1 skrll if (composite->flags & IMX_COMPOSITE_ROUND_DOWN) {
137 1.1 skrll if (diff >= 0 && diff < best_diff) {
138 1.1 skrll best_diff = diff;
139 1.1 skrll best_prediv = prediv;
140 1.1 skrll best_postdiv = postdiv;
141 1.1 skrll }
142 1.1 skrll } else {
143 1.1 skrll if (abs(diff) < best_diff) {
144 1.1 skrll best_diff = abs(diff);
145 1.1 skrll best_prediv = prediv;
146 1.1 skrll best_postdiv = postdiv;
147 1.1 skrll }
148 1.1 skrll }
149 1.1 skrll }
150 1.1 skrll }
151 1.1 skrll if (best_diff == INT_MAX)
152 1.1 skrll return ERANGE;
153 1.1 skrll
154 1.1 skrll val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
155 1.1 skrll val &= ~TARGET_ROOT_PRE_PODF;
156 1.1 skrll val |= __SHIFTIN(best_prediv - 1, TARGET_ROOT_PRE_PODF);
157 1.1 skrll val &= ~TARGET_ROOT_POST_PODF;
158 1.1 skrll val |= __SHIFTIN(best_postdiv - 1, TARGET_ROOT_POST_PODF);
159 1.1 skrll CCM_WRITE(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT, val);
160 1.1 skrll
161 1.1 skrll return 0;
162 1.1 skrll }
163 1.1 skrll
164 1.1 skrll const char *
165 1.1 skrll imx_ccm_composite_get_parent(struct imx_ccm_softc *sc,
166 1.1 skrll struct imx_ccm_clk *clk)
167 1.1 skrll {
168 1.1 skrll struct imx_ccm_composite *composite = &clk->u.composite;
169 1.1 skrll
170 1.1 skrll KASSERT(clk->type == IMX_CCM_COMPOSITE);
171 1.1 skrll
172 1.1 skrll const uint32_t val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
173 1.1 skrll const u_int mux = __SHIFTOUT(val, TARGET_ROOT_MUX);
174 1.1 skrll
175 1.1 skrll if (mux >= composite->nparents)
176 1.1 skrll return NULL;
177 1.1 skrll
178 1.1 skrll return composite->parents[mux];
179 1.1 skrll }
180 1.1 skrll
181 1.1 skrll int
182 1.1 skrll imx_ccm_composite_set_parent(struct imx_ccm_softc *sc,
183 1.1 skrll struct imx_ccm_clk *clk, const char *parent)
184 1.1 skrll {
185 1.1 skrll struct imx_ccm_composite *composite = &clk->u.composite;
186 1.1 skrll uint32_t val;
187 1.1 skrll
188 1.1 skrll KASSERT(clk->type == IMX_CCM_COMPOSITE);
189 1.1 skrll
190 1.1 skrll for (u_int mux = 0; mux < composite->nparents; mux++) {
191 1.1 skrll if (strcmp(composite->parents[mux], parent) == 0) {
192 1.1 skrll val = CCM_READ(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT);
193 1.1 skrll val &= ~TARGET_ROOT_MUX;
194 1.1 skrll val |= __SHIFTIN(mux, TARGET_ROOT_MUX);
195 1.1 skrll CCM_WRITE(sc, clk->regidx, composite->reg + CCM_TARGET_ROOT, val);
196 1.1 skrll return 0;
197 1.1 skrll }
198 1.1 skrll }
199 1.1 skrll
200 1.1 skrll return EINVAL;
201 1.1 skrll }
202