1 1.8 bouyer /* $NetBSD: imx_sdhc.c,v 1.8 2023/05/04 13:29:33 bouyer Exp $ */ 2 1.1 skrll 3 1.1 skrll /*- 4 1.1 skrll * Copyright (c) 2019 Genetec Corporation. All rights reserved. 5 1.1 skrll * Written by Hashimoto Kenichi for Genetec Corporation. 6 1.1 skrll * 7 1.1 skrll * Redistribution and use in source and binary forms, with or without 8 1.1 skrll * modification, are permitted provided that the following conditions 9 1.1 skrll * are met: 10 1.1 skrll * 1. Redistributions of source code must retain the above copyright 11 1.1 skrll * notice, this list of conditions and the following disclaimer. 12 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 skrll * notice, this list of conditions and the following disclaimer in the 14 1.1 skrll * documentation and/or other materials provided with the distribution. 15 1.1 skrll * 16 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.1 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.1 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.1 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.1 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 skrll * SUCH DAMAGE. 27 1.1 skrll */ 28 1.1 skrll 29 1.1 skrll #include <sys/cdefs.h> 30 1.8 bouyer __KERNEL_RCSID(0, "$NetBSD: imx_sdhc.c,v 1.8 2023/05/04 13:29:33 bouyer Exp $"); 31 1.1 skrll 32 1.1 skrll #include "opt_fdt.h" 33 1.1 skrll 34 1.1 skrll #include <sys/param.h> 35 1.1 skrll #include <sys/bus.h> 36 1.1 skrll #include <sys/device.h> 37 1.1 skrll #include <sys/intr.h> 38 1.1 skrll #include <sys/systm.h> 39 1.1 skrll #include <sys/kernel.h> 40 1.1 skrll #include <sys/gpio.h> 41 1.1 skrll 42 1.1 skrll #include <dev/sdmmc/sdhcreg.h> 43 1.1 skrll #include <dev/sdmmc/sdhcvar.h> 44 1.1 skrll #include <dev/sdmmc/sdmmcvar.h> 45 1.1 skrll 46 1.1 skrll #include <dev/fdt/fdtvar.h> 47 1.1 skrll 48 1.1 skrll static int imx_sdhc_match(device_t, cfdata_t, void *); 49 1.1 skrll static void imx_sdhc_attach(device_t, device_t, void *); 50 1.1 skrll 51 1.1 skrll static int imx_sdhc_card_detect(struct sdhc_softc *); 52 1.1 skrll static int imx_sdhc_write_protect(struct sdhc_softc *); 53 1.1 skrll 54 1.1 skrll struct imx_sdhc_softc { 55 1.1 skrll struct sdhc_softc sc_sdhc; 56 1.1 skrll 57 1.1 skrll bus_space_tag_t sc_bst; 58 1.1 skrll bus_space_handle_t sc_bsh; 59 1.1 skrll bus_size_t sc_bsz; 60 1.1 skrll 61 1.1 skrll struct sdhc_host *sc_host; 62 1.1 skrll void *sc_ih; 63 1.1 skrll 64 1.1 skrll struct clk *sc_clk_per; 65 1.1 skrll struct fdtbus_regulator *sc_vmmc_supply; 66 1.1 skrll 67 1.1 skrll struct fdtbus_gpio_pin *sc_pin_cd; 68 1.1 skrll struct fdtbus_gpio_pin *sc_pin_wp; 69 1.1 skrll }; 70 1.1 skrll 71 1.1 skrll CFATTACH_DECL_NEW(imx_sdhc, sizeof(struct imx_sdhc_softc), 72 1.1 skrll imx_sdhc_match, imx_sdhc_attach, NULL, NULL); 73 1.1 skrll 74 1.1 skrll struct imx6_sdhc_config { 75 1.1 skrll uint32_t flags; 76 1.1 skrll }; 77 1.1 skrll 78 1.1 skrll static const struct imx6_sdhc_config imx6q_config = { 79 1.1 skrll .flags = SDHC_FLAG_BROKEN_ADMA2_ZEROLEN | 80 1.1 skrll SDHC_FLAG_NO_BUSY_INTR, 81 1.1 skrll }; 82 1.1 skrll 83 1.1 skrll static const struct imx6_sdhc_config imx7d_config = { 84 1.1 skrll .flags = 0 85 1.1 skrll }; 86 1.1 skrll 87 1.3 thorpej static const struct device_compatible_entry compat_data[] = { 88 1.3 thorpej { .compat = "fsl,imx6q-usdhc", .data = &imx6q_config }, 89 1.8 bouyer { .compat = "fsl,imx6sx-usdhc", .data = &imx6q_config }, 90 1.3 thorpej { .compat = "fsl,imx7d-usdhc", .data = &imx7d_config }, 91 1.5 thorpej DEVICE_COMPAT_EOL 92 1.1 skrll }; 93 1.1 skrll 94 1.1 skrll static int 95 1.1 skrll imx_sdhc_match(device_t parent, cfdata_t cf, void *aux) 96 1.1 skrll { 97 1.1 skrll struct fdt_attach_args * const faa = aux; 98 1.1 skrll 99 1.6 thorpej return of_compatible_match(faa->faa_phandle, compat_data); 100 1.1 skrll } 101 1.1 skrll 102 1.1 skrll static void 103 1.1 skrll imx_sdhc_attach(device_t parent, device_t self, void *aux) 104 1.1 skrll { 105 1.1 skrll struct imx_sdhc_softc * const sc = device_private(self); 106 1.1 skrll struct fdt_attach_args * const faa = aux; 107 1.1 skrll const int phandle = faa->faa_phandle; 108 1.1 skrll const struct imx6_sdhc_config *conf; 109 1.1 skrll char intrstr[128]; 110 1.1 skrll bus_addr_t addr; 111 1.1 skrll bus_size_t size; 112 1.1 skrll u_int bus_width; 113 1.1 skrll int error; 114 1.1 skrll 115 1.1 skrll fdtbus_clock_assign(phandle); 116 1.1 skrll 117 1.1 skrll if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 118 1.1 skrll aprint_error(": couldn't get registers\n"); 119 1.1 skrll return; 120 1.1 skrll } 121 1.1 skrll 122 1.1 skrll sc->sc_clk_per = fdtbus_clock_get(phandle, "per"); 123 1.1 skrll if (sc->sc_clk_per == NULL) { 124 1.1 skrll aprint_error(": couldn't get clock\n"); 125 1.1 skrll return; 126 1.1 skrll } 127 1.1 skrll 128 1.1 skrll if (of_getprop_uint32(phandle, "bus-width", &bus_width)) 129 1.1 skrll bus_width = 4; 130 1.1 skrll 131 1.1 skrll sc->sc_vmmc_supply = fdtbus_regulator_acquire(phandle, "vmmc-supply"); 132 1.1 skrll 133 1.6 thorpej conf = of_compatible_lookup(phandle, compat_data)->data; 134 1.1 skrll 135 1.1 skrll sc->sc_sdhc.sc_dev = self; 136 1.1 skrll sc->sc_sdhc.sc_dmat = faa->faa_dmat; 137 1.1 skrll 138 1.1 skrll sc->sc_sdhc.sc_clkbase = clk_get_rate(sc->sc_clk_per) / 1000; 139 1.1 skrll sc->sc_sdhc.sc_flags = 140 1.1 skrll SDHC_FLAG_USE_DMA | 141 1.1 skrll SDHC_FLAG_NO_PWR0 | 142 1.1 skrll SDHC_FLAG_HAVE_DVS | 143 1.1 skrll SDHC_FLAG_32BIT_ACCESS | 144 1.1 skrll SDHC_FLAG_USDHC; 145 1.1 skrll sc->sc_sdhc.sc_flags |= conf->flags; 146 1.1 skrll 147 1.1 skrll if (bus_width == 8) 148 1.1 skrll sc->sc_sdhc.sc_flags |= SDHC_FLAG_8BIT_MODE; 149 1.1 skrll if (of_hasprop(phandle, "no-1-8-v")) 150 1.1 skrll sc->sc_sdhc.sc_flags |= SDHC_FLAG_NO_1_8_V; 151 1.1 skrll 152 1.1 skrll sc->sc_sdhc.sc_host = &sc->sc_host; 153 1.1 skrll 154 1.1 skrll sc->sc_bst = faa->faa_bst; 155 1.1 skrll error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 156 1.1 skrll if (error) { 157 1.1 skrll aprint_error(": couldn't map %#" PRIxBUSADDR ": %d", addr, error); 158 1.1 skrll return; 159 1.1 skrll } 160 1.1 skrll sc->sc_bsz = size; 161 1.1 skrll 162 1.1 skrll sc->sc_pin_cd = fdtbus_gpio_acquire(phandle, 163 1.1 skrll "cd-gpios", GPIO_PIN_INPUT); 164 1.1 skrll if (sc->sc_pin_cd) { 165 1.1 skrll sc->sc_sdhc.sc_vendor_card_detect = imx_sdhc_card_detect; 166 1.1 skrll sc->sc_sdhc.sc_flags |= SDHC_FLAG_POLL_CARD_DET; 167 1.1 skrll } 168 1.1 skrll 169 1.1 skrll sc->sc_pin_wp = fdtbus_gpio_acquire(phandle, 170 1.1 skrll "wp-gpios", GPIO_PIN_INPUT); 171 1.1 skrll if (sc->sc_pin_wp) { 172 1.1 skrll sc->sc_sdhc.sc_vendor_write_protect = imx_sdhc_write_protect; 173 1.1 skrll } 174 1.1 skrll 175 1.1 skrll error = clk_enable(sc->sc_clk_per); 176 1.1 skrll if (error) { 177 1.1 skrll aprint_error(": couldn't enable clock: %d\n", error); 178 1.1 skrll return; 179 1.1 skrll } 180 1.1 skrll 181 1.1 skrll if (sc->sc_vmmc_supply != NULL) { 182 1.1 skrll error = fdtbus_regulator_enable(sc->sc_vmmc_supply); 183 1.1 skrll if (error) { 184 1.1 skrll aprint_error(": couldn't enable vmmc supply: %d\n", error); 185 1.1 skrll return; 186 1.1 skrll } 187 1.1 skrll } 188 1.1 skrll 189 1.1 skrll aprint_naive("\n"); 190 1.1 skrll aprint_normal(": SDMMC (%u kHz)\n", sc->sc_sdhc.sc_clkbase); 191 1.1 skrll 192 1.1 skrll if (sc->sc_sdhc.sc_clkbase == 0) { 193 1.1 skrll aprint_error_dev(self, "couldn't determine frequency\n"); 194 1.1 skrll return; 195 1.1 skrll } 196 1.1 skrll 197 1.1 skrll if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 198 1.1 skrll aprint_error_dev(self, "failed to decode interrupt\n"); 199 1.1 skrll return; 200 1.1 skrll } 201 1.1 skrll 202 1.2 jmcneill sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SDMMC, 203 1.2 jmcneill FDT_INTR_MPSAFE, sdhc_intr, &sc->sc_sdhc, device_xname(self)); 204 1.1 skrll if (sc->sc_ih == NULL) { 205 1.1 skrll aprint_error_dev(self, "couldn't establish interrupt on %s\n", 206 1.1 skrll intrstr); 207 1.1 skrll return; 208 1.1 skrll } 209 1.1 skrll aprint_normal_dev(self, "interrupting on %s\n", intrstr); 210 1.1 skrll 211 1.1 skrll error = sdhc_host_found(&sc->sc_sdhc, sc->sc_bst, sc->sc_bsh, sc->sc_bsz); 212 1.1 skrll if (error) { 213 1.1 skrll aprint_error_dev(self, "couldn't initialize host, error = %d\n", 214 1.1 skrll error); 215 1.1 skrll fdtbus_intr_disestablish(phandle, sc->sc_ih); 216 1.1 skrll sc->sc_ih = NULL; 217 1.1 skrll return; 218 1.1 skrll } 219 1.1 skrll } 220 1.1 skrll 221 1.1 skrll static int 222 1.1 skrll imx_sdhc_card_detect(struct sdhc_softc *ssc) 223 1.1 skrll { 224 1.1 skrll struct imx_sdhc_softc *sc = device_private(ssc->sc_dev); 225 1.1 skrll 226 1.1 skrll KASSERT(sc->sc_pin_cd != NULL); 227 1.1 skrll 228 1.1 skrll return fdtbus_gpio_read(sc->sc_pin_cd); 229 1.1 skrll } 230 1.1 skrll 231 1.1 skrll static int 232 1.1 skrll imx_sdhc_write_protect(struct sdhc_softc *ssc) 233 1.1 skrll { 234 1.1 skrll struct imx_sdhc_softc *sc = device_private(ssc->sc_dev); 235 1.1 skrll 236 1.1 skrll KASSERT(sc->sc_pin_wp != NULL); 237 1.1 skrll 238 1.1 skrll return fdtbus_gpio_read(sc->sc_pin_wp); 239 1.1 skrll } 240 1.1 skrll 241