imxwdog.c revision 1.1
1 /* $NetBSD: imxwdog.c,v 1.1 2020/12/23 14:42:38 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 2010 Genetec Corporation. All rights reserved. 5 * Written by Hiroyuki Bessho for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: imxwdog.c,v 1.1 2020/12/23 14:42:38 skrll Exp $"); 31 32 #include "opt_imx.h" 33 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 #include <sys/device.h> 37 #include <sys/wdog.h> 38 39 #include <dev/sysmon/sysmonvar.h> 40 41 #include <dev/fdt/fdtvar.h> 42 43 #include <arm/imx/imxwdogreg.h> 44 45 struct imxwdog_softc { 46 struct sysmon_wdog sc_smw; 47 device_t sc_dev; 48 bus_space_tag_t sc_iot; 49 bus_space_handle_t sc_ioh; 50 51 u_int sc_wdog_max_period; 52 u_int sc_wdog_period; 53 bool sc_wdog_armed; 54 }; 55 56 #ifndef IMXWDOG_PERIOD_DEFAULT 57 #define IMXWDOG_PERIOD_DEFAULT 10 58 #endif 59 60 61 int imxwdog_match(device_t, cfdata_t, void *); 62 void imxwdog_attach(device_t, device_t, void *); 63 64 65 CFATTACH_DECL_NEW(imxwdog, sizeof(struct imxwdog_softc), 66 imxwdog_match, imxwdog_attach, NULL, NULL); 67 68 int 69 imxwdog_match(device_t parent, cfdata_t cf, void *aux) 70 { 71 const char * const compatible[] = { 72 "fsl,imx21-wdt", 73 "fsl,imx6q-wdt", 74 NULL 75 }; 76 struct fdt_attach_args * const faa = aux; 77 78 return of_match_compatible(faa->faa_phandle, compatible); 79 } 80 81 82 static inline uint16_t 83 wdog_read(struct imxwdog_softc *sc, bus_size_t o) 84 { 85 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, o); 86 } 87 88 static inline void 89 wdog_write(struct imxwdog_softc *sc, bus_size_t o, uint16_t v) 90 { 91 bus_space_write_2(sc->sc_iot, sc->sc_ioh, o, v); 92 } 93 94 static int 95 wdog_tickle(struct sysmon_wdog *smw) 96 { 97 struct imxwdog_softc * const sc = smw->smw_cookie; 98 99 wdog_write(sc, IMX_WDOG_WSR, WSR_MAGIC1); 100 wdog_write(sc, IMX_WDOG_WSR, WSR_MAGIC2); 101 102 return 0; 103 } 104 105 static int 106 wdog_setmode(struct sysmon_wdog *smw) 107 { 108 struct imxwdog_softc * const sc = smw->smw_cookie; 109 uint16_t reg; 110 111 if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) { 112 /* this chip do not support wdt disable */ 113 aprint_debug_dev(sc->sc_dev, "setmode disable\n"); 114 return sc->sc_wdog_armed ? EBUSY : 0; 115 } 116 117 /* 118 * If no changes, just tickle it and return. 119 */ 120 if (sc->sc_wdog_armed && smw->smw_period == sc->sc_wdog_period) { 121 wdog_tickle(smw); 122 aprint_debug_dev(sc->sc_dev, "setmode refresh\n"); 123 return 0; 124 } 125 126 /* set default */ 127 if (smw->smw_period == WDOG_PERIOD_DEFAULT) { 128 sc->sc_wdog_period = IMXWDOG_PERIOD_DEFAULT; 129 smw->smw_period = IMXWDOG_PERIOD_DEFAULT; 130 } 131 132 /* 133 * Make sure we don't overflow the counter. 134 */ 135 if (smw->smw_period >= sc->sc_wdog_max_period) 136 return EINVAL; 137 138 sc->sc_wdog_period = smw->smw_period; 139 sc->sc_wdog_armed = true; 140 141 reg = wdog_read(sc, IMX_WDOG_WCR); 142 reg &= ~WCR_WT; 143 reg |= __SHIFTIN(sc->sc_wdog_period * 2 - 1, WCR_WT); 144 reg |= WCR_WDE; 145 wdog_write(sc, IMX_WDOG_WCR, reg); 146 147 return 0; 148 } 149 150 151 void 152 imxwdog_attach(device_t parent, device_t self, void *aux) 153 { 154 struct imxwdog_softc *sc = device_private(self); 155 struct fdt_attach_args * const faa = aux; 156 const int phandle = faa->faa_phandle; 157 bus_space_tag_t bst = faa->faa_bst; 158 bus_addr_t addr; 159 bus_size_t size; 160 161 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 162 aprint_error(": couldn't get registers\n"); 163 return; 164 } 165 166 int error = bus_space_map(bst, addr, size, 0, &sc->sc_ioh); 167 if (error) { 168 aprint_error(": couldn't map %" PRIxBUSADDR ": %d", addr, error); 169 return; 170 } 171 172 #if 0 173 char intrstr[128]; 174 if (!fdtbus_intr_str(ifsc->sc_phandle, 0, intrstr, sizeof(intrstr))) { 175 aprint_error_dev(sc->sc_dev, "failed to decode interrupt\n"); 176 return NULL; 177 } 178 ih = fdtbus_intr_establish(phandle, 0, IPL_VM, FDT_INTR_MPSAFE, 179 imxwdog_intr, sc); 180 if (ih == NULL) { 181 aprint_error_dev(sc->sc_dev, "failed to establish interrupt on %s\n", 182 intrstr); 183 return NULL; 184 } 185 aprint_normal_dev(sc->sc_dev, "interrupting on %s\n", intrstr); 186 #endif 187 188 sc->sc_dev = self; 189 sc->sc_iot = faa->faa_bst; 190 191 sc->sc_wdog_armed = __SHIFTOUT(wdog_read(sc, IMX_WDOG_WCR), WCR_WDE); 192 /* 193 * Does the config file tell us to turn on the watchdog? 194 */ 195 if (device_cfdata(self)->cf_flags & 1) 196 sc->sc_wdog_armed = true; 197 198 sc->sc_wdog_max_period = 0xff / 2; 199 sc->sc_wdog_period = IMXWDOG_PERIOD_DEFAULT; 200 201 uint16_t reg = wdog_read(sc, IMX_WDOG_WCR); 202 reg &= ~WCR_WT; 203 reg |= __SHIFTIN(sc->sc_wdog_period * 2 - 1, WCR_WT); 204 wdog_write(sc, IMX_WDOG_WCR, reg); 205 206 aprint_naive("\n"); 207 aprint_normal(": i.MX Watchdog Timer, default period is %u seconds%s\n", 208 sc->sc_wdog_period, 209 sc->sc_wdog_armed ? " (armed)" : ""); 210 211 sc->sc_smw.smw_name = device_xname(self); 212 sc->sc_smw.smw_cookie = sc; 213 sc->sc_smw.smw_setmode = wdog_setmode; 214 sc->sc_smw.smw_tickle = wdog_tickle; 215 sc->sc_smw.smw_period = sc->sc_wdog_period; 216 217 if (sysmon_wdog_register(&sc->sc_smw) != 0) 218 aprint_error_dev(self, "unable to register with sysmon\n"); 219 220 if (sc->sc_wdog_armed) { 221 error = sysmon_wdog_setmode(&sc->sc_smw, WDOG_MODE_KTICKLE, 222 sc->sc_wdog_period); 223 if (error) 224 aprint_error_dev(self, 225 "failed to start kernel tickler: %d\n", error); 226 else { 227 reg = wdog_read(sc, IMX_WDOG_WCR); 228 reg |= WCR_WDE; 229 wdog_write(sc, IMX_WDOG_WCR, reg); 230 } 231 } 232 } 233
Indexes created Fri Oct 03 17:10:05 GMT 2025