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ofw_irqhandler.c revision 1.1.2.2
      1 /*	$NetBSD: ofw_irqhandler.c,v 1.1.2.2 2002/02/28 04:07:41 nathanw Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1994-1998 Mark Brinicombe.
      5  * Copyright (c) 1994 Brini.
      6  * All rights reserved.
      7  *
      8  * This code is derived from software written for Brini by Mark Brinicombe
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by Mark Brinicombe
     21  *	for the NetBSD Project.
     22  * 4. The name of the company nor the name of the author may be used to
     23  *    endorse or promote products derived from this software without specific
     24  *    prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     27  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     28  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     29  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     30  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     31  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     35  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     36  *
     37  *	from: irqhandler.c
     38  *
     39  * IRQ/FIQ initialisation, claim, release and handler routines
     40  *
     41  * Created      : 30/09/94
     42  */
     43 
     44 #include "opt_irqstats.h"
     45 
     46 #include <sys/param.h>
     47 #include <sys/systm.h>
     48 #include <sys/syslog.h>
     49 #include <sys/malloc.h>
     50 
     51 #include <uvm/uvm_extern.h>
     52 
     53 #include <machine/intr.h>
     54 #include <machine/cpu.h>
     55 
     56 irqhandler_t *irqhandlers[NIRQS];
     57 
     58 int current_intr_depth;
     59 u_int current_mask;
     60 u_int actual_mask;
     61 u_int disabled_mask;
     62 u_int spl_mask;
     63 u_int irqmasks[IPL_LEVELS];
     64 u_int irqblock[NIRQS];
     65 extern u_int intrcnt[];
     66 
     67 extern u_int soft_interrupts;	/* Only so we can initialise it */
     68 
     69 extern char *_intrnames;
     70 
     71 /* Prototypes */
     72 
     73 int podule_irqhandler		__P((void));
     74 extern void set_spl_masks	__P((void));
     75 
     76 /*
     77  * void irq_init(void)
     78  *
     79  * Initialise the IRQ/FIQ sub system
     80  */
     81 
     82 void
     83 irq_init()
     84 {
     85 	int loop;
     86 
     87 	/* Clear all the IRQ handlers and the irq block masks */
     88 	for (loop = 0; loop < NIRQS; ++loop) {
     89 		irqhandlers[loop] = NULL;
     90 		irqblock[loop] = 0;
     91 	}
     92 
     93 	/*
     94 	 * Setup the irqmasks for the different Interrupt Priority Levels
     95 	 * We will start with no bits set and these will be updated as handlers
     96 	 * are installed at different IPL's.
     97 	 */
     98 	for (loop = 0; loop < IPL_LEVELS; ++loop)
     99 		irqmasks[loop] = 0;
    100 
    101 	current_intr_depth = 0;
    102 	current_mask = 0x00000000;
    103 	disabled_mask = 0x00000000;
    104 	actual_mask = 0x00000000;
    105 	spl_mask = 0x00000000;
    106 	soft_interrupts = 0x00000000;
    107 
    108 	set_spl_masks();
    109 
    110 	/* Enable IRQ's and FIQ's */
    111 	enable_interrupts(I32_bit | F32_bit);
    112 }
    113 
    114 
    115 /*
    116  * int irq_claim(int irq, irqhandler_t *handler)
    117  *
    118  * Enable an IRQ and install a handler for it.
    119  */
    120 
    121 int
    122 irq_claim(irq, handler)
    123 	int irq;
    124 	irqhandler_t *handler;
    125 {
    126 	int level;
    127 	int loop;
    128 
    129 #ifdef DIAGNOSTIC
    130 	/* Sanity check */
    131 	if (handler == NULL)
    132 		panic("NULL interrupt handler\n");
    133 	if (handler->ih_func == NULL)
    134 		panic("Interrupt handler does not have a function\n");
    135 #endif	/* DIAGNOSTIC */
    136 
    137 	/*
    138 	 * IRQ_INSTRUCT indicates that we should get the irq number
    139 	 * from the irq structure
    140 	 */
    141 	if (irq == IRQ_INSTRUCT)
    142 		irq = handler->ih_num;
    143 
    144 	/* Make sure the irq number is valid */
    145 	if (irq < 0 || irq >= NIRQS)
    146 		return(-1);
    147 
    148 	/* Make sure the level is valid */
    149 	if (handler->ih_level < 0 || handler->ih_level >= IPL_LEVELS)
    150     	        return(-1);
    151 
    152 	/* Attach handler at top of chain */
    153 	handler->ih_next = irqhandlers[irq];
    154 	irqhandlers[irq] = handler;
    155 
    156 	/*
    157 	 * Reset the flags for this handler.
    158 	 * As the handler is now in the chain mark it as active.
    159 	 */
    160 	handler->ih_flags = 0 | IRQ_FLAG_ACTIVE;
    161 
    162 	/*
    163 	 * Record the interrupt number for accounting.
    164 	 * Done here as the accounting number may not be the same as the
    165 	 * IRQ number though for the moment they are
    166 	 */
    167 	handler->ih_num = irq;
    168 
    169 #ifdef IRQSTATS
    170 	/* Get the interrupt name from the head of the list */
    171 	if (handler->ih_name) {
    172 		char *ptr = _intrnames + (irq * 14);
    173 		strcpy(ptr, "             ");
    174 		strncpy(ptr, handler->ih_name,
    175 		    min(strlen(handler->ih_name), 13));
    176 	} else {
    177 		char *ptr = _intrnames + (irq * 14);
    178 		sprintf(ptr, "irq %2d     ", irq);
    179 	}
    180 #endif	/* IRQSTATS */
    181 
    182 	/*
    183 	 * Update the irq masks.
    184 	 * Find the lowest interrupt priority on the irq chain.
    185 	 * Interrupt is allowable at priorities lower than this.
    186 	 * If ih_level is out of range then don't bother to update
    187 	 * the masks.
    188 	 */
    189 	if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
    190 		irqhandler_t *ptr;
    191 
    192 		/*
    193 		 * Find the lowest interrupt priority on the irq chain.
    194 		 * Interrupt is allowable at priorities lower than this.
    195 		 */
    196 		ptr = irqhandlers[irq];
    197 		if (ptr) {
    198 			level = ptr->ih_level - 1;
    199 			while (ptr) {
    200 				if (ptr->ih_level - 1 < level)
    201 					level = ptr->ih_level - 1;
    202 				ptr = ptr->ih_next;
    203 			}
    204 			while (level >= 0) {
    205 				irqmasks[level] |= (1 << irq);
    206 				--level;
    207 			}
    208 		}
    209 
    210 #include "sl.h"
    211 #include "ppp.h"
    212 #if NSL > 0 || NPPP > 0
    213 		/* In the presence of SLIP or PPP, splimp > spltty. */
    214 		irqmasks[IPL_NET] &= irqmasks[IPL_TTY];
    215 #endif
    216 	}
    217 
    218 	/*
    219 	 * We now need to update the irqblock array. This array indicates
    220 	 * what other interrupts should be blocked when interrupt is asserted
    221 	 * This basically emulates hardware interrupt priorities e.g. by
    222 	 * blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
    223 	 * is asserted. For each interrupt we find the highest IPL and set
    224 	 * the block mask to the interrupt mask for that level.
    225 	 */
    226 
    227 	for (loop = 0; loop < NIRQS; ++loop) {
    228 		irqhandler_t *ptr;
    229 
    230 		ptr = irqhandlers[loop];
    231 		if (ptr) {
    232 			/* There is at least 1 handler so scan the chain */
    233 			level = ptr->ih_level;
    234 			while (ptr) {
    235 				if (ptr->ih_level > level)
    236 					level = ptr->ih_level;
    237 				ptr = ptr->ih_next;
    238 			}
    239 			irqblock[loop] = ~irqmasks[level];
    240 		} else
    241 			/* No handlers for this irq so nothing to block */
    242 			irqblock[loop] = 0;
    243 	}
    244 
    245 	enable_irq(irq);
    246 	set_spl_masks();
    247 
    248 	return(0);
    249 }
    250 
    251 
    252 /*
    253  * int irq_release(int irq, irqhandler_t *handler)
    254  *
    255  * Disable an IRQ and remove a handler for it.
    256  */
    257 
    258 int
    259 irq_release(irq, handler)
    260 	int irq;
    261 	irqhandler_t *handler;
    262 {
    263 	int level;
    264 	int loop;
    265 	irqhandler_t *irqhand;
    266 	irqhandler_t **prehand;
    267 	extern char *_intrnames;
    268 
    269 	/*
    270 	 * IRQ_INSTRUCT indicates that we should get the irq number
    271 	 * from the irq structure
    272 	 */
    273 	if (irq == IRQ_INSTRUCT)
    274 		irq = handler->ih_num;
    275 
    276 	/* Make sure the irq number is valid */
    277 	if (irq < 0 || irq >= NIRQS)
    278 		return(-1);
    279 
    280 	/* Locate the handler */
    281 	irqhand = irqhandlers[irq];
    282 	prehand = &irqhandlers[irq];
    283 
    284 	while (irqhand && handler != irqhand) {
    285 		prehand = &irqhand;
    286 		irqhand = irqhand->ih_next;
    287 	}
    288 
    289 	/* Remove the handler if located */
    290 	if (irqhand)
    291 		*prehand = irqhand->ih_next;
    292 	else
    293 		return(-1);
    294 
    295 	/* Now the handler has been removed from the chain mark is as inactive */
    296 	irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE;
    297 
    298 	/* Make sure the head of the handler list is active */
    299 	if (irqhandlers[irq])
    300 		irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE;
    301 
    302 #ifdef IRQSTATS
    303 	/* Get the interrupt name from the head of the list */
    304 	if (irqhandlers[irq] && irqhandlers[irq]->ih_name) {
    305 		char *ptr = _intrnames + (irq * 14);
    306 		strcpy(ptr, "             ");
    307 		strncpy(ptr, irqhandlers[irq]->ih_name,
    308 		    min(strlen(irqhandlers[irq]->ih_name), 13));
    309 	} else {
    310 		char *ptr = _intrnames + (irq * 14);
    311 		sprintf(ptr, "irq %2d     ", irq);
    312 	}
    313 #endif	/* IRQSTATS */
    314 
    315 	/*
    316 	 * Update the irq masks.
    317 	 * If ih_level is out of range then don't bother to update
    318 	 * the masks.
    319 	 */
    320 	if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
    321 		irqhandler_t *ptr;
    322 
    323 		/* Clean the bit from all the masks */
    324 		for (level = 0; level < IPL_LEVELS; ++level)
    325 			irqmasks[level] &= ~(1 << irq);
    326 
    327 		/*
    328 		 * Find the lowest interrupt priority on the irq chain.
    329 		 * Interrupt is allowable at priorities lower than this.
    330 		 */
    331 		ptr = irqhandlers[irq];
    332 		if (ptr) {
    333 			level = ptr->ih_level - 1;
    334 			while (ptr) {
    335 				if (ptr->ih_level - 1 < level)
    336 					level = ptr->ih_level - 1;
    337 				ptr = ptr->ih_next;
    338 			}
    339 			while (level >= 0) {
    340 				irqmasks[level] |= (1 << irq);
    341 				--level;
    342 			}
    343 		}
    344 	}
    345 
    346 	/*
    347 	 * We now need to update the irqblock array. This array indicates
    348 	 * what other interrupts should be blocked when interrupt is asserted
    349 	 * This basically emulates hardware interrupt priorities e.g. by
    350 	 * blocking all other IPL_BIO interrupts with an IPL_BIO interrupt
    351 	 * is asserted. For each interrupt we find the highest IPL and set
    352 	 * the block mask to the interrupt mask for that level.
    353 	 */
    354 	for (loop = 0; loop < NIRQS; ++loop) {
    355 		irqhandler_t *ptr;
    356 
    357 		ptr = irqhandlers[loop];
    358 		if (ptr) {
    359 			/* There is at least 1 handler so scan the chain */
    360 			level = ptr->ih_level;
    361 			while (ptr) {
    362 				if (ptr->ih_level > level)
    363 					level = ptr->ih_level;
    364 				ptr = ptr->ih_next;
    365 			}
    366 			irqblock[loop] = ~irqmasks[level];
    367 		} else
    368 			/* No handlers for this irq so nothing to block */
    369 			irqblock[loop] = 0;
    370 	}
    371 
    372 	/*
    373 	 * Disable the appropriate mask bit if there are no handlers left for
    374 	 * this IRQ.
    375 	 */
    376 	if (irqhandlers[irq] == NULL)
    377 		disable_irq(irq);
    378 
    379 	set_spl_masks();
    380 
    381 	return(0);
    382 }
    383 
    384 
    385 void *
    386 intr_claim(irq, level, name, ih_func, ih_arg)
    387 	int irq;
    388 	int level;
    389 	const char *name;
    390 	int (*ih_func) __P((void *));
    391 	void *ih_arg;
    392 {
    393 	irqhandler_t *ih;
    394 
    395 	ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT);
    396 	if (!ih)
    397 		panic("intr_claim(): Cannot malloc handler memory\n");
    398 
    399 	ih->ih_level = level;
    400 	ih->ih_name = name;
    401 	ih->ih_func = ih_func;
    402 	ih->ih_arg = ih_arg;
    403 	ih->ih_flags = 0;
    404 
    405 	if (irq_claim(irq, ih) != 0)
    406 		return(NULL);
    407 	return(ih);
    408 }
    409 
    410 
    411 int
    412 intr_release(arg)
    413 	void *arg;
    414 {
    415 	irqhandler_t *ih = (irqhandler_t *)arg;
    416 
    417 	if (irq_release(ih->ih_num, ih) == 0) {
    418 		free(ih, M_DEVBUF);
    419 		return(0);
    420 	}
    421 	return(1);
    422 }
    423 
    424 
    425 /*
    426  * void disable_irq(int irq)
    427  *
    428  * Disables a specific irq. The irq is removed from the master irq mask
    429  */
    430 
    431 void
    432 disable_irq(irq)
    433 	int irq;
    434 {
    435 	register int oldirqstate;
    436 
    437 	oldirqstate = disable_interrupts(I32_bit);
    438 	current_mask &= ~(1 << irq);
    439 	irq_setmasks();
    440 	restore_interrupts(oldirqstate);
    441 }
    442 
    443 
    444 /*
    445  * void enable_irq(int irq)
    446  *
    447  * Enables a specific irq. The irq is added to the master irq mask
    448  * This routine should be used with caution. A handler should already
    449  * be installed.
    450  */
    451 
    452 void
    453 enable_irq(irq)
    454 	int irq;
    455 {
    456 	register u_int oldirqstate;
    457 
    458 	oldirqstate = disable_interrupts(I32_bit);
    459 	current_mask |= (1 << irq);
    460 	irq_setmasks();
    461 	restore_interrupts(oldirqstate);
    462 }
    463 
    464 
    465 /*
    466  * void stray_irqhandler(u_int mask)
    467  *
    468  * Handler for stray interrupts. This gets called if a handler cannot be
    469  * found for an interrupt.
    470  */
    471 
    472 void
    473 stray_irqhandler(mask)
    474 	u_int mask;
    475 {
    476 	static u_int stray_irqs = 0;
    477 
    478 	if (++stray_irqs <= 8)
    479 		log(LOG_ERR, "Stray interrupt %08x%s\n", mask,
    480 		    stray_irqs >= 8 ? ": stopped logging" : "");
    481 }
    482