ofw_irqhandler.c revision 1.6.14.2
1 /* $NetBSD: ofw_irqhandler.c,v 1.6.14.2 2007/03/12 05:47:06 rmind Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 28 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 30 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 31 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * from: irqhandler.c 38 * 39 * IRQ/FIQ initialisation, claim, release and handler routines 40 * 41 * Created : 30/09/94 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: ofw_irqhandler.c,v 1.6.14.2 2007/03/12 05:47:06 rmind Exp $"); 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/syslog.h> 50 #include <sys/malloc.h> 51 52 #include <uvm/uvm_extern.h> 53 54 #include <machine/intr.h> 55 #include <machine/irqhandler.h> 56 #include <machine/cpu.h> 57 58 irqhandler_t *irqhandlers[NIRQS]; 59 60 int current_intr_depth; 61 u_int current_mask; 62 u_int actual_mask; 63 u_int disabled_mask; 64 u_int spl_mask; 65 u_int irqmasks[IPL_LEVELS]; 66 extern u_int intrcnt[]; 67 68 extern char *_intrnames; 69 70 /* Prototypes */ 71 72 int podule_irqhandler __P((void)); 73 extern void set_spl_masks __P((void)); 74 75 /* 76 * void irq_init(void) 77 * 78 * Initialise the IRQ/FIQ sub system 79 */ 80 81 void 82 irq_init() 83 { 84 int loop; 85 86 /* Clear all the IRQ handlers and the irq block masks */ 87 for (loop = 0; loop < NIRQS; ++loop) { 88 irqhandlers[loop] = NULL; 89 } 90 91 /* 92 * Setup the irqmasks for the different Interrupt Priority Levels 93 * We will start with no bits set and these will be updated as handlers 94 * are installed at different IPL's. 95 */ 96 for (loop = 0; loop < IPL_LEVELS; ++loop) 97 irqmasks[loop] = 0; 98 99 current_intr_depth = 0; 100 current_mask = 0x00000000; 101 disabled_mask = 0x00000000; 102 actual_mask = 0x00000000; 103 spl_mask = 0x00000000; 104 105 set_spl_masks(); 106 107 /* Enable IRQ's and FIQ's */ 108 enable_interrupts(I32_bit | F32_bit); 109 } 110 111 112 /* 113 * int irq_claim(int irq, irqhandler_t *handler) 114 * 115 * Enable an IRQ and install a handler for it. 116 */ 117 118 int 119 irq_claim(irq, handler, group, name) 120 int irq; 121 irqhandler_t *handler; 122 const char *group; 123 const char *name; 124 { 125 int level; 126 127 #ifdef DIAGNOSTIC 128 /* Sanity check */ 129 if (handler == NULL) 130 panic("NULL interrupt handler"); 131 if (handler->ih_func == NULL) 132 panic("Interrupt handler does not have a function"); 133 #endif /* DIAGNOSTIC */ 134 135 /* 136 * IRQ_INSTRUCT indicates that we should get the irq number 137 * from the irq structure 138 */ 139 if (irq == IRQ_INSTRUCT) 140 irq = handler->ih_num; 141 142 /* Make sure the irq number is valid */ 143 if (irq < 0 || irq >= NIRQS) 144 return(-1); 145 146 /* Make sure the level is valid */ 147 if (handler->ih_level < 0 || handler->ih_level >= IPL_LEVELS) 148 return(-1); 149 150 evcnt_attach_dynamic(&handler->ih_ev, EVCNT_TYPE_INTR, NULL, 151 group, name); 152 153 /* Attach handler at top of chain */ 154 handler->ih_next = irqhandlers[irq]; 155 irqhandlers[irq] = handler; 156 157 /* 158 * Reset the flags for this handler. 159 * As the handler is now in the chain mark it as active. 160 */ 161 handler->ih_flags = 0 | IRQ_FLAG_ACTIVE; 162 163 /* 164 * Record the interrupt number for accounting. 165 * Done here as the accounting number may not be the same as the 166 * IRQ number though for the moment they are 167 */ 168 handler->ih_num = irq; 169 170 /* 171 * Update the irq masks. 172 * Find the lowest interrupt priority on the irq chain. 173 * Interrupt is allowable at priorities lower than this. 174 * If ih_level is out of range then don't bother to update 175 * the masks. 176 */ 177 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) { 178 irqhandler_t *ptr; 179 180 /* 181 * Find the lowest interrupt priority on the irq chain. 182 * Interrupt is allowable at priorities lower than this. 183 */ 184 ptr = irqhandlers[irq]; 185 if (ptr) { 186 level = ptr->ih_level - 1; 187 while (ptr) { 188 if (ptr->ih_level - 1 < level) 189 level = ptr->ih_level - 1; 190 ptr = ptr->ih_next; 191 } 192 while (level >= 0) { 193 irqmasks[level] |= (1 << irq); 194 --level; 195 } 196 } 197 198 #include "sl.h" 199 #include "ppp.h" 200 #if NSL > 0 || NPPP > 0 201 /* In the presence of SLIP or PPP, splimp > spltty. */ 202 irqmasks[IPL_NET] &= irqmasks[IPL_TTY]; 203 #endif 204 } 205 206 enable_irq(irq); 207 set_spl_masks(); 208 209 return(0); 210 } 211 212 213 /* 214 * int irq_release(int irq, irqhandler_t *handler) 215 * 216 * Disable an IRQ and remove a handler for it. 217 */ 218 219 int 220 irq_release(irq, handler) 221 int irq; 222 irqhandler_t *handler; 223 { 224 int level; 225 irqhandler_t *irqhand; 226 irqhandler_t **prehand; 227 228 /* 229 * IRQ_INSTRUCT indicates that we should get the irq number 230 * from the irq structure 231 */ 232 if (irq == IRQ_INSTRUCT) 233 irq = handler->ih_num; 234 235 /* Make sure the irq number is valid */ 236 if (irq < 0 || irq >= NIRQS) 237 return(-1); 238 239 /* Locate the handler */ 240 irqhand = irqhandlers[irq]; 241 prehand = &irqhandlers[irq]; 242 243 while (irqhand && handler != irqhand) { 244 prehand = &irqhand; 245 irqhand = irqhand->ih_next; 246 } 247 248 /* Remove the handler if located */ 249 if (irqhand) 250 *prehand = irqhand->ih_next; 251 else 252 return(-1); 253 254 /* Now the handler has been removed from the chain mark is as inactive */ 255 irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE; 256 257 /* Make sure the head of the handler list is active */ 258 if (irqhandlers[irq]) 259 irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE; 260 261 /* 262 * Update the irq masks. 263 * If ih_level is out of range then don't bother to update 264 * the masks. 265 */ 266 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) { 267 irqhandler_t *ptr; 268 269 /* Clean the bit from all the masks */ 270 for (level = 0; level < IPL_LEVELS; ++level) 271 irqmasks[level] &= ~(1 << irq); 272 273 /* 274 * Find the lowest interrupt priority on the irq chain. 275 * Interrupt is allowable at priorities lower than this. 276 */ 277 ptr = irqhandlers[irq]; 278 if (ptr) { 279 level = ptr->ih_level - 1; 280 while (ptr) { 281 if (ptr->ih_level - 1 < level) 282 level = ptr->ih_level - 1; 283 ptr = ptr->ih_next; 284 } 285 while (level >= 0) { 286 irqmasks[level] |= (1 << irq); 287 --level; 288 } 289 } 290 } 291 292 /* 293 * Disable the appropriate mask bit if there are no handlers left for 294 * this IRQ. 295 */ 296 if (irqhandlers[irq] == NULL) 297 disable_irq(irq); 298 299 set_spl_masks(); 300 301 return(0); 302 } 303 304 305 void * 306 intr_claim(irq, level, ih_func, ih_arg, group, name) 307 int irq; 308 int level; 309 int (*ih_func) __P((void *)); 310 void *ih_arg; 311 const char *group; 312 const char *name; 313 { 314 irqhandler_t *ih; 315 316 ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT|M_ZERO); 317 if (!ih) 318 panic("intr_claim(): Cannot malloc handler memory"); 319 320 ih->ih_level = level; 321 ih->ih_func = ih_func; 322 ih->ih_arg = ih_arg; 323 ih->ih_flags = 0; 324 325 if (irq_claim(irq, ih, group, name) != 0) 326 return(NULL); 327 return(ih); 328 } 329 330 331 int 332 intr_release(arg) 333 void *arg; 334 { 335 irqhandler_t *ih = (irqhandler_t *)arg; 336 337 if (irq_release(ih->ih_num, ih) == 0) { 338 free(ih, M_DEVBUF); 339 return(0); 340 } 341 return(1); 342 } 343 344 345 /* 346 * void disable_irq(int irq) 347 * 348 * Disables a specific irq. The irq is removed from the master irq mask 349 */ 350 351 void 352 disable_irq(irq) 353 int irq; 354 { 355 register int oldirqstate; 356 357 oldirqstate = disable_interrupts(I32_bit); 358 current_mask &= ~(1 << irq); 359 irq_setmasks(); 360 restore_interrupts(oldirqstate); 361 } 362 363 364 /* 365 * void enable_irq(int irq) 366 * 367 * Enables a specific irq. The irq is added to the master irq mask 368 * This routine should be used with caution. A handler should already 369 * be installed. 370 */ 371 372 void 373 enable_irq(irq) 374 int irq; 375 { 376 register u_int oldirqstate; 377 378 oldirqstate = disable_interrupts(I32_bit); 379 current_mask |= (1 << irq); 380 irq_setmasks(); 381 restore_interrupts(oldirqstate); 382 } 383 384 385 /* 386 * void stray_irqhandler(u_int mask) 387 * 388 * Handler for stray interrupts. This gets called if a handler cannot be 389 * found for an interrupt. 390 */ 391 392 void stray_irqhandler(u_int); /* called from assembly */ 393 394 void 395 stray_irqhandler(mask) 396 u_int mask; 397 { 398 static u_int stray_irqs = 0; 399 400 if (++stray_irqs <= 8) 401 log(LOG_ERR, "Stray interrupt %08x%s\n", mask, 402 stray_irqs >= 8 ? ": stopped logging" : ""); 403 } 404
Indexes created Tue Sep 30 20:09:53 GMT 2025