pic_splfuncs.c revision 1.19 1 /* $NetBSD: pic_splfuncs.c,v 1.19 2021/03/01 11:29:14 jmcneill Exp $ */
2 /*-
3 * Copyright (c) 2008 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.19 2021/03/01 11:29:14 jmcneill Exp $");
32
33 #define _INTR_PRIVATE
34 #include <sys/param.h>
35 #include <sys/atomic.h>
36 #include <sys/evcnt.h>
37 #include <sys/lwp.h>
38 #include <sys/kernel.h>
39
40 #include <dev/cons.h>
41
42 #include <arm/armreg.h>
43 #include <arm/cpu.h>
44 #include <arm/cpufunc.h>
45 #include <arm/locore.h> /* for compat aarch64 */
46
47 #include <arm/pic/picvar.h>
48
49 #if defined(__HAVE_CPU_DOSOFTINTS_CI)
50 #define CPU_DOSOFTINTS(ci) cpu_dosoftints_ci((ci))
51 #else
52 #define CPU_DOSOFTINTS(ci) cpu_dosoftints()
53 #endif
54
55 #if defined(__HAVE_PIC_PENDING_INTRS)
56 static void splx_dopendingints(struct cpu_info *, const int);
57 #endif
58
59 int
60 _splraise(int newipl)
61 {
62 struct cpu_info * const ci = curcpu();
63 const int oldipl = ci->ci_cpl;
64 KDASSERT(newipl < NIPL);
65 if (newipl > ci->ci_cpl) {
66 pic_set_priority(ci, newipl);
67 }
68 return oldipl;
69 }
70
71 int
72 _spllower(int newipl)
73 {
74 struct cpu_info * const ci = curcpu();
75 const int oldipl = ci->ci_cpl;
76 KDASSERT(panicstr || newipl <= ci->ci_cpl);
77 if (newipl < ci->ci_cpl) {
78 register_t psw = DISABLE_INTERRUPT_SAVE();
79 ci->ci_intr_depth++;
80 pic_do_pending_ints(psw, newipl, NULL);
81 ci->ci_intr_depth--;
82 if ((psw & I32_bit) == 0 || newipl == IPL_NONE) {
83 ENABLE_INTERRUPT();
84 }
85 cpu_dosoftints();
86 }
87 return oldipl;
88 }
89
90 void
91 splx(int savedipl)
92 {
93 struct cpu_info * const ci = curcpu();
94 KDASSERT(savedipl < NIPL);
95
96 if (__predict_false(savedipl == ci->ci_cpl)) {
97 return;
98 }
99
100 #if defined(__HAVE_PIC_PENDING_INTRS)
101 if (__predict_false(ci->ci_pending_ipls != 0)) {
102 splx_dopendingints(ci, savedipl);
103 }
104 #endif
105
106 pic_set_priority(ci, savedipl);
107 CPU_DOSOFTINTS(ci);
108
109 KDASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
110 ci->ci_cpl, savedipl);
111 }
112
113 #if defined(__HAVE_PIC_PENDING_INTRS)
114 static void __noinline
115 splx_dopendingints(struct cpu_info *ci, const int savedipl)
116 {
117 const register_t psw = DISABLE_INTERRUPT_SAVE();
118 ci->ci_intr_depth++;
119 while ((ci->ci_pending_ipls & ~__BIT(savedipl)) > __BIT(savedipl)) {
120 KASSERT(ci->ci_pending_ipls < __BIT(NIPL));
121 for (;;) {
122 int ipl = 31 - __builtin_clz(ci->ci_pending_ipls);
123 KASSERT(ipl < NIPL);
124 if (ipl <= savedipl) {
125 break;
126 }
127
128 pic_set_priority(ci, ipl);
129 pic_list_deliver_irqs(ci, psw, ipl, NULL);
130 pic_list_unblock_irqs(ci);
131 }
132 }
133 ci->ci_intr_depth--;
134 if ((psw & I32_bit) == 0) {
135 ENABLE_INTERRUPT();
136 }
137 }
138 #endif
139