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rk3328_iomux.c revision 1.4 
      1 /* $NetBSD: rk3328_iomux.c,v 1.4 2021/01/18 02:35:49 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2018 Jared McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: rk3328_iomux.c,v 1.4 2021/01/18 02:35:49 thorpej Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/bus.h>
     34 #include <sys/device.h>
     35 #include <sys/intr.h>
     36 #include <sys/systm.h>
     37 #include <sys/mutex.h>
     38 #include <sys/kmem.h>
     39 #include <sys/lwp.h>
     40 
     41 #include <dev/fdt/fdtvar.h>
     42 #include <dev/fdt/syscon.h>
     43 
     44 #define	GRF_GPIO_P_REG(_bank, _idx)	(0x0100 + (_bank) * 0x10 + ((_idx) >> 3) * 4)
     45 #define	 GRF_GPIO_P_CTL(_idx)		(0x3 << (((_idx) & 7) * 2))
     46 #define	  GRF_GPIO_P_CTL_Z		0
     47 #define	  GRF_GPIO_P_CTL_PULLUP		1
     48 #define	  GRF_GPIO_P_CTL_PULLDOWN	2
     49 #define	  GRF_GPIO_P_CTL_REPEATER	3
     50 #define	  GRF_GPIO_P_CTL_MASK		0x3
     51 #define	 GRF_GPIO_P_WRITE_EN(_idx)	(0x3 << (((_idx) & 7) * 2 + 16))
     52 
     53 #define	GRF_GPIO_E_REG(_bank, _idx)	(0x0200 + (_bank) * 0x10 + ((_idx) >> 3) * 4)
     54 #define	 GRF_GPIO_E_CTL(_idx)		(0x3 << (((_idx) & 7) * 2))
     55 #define	  GRF_GPIO_E_CTL_2MA		0
     56 #define	  GRF_GPIO_E_CTL_4MA		1
     57 #define	  GRF_GPIO_E_CTL_8MA		2
     58 #define	  GRF_GPIO_E_CTL_12MA		3
     59 #define	  GRF_GPIO_E_CTL_MASK		0x3
     60 #define	 GRF_GPIO_E_WRITE_EN(_idx)	(0x3 << (((_idx) & 7) * 2 + 16))
     61 
     62 struct rk3328_iomux {
     63 	bus_size_t		base;
     64 	u_int			type;
     65 #define	RK3328_IOMUX_TYPE_3BIT	0x01
     66 };
     67 
     68 struct rk3328_iomux_bank {
     69 	struct rk3328_iomux		iomux[4];
     70 };
     71 
     72 static const struct rk3328_iomux_bank rk3328_iomux_banks[] = {
     73 	[0] = {
     74 		.iomux = {
     75 			[0] = { .base = 0x0000 },
     76 			[1] = { .base = 0x0004 },
     77 			[2] = { .base = 0x0008 },
     78 			[3] = { .base = 0x000c },
     79 		},
     80 	},
     81 	[1] = {
     82 		.iomux = {
     83 			[0] = { .base = 0x0010 },
     84 			[1] = { .base = 0x0014 },
     85 			[2] = { .base = 0x0018 },
     86 			[3] = { .base = 0x001c },
     87 		}
     88 	},
     89 	[2] = {
     90 		.iomux = {
     91 			[0] = { .base = 0x0020 },
     92 			[1] = { .base = 0x0024, .type = RK3328_IOMUX_TYPE_3BIT },
     93 			[2] = { .base = 0x002c, .type = RK3328_IOMUX_TYPE_3BIT },
     94 			[3] = { .base = 0x0034 },
     95 		},
     96 	},
     97 	[3] = {
     98 		.iomux = {
     99 			[0] = { .base = 0x0038, .type = RK3328_IOMUX_TYPE_3BIT },
    100 			[1] = { .base = 0x0040, .type = RK3328_IOMUX_TYPE_3BIT },
    101 			[2] = { .base = 0x0048 },
    102 			[3] = { .base = 0x004c },
    103 		},
    104 	},
    105 };
    106 
    107 struct rk3328_iomux_conf {
    108 	const struct rk3328_iomux_bank *banks;
    109 	u_int nbanks;
    110 };
    111 
    112 static const struct rk3328_iomux_conf rk3328_iomux_conf = {
    113 	.banks = rk3328_iomux_banks,
    114 	.nbanks = __arraycount(rk3328_iomux_banks),
    115 };
    116 
    117 static const struct device_compatible_entry compat_data[] = {
    118 	{ .compat = "rockchip,rk3328-pinctrl",	.data = &rk3328_iomux_conf },
    119 
    120 	{ 0 }
    121 };
    122 
    123 struct rk3328_iomux_softc {
    124 	device_t sc_dev;
    125 	struct syscon *sc_syscon;
    126 
    127 	const struct rk3328_iomux_conf *sc_conf;
    128 };
    129 
    130 #define	LOCK(sc)		\
    131 	syscon_lock((sc)->sc_syscon)
    132 #define	UNLOCK(sc)		\
    133 	syscon_unlock((sc)->sc_syscon)
    134 #define	RD4(sc, reg) 		\
    135 	syscon_read_4((sc)->sc_syscon, (reg))
    136 #define	WR4(sc, reg, val) 	\
    137 	syscon_write_4((sc)->sc_syscon, (reg), (val))
    138 
    139 static int	rk3328_iomux_match(device_t, cfdata_t, void *);
    140 static void	rk3328_iomux_attach(device_t, device_t, void *);
    141 
    142 CFATTACH_DECL_NEW(rk3328_iomux, sizeof(struct rk3328_iomux_softc),
    143 	rk3328_iomux_match, rk3328_iomux_attach, NULL, NULL);
    144 
    145 static void
    146 rk3328_iomux_calc_iomux_reg(struct rk3328_iomux_softc *sc, u_int bank, u_int pin, bus_size_t *reg, uint32_t *mask)
    147 {
    148 	const struct rk3328_iomux_bank *banks = sc->sc_conf->banks;
    149 
    150 	KASSERT(bank < sc->sc_conf->nbanks);
    151 
    152 	*reg = banks[bank].iomux[pin / 8].base;
    153 	if (banks[bank].iomux[pin / 8].type & RK3328_IOMUX_TYPE_3BIT) {
    154 		if ((pin % 8) >= 5)
    155 			*reg += 0x04;
    156 		const u_int bit = (pin % 8 % 5) * 3;
    157 		*mask = 7 << bit;
    158 	} else {
    159 		const u_int bit = (pin % 8) * 2;
    160 		*mask = 3 << bit;
    161 	}
    162 }
    163 
    164 static void
    165 rk3328_iomux_set_bias(struct rk3328_iomux_softc *sc, u_int bank, u_int idx, u_int bias)
    166 {
    167 	WR4(sc, GRF_GPIO_P_REG(bank, idx),
    168 	    __SHIFTIN(GRF_GPIO_P_CTL_MASK, GRF_GPIO_P_WRITE_EN(idx)) |
    169 	    __SHIFTIN(bias, GRF_GPIO_P_CTL(idx)));
    170 }
    171 
    172 static void
    173 rk3328_iomux_set_drive_strength(struct rk3328_iomux_softc *sc, u_int bank, u_int idx, u_int drv)
    174 {
    175 	WR4(sc, GRF_GPIO_E_REG(bank, idx),
    176 	    __SHIFTIN(GRF_GPIO_E_CTL_MASK, GRF_GPIO_E_WRITE_EN(idx)) |
    177 	    __SHIFTIN(drv, GRF_GPIO_E_CTL(idx)));
    178 }
    179 
    180 static void
    181 rk3328_iomux_set_mux(struct rk3328_iomux_softc *sc, u_int bank, u_int idx, u_int mux)
    182 {
    183 	bus_size_t reg;
    184 	uint32_t mask;
    185 
    186 	rk3328_iomux_calc_iomux_reg(sc, bank, idx, &reg, &mask);
    187 
    188 	WR4(sc, reg, (mask << 16) | __SHIFTIN(mux, mask));
    189 }
    190 
    191 static int
    192 rk3328_iomux_config(struct rk3328_iomux_softc *sc, const int phandle, u_int bank, u_int idx, u_int mux)
    193 {
    194 
    195 	const int bias = fdtbus_pinctrl_parse_bias(phandle, NULL);
    196 	switch (bias) {
    197 	case 0:
    198 		rk3328_iomux_set_bias(sc, bank, idx, GRF_GPIO_P_CTL_Z);
    199 		break;
    200 	case GPIO_PIN_PULLUP:
    201 		rk3328_iomux_set_bias(sc, bank, idx, GRF_GPIO_P_CTL_PULLUP);
    202 		break;
    203 	case GPIO_PIN_PULLDOWN:
    204 		rk3328_iomux_set_bias(sc, bank, idx, GRF_GPIO_P_CTL_PULLDOWN);
    205 		break;
    206 	}
    207 
    208 	const int drv = fdtbus_pinctrl_parse_drive_strength(phandle);
    209 	switch (drv) {
    210 	case -1:
    211 		break;
    212 	case 2:
    213 		rk3328_iomux_set_drive_strength(sc, bank, idx, GRF_GPIO_E_CTL_2MA);
    214 		break;
    215 	case 4:
    216 		rk3328_iomux_set_drive_strength(sc, bank, idx, GRF_GPIO_E_CTL_4MA);
    217 		break;
    218 	case 8:
    219 		rk3328_iomux_set_drive_strength(sc, bank, idx, GRF_GPIO_E_CTL_8MA);
    220 		break;
    221 	case 12:
    222 		rk3328_iomux_set_drive_strength(sc, bank, idx, GRF_GPIO_E_CTL_12MA);
    223 		break;
    224 	default:
    225 		aprint_error_dev(sc->sc_dev, "unsupported drive-strength %u\n", drv);
    226 		return EINVAL;
    227 	}
    228 
    229 #if notyet
    230 	int output_value;
    231 	const int direction =
    232 	    fdtbus_pinctrl_parse_input_output(phandle, &output_value);
    233 	if (direction != -1) {
    234 		rk3328_iomux_set_direction(sc, bank, idx, direction,
    235 		    output_value);
    236 	}
    237 #endif
    238 
    239 	rk3328_iomux_set_mux(sc, bank, idx, mux);
    240 
    241 	return 0;
    242 }
    243 
    244 static int
    245 rk3328_iomux_pinctrl_set_config(device_t dev, const void *data, size_t len)
    246 {
    247 	struct rk3328_iomux_softc * const sc = device_private(dev);
    248 	int pins_len;
    249 
    250 	if (len != 4)
    251 		return -1;
    252 
    253 	const int phandle = fdtbus_get_phandle_from_native(be32dec(data));
    254 	const u_int *pins = fdtbus_get_prop(phandle, "rockchip,pins", &pins_len);
    255 
    256 	while (pins_len >= 16) {
    257 		const u_int bank = be32toh(pins[0]);
    258 		const u_int idx = be32toh(pins[1]);
    259 		const u_int mux = be32toh(pins[2]);
    260 		const int cfg = fdtbus_get_phandle_from_native(be32toh(pins[3]));
    261 
    262 		LOCK(sc);
    263 		rk3328_iomux_config(sc, cfg, bank, idx, mux);
    264 		UNLOCK(sc);
    265 
    266 		pins_len -= 16;
    267 		pins += 4;
    268 	}
    269 
    270 	return 0;
    271 }
    272 
    273 static struct fdtbus_pinctrl_controller_func rk3328_iomux_pinctrl_funcs = {
    274 	.set_config = rk3328_iomux_pinctrl_set_config,
    275 };
    276 
    277 static int
    278 rk3328_iomux_match(device_t parent, cfdata_t cf, void *aux)
    279 {
    280 	struct fdt_attach_args * const faa = aux;
    281 
    282 	return of_match_compat_data(faa->faa_phandle, compat_data);
    283 }
    284 
    285 static void
    286 rk3328_iomux_attach(device_t parent, device_t self, void *aux)
    287 {
    288 	struct rk3328_iomux_softc * const sc = device_private(self);
    289 	struct fdt_attach_args * const faa = aux;
    290 	const int phandle = faa->faa_phandle;
    291 	int child, sub;
    292 
    293 	sc->sc_dev = self;
    294 	sc->sc_syscon = fdtbus_syscon_acquire(phandle, "rockchip,grf");
    295 	if (sc->sc_syscon == NULL) {
    296 		aprint_error(": couldn't acquire grf syscon\n");
    297 		return;
    298 	}
    299 	sc->sc_conf = of_search_compatible(phandle, compat_data)->data;
    300 
    301 	aprint_naive("\n");
    302 	aprint_normal(": RK3328 IOMUX control\n");
    303 
    304 	for (child = OF_child(phandle); child; child = OF_peer(child)) {
    305 		for (sub = OF_child(child); sub; sub = OF_peer(sub)) {
    306 			if (!of_hasprop(sub, "rockchip,pins"))
    307 				continue;
    308 			fdtbus_register_pinctrl_config(self, sub, &rk3328_iomux_pinctrl_funcs);
    309 		}
    310 	}
    311 
    312 	for (child = OF_child(phandle); child; child = OF_peer(child)) {
    313 		struct fdt_attach_args cfaa = *faa;
    314 		cfaa.faa_phandle = child;
    315 		cfaa.faa_name = fdtbus_get_string(child, "name");
    316 		cfaa.faa_quiet = false;
    317 
    318 		config_found(self, &cfaa, NULL);
    319 	}
    320 }
    321