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rk_dwhdmi.c revision 1.1 
      1 /* $NetBSD: rk_dwhdmi.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2019 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: rk_dwhdmi.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/bus.h>
     34 #include <sys/device.h>
     35 #include <sys/intr.h>
     36 #include <sys/systm.h>
     37 #include <sys/kernel.h>
     38 #include <sys/conf.h>
     39 
     40 #include <drm/drmP.h>
     41 
     42 #include <dev/fdt/fdtvar.h>
     43 #include <dev/fdt/fdt_port.h>
     44 #include <dev/fdt/syscon.h>
     45 
     46 #include <dev/ic/dw_hdmi.h>
     47 
     48 #define	RK3399_GRF_SOC_CON20		0x6250
     49 #define	 HDMI_LCDC_SEL			__BIT(6)
     50 
     51 static const struct dwhdmi_mpll_config rk_dwhdmi_mpll_config[] = {
     52 	{ 40000,	0x00b3, 0x0000, 0x0018 },
     53 	{ 65000,	0x0072, 0x0001, 0x0028 },
     54 	{ 66000,	0x013e, 0x0003, 0x0038 },
     55 	{ 83500,	0x0072, 0x0001, 0x0028 },
     56 	{ 146250,	0x0051, 0x0002, 0x0038 },
     57 	{ 148500,	0x0051, 0x0003, 0x0000 },
     58 	{ 272000,	0x0040, 0x0003, 0x0000 },
     59 	{ 340000,	0x0040, 0x0003, 0x0000 },
     60 	{ 0,		0x0051, 0x0003, 0x0000 },
     61 };
     62 
     63 static const struct dwhdmi_phy_config rk_dwhdmi_phy_config[] = {
     64 	{ 74250,	0x8009, 0x0004, 0x0272 },
     65 	{ 148500,	0x802b, 0x0004, 0x028d },
     66 	{ 297000,	0x8039, 0x0005, 0x028d },
     67 	{ 584000,	0x8039, 0x0000, 0x019d },
     68 	{ 0,		0x0000, 0x0000, 0x0000 }
     69 };
     70 
     71 enum {
     72 	DWHDMI_PORT_INPUT = 0,
     73 	DWHDMI_PORT_OUTPUT = 1,
     74 };
     75 
     76 static const char * const compatible[] = {
     77 	"rockchip,rk3399-dw-hdmi",
     78 	NULL
     79 };
     80 
     81 struct rk_dwhdmi_softc {
     82 	struct dwhdmi_softc	sc_base;
     83 	int			sc_phandle;
     84 	struct clk		*sc_clk_vpll;
     85 
     86 	struct fdt_device_ports	sc_ports;
     87 	struct drm_display_mode	sc_curmode;
     88 	struct syscon		*sc_grf;
     89 
     90 	bool			sc_activated;
     91 };
     92 
     93 #define	to_rk_dwhdmi_softc(x)	container_of(x, struct rk_dwhdmi_softc, sc_base)
     94 
     95 static void
     96 rk_dwhdmi_select_input(struct rk_dwhdmi_softc *sc, u_int crtc_index)
     97 {
     98 	const uint32_t write_mask = HDMI_LCDC_SEL << 16;
     99 	const uint32_t write_val = crtc_index == 0 ? HDMI_LCDC_SEL : 0;
    100 
    101 	syscon_lock(sc->sc_grf);
    102 	syscon_write_4(sc->sc_grf, RK3399_GRF_SOC_CON20, write_mask | write_val);
    103 	syscon_unlock(sc->sc_grf);
    104 }
    105 
    106 static int
    107 rk_dwhdmi_ep_activate(device_t dev, struct fdt_endpoint *ep, bool activate)
    108 {
    109 	struct rk_dwhdmi_softc * const sc = device_private(dev);
    110 	struct fdt_endpoint *in_ep = fdt_endpoint_remote(ep);
    111 	struct fdt_endpoint *out_ep, *out_rep;
    112 	struct drm_encoder *encoder;
    113 	struct drm_bridge *bridge;
    114 	int error;
    115 
    116 	if (!activate)
    117 		return EINVAL;
    118 
    119 	if (fdt_endpoint_port_index(ep) != DWHDMI_PORT_INPUT)
    120 		return EINVAL;
    121 
    122 	switch (fdt_endpoint_type(in_ep)) {
    123 	case EP_DRM_ENCODER:
    124 		encoder = fdt_endpoint_get_data(in_ep);
    125 		break;
    126 	case EP_DRM_BRIDGE:
    127 		bridge = fdt_endpoint_get_data(in_ep);
    128 		encoder = bridge->encoder;
    129 		break;
    130 	default:
    131 		encoder = NULL;
    132 		break;
    133 	}
    134 
    135 	if (encoder == NULL)
    136 		return EINVAL;
    137 
    138 	if (sc->sc_activated == false) {
    139 		error = dwhdmi_bind(&sc->sc_base, encoder);
    140 		if (error != 0)
    141 			return error;
    142 		sc->sc_activated = true;
    143 	}
    144 
    145 	out_ep = fdt_endpoint_get_from_index(&sc->sc_ports, DWHDMI_PORT_OUTPUT, 0);
    146 	if (out_ep != NULL) {
    147 		/* Ignore downstream connectors, we have our own. */
    148 		out_rep = fdt_endpoint_remote(out_ep);
    149 		if (out_rep != NULL && fdt_endpoint_type(out_rep) == EP_DRM_CONNECTOR)
    150 			return 0;
    151 
    152 		error = fdt_endpoint_activate(out_ep, activate);
    153 		if (error != 0)
    154 			return error;
    155 	}
    156 
    157 	return 0;
    158 }
    159 
    160 static void *
    161 rk_dwhdmi_ep_get_data(device_t dev, struct fdt_endpoint *ep)
    162 {
    163 	struct rk_dwhdmi_softc * const sc = device_private(dev);
    164 
    165 	return &sc->sc_base.sc_bridge;
    166 }
    167 
    168 static void
    169 rk_dwhdmi_enable(struct dwhdmi_softc *dsc)
    170 {
    171 	struct rk_dwhdmi_softc * const sc = to_rk_dwhdmi_softc(dsc);
    172 
    173 	const u_int crtc_index = drm_crtc_index(dsc->sc_bridge.encoder->crtc);
    174 
    175 	rk_dwhdmi_select_input(sc, crtc_index);
    176 
    177 	dwhdmi_phy_enable(dsc);
    178 }
    179 
    180 static void
    181 rk_dwhdmi_mode_set(struct dwhdmi_softc *dsc,
    182     struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode)
    183 {
    184 	struct rk_dwhdmi_softc * const sc = to_rk_dwhdmi_softc(dsc);
    185 	int error;
    186 
    187 	if (sc->sc_clk_vpll != NULL) {
    188 		error = clk_set_rate(sc->sc_clk_vpll, adjusted_mode->clock * 1000);
    189 		if (error != 0)
    190 			device_printf(dsc->sc_dev, "couldn't set pixel clock to %u Hz: %d\n",
    191 			    adjusted_mode->clock * 1000, error);
    192 	}
    193 
    194 	dwhdmi_phy_mode_set(dsc, mode, adjusted_mode);
    195 }
    196 
    197 static int
    198 rk_dwhdmi_match(device_t parent, cfdata_t cf, void *aux)
    199 {
    200 	struct fdt_attach_args * const faa = aux;
    201 
    202 	return of_match_compatible(faa->faa_phandle, compatible);
    203 }
    204 
    205 static void
    206 rk_dwhdmi_attach(device_t parent, device_t self, void *aux)
    207 {
    208 	struct rk_dwhdmi_softc * const sc = device_private(self);
    209 	struct fdt_attach_args * const faa = aux;
    210 	const int phandle = faa->faa_phandle;
    211 	bus_addr_t addr;
    212 	bus_size_t size;
    213 
    214 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
    215 		aprint_error(": couldn't get registers\n");
    216 		return;
    217 	}
    218 
    219 	/* Required */
    220 	if (fdtbus_clock_enable(phandle, "iahb", true) != 0) {
    221 		aprint_error(": couldn't enable iahb clock\n");
    222 		return;
    223 	}
    224 
    225 	/* Required */
    226 	if (fdtbus_clock_enable(phandle, "isfr", true) != 0) {
    227 		aprint_error(": couldn't enable isfr clock\n");
    228 		return;
    229 	}
    230 
    231 	/* Optional */
    232 	sc->sc_clk_vpll = fdtbus_clock_get(phandle, "vpll");
    233 	if (sc->sc_clk_vpll != NULL && clk_enable(sc->sc_clk_vpll) != 0) {
    234 		aprint_error(": couldn't enable vpll clock\n");
    235 		return;
    236 	}
    237 
    238 	/* Optional */
    239 	if (fdtbus_clock_enable(phandle, "grf", false) != 0) {
    240 		aprint_error(": couldn't enable grf clock\n");
    241 		return;
    242 	}
    243 
    244 	/* Optional */
    245 	if (fdtbus_clock_enable(phandle, "cec", false) != 0) {
    246 		aprint_error(": couldn't enable cec clock\n");
    247 		return;
    248 	}
    249 
    250 	sc->sc_base.sc_dev = self;
    251 	if (of_getprop_uint32(phandle, "reg-io-width", &sc->sc_base.sc_reg_width) != 0)
    252 		sc->sc_base.sc_reg_width = 4;
    253 	sc->sc_base.sc_bst = faa->faa_bst;
    254 	if (bus_space_map(sc->sc_base.sc_bst, addr, size, 0, &sc->sc_base.sc_bsh) != 0) {
    255 		aprint_error(": couldn't map registers\n");
    256 		return;
    257 	}
    258 	sc->sc_phandle = faa->faa_phandle;
    259 	sc->sc_grf = fdtbus_syscon_acquire(phandle, "rockchip,grf");
    260 	if (sc->sc_grf == NULL) {
    261 		aprint_error(": couldn't get grf syscon\n");
    262 		return;
    263 	}
    264 
    265 	aprint_naive("\n");
    266 	aprint_normal(": HDMI TX\n");
    267 
    268 	sc->sc_base.sc_ic = fdtbus_i2c_acquire(phandle, "ddc-i2c-bus");
    269 	if (of_hasprop(phandle, "ddc-i2c-bus") && sc->sc_base.sc_ic == NULL) {
    270 		aprint_error_dev(self, "couldn't find external I2C master\n");
    271 		return;
    272 	}
    273 
    274 	sc->sc_base.sc_flags |= DWHDMI_USE_INTERNAL_PHY;
    275 	sc->sc_base.sc_detect = dwhdmi_phy_detect;
    276 	sc->sc_base.sc_enable = rk_dwhdmi_enable;
    277 	sc->sc_base.sc_disable = dwhdmi_phy_disable;
    278 	sc->sc_base.sc_mode_set = rk_dwhdmi_mode_set;
    279 	sc->sc_base.sc_mpll_config = rk_dwhdmi_mpll_config;
    280 	sc->sc_base.sc_phy_config = rk_dwhdmi_phy_config;
    281 
    282 	if (dwhdmi_attach(&sc->sc_base) != 0) {
    283 		aprint_error_dev(self, "failed to attach driver\n");
    284 		return;
    285 	}
    286 
    287 	sc->sc_ports.dp_ep_activate = rk_dwhdmi_ep_activate;
    288 	sc->sc_ports.dp_ep_get_data = rk_dwhdmi_ep_get_data;
    289 	fdt_ports_register(&sc->sc_ports, self, phandle, EP_DRM_BRIDGE);
    290 }
    291 
    292 CFATTACH_DECL_NEW(rk_dwhdmi, sizeof(struct rk_dwhdmi_softc),
    293 	rk_dwhdmi_match, rk_dwhdmi_attach, NULL, NULL);
    294