rk_usb.c revision 1.8 1 1.8 thorpej /* $NetBSD: rk_usb.c,v 1.8 2021/01/18 02:35:49 thorpej Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2018 Jared McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #include <sys/cdefs.h>
30 1.1 jmcneill
31 1.8 thorpej __KERNEL_RCSID(0, "$NetBSD: rk_usb.c,v 1.8 2021/01/18 02:35:49 thorpej Exp $");
32 1.1 jmcneill
33 1.1 jmcneill #include <sys/param.h>
34 1.1 jmcneill #include <sys/bus.h>
35 1.1 jmcneill #include <sys/device.h>
36 1.1 jmcneill #include <sys/intr.h>
37 1.1 jmcneill #include <sys/systm.h>
38 1.1 jmcneill #include <sys/time.h>
39 1.1 jmcneill #include <sys/kmem.h>
40 1.1 jmcneill
41 1.1 jmcneill #include <dev/clk/clk_backend.h>
42 1.1 jmcneill
43 1.1 jmcneill #include <dev/fdt/fdtvar.h>
44 1.3 jmcneill #include <dev/fdt/syscon.h>
45 1.1 jmcneill
46 1.1 jmcneill static int rk_usb_match(device_t, cfdata_t, void *);
47 1.1 jmcneill static void rk_usb_attach(device_t, device_t, void *);
48 1.1 jmcneill
49 1.4 jmcneill #define RK3328_CON0_REG 0x100
50 1.4 jmcneill #define RK3328_CON1_REG 0x104
51 1.4 jmcneill #define RK3328_CON2_REG 0x108
52 1.4 jmcneill #define RK3328_USBPHY_COMMONONN __BIT(4)
53 1.4 jmcneill
54 1.4 jmcneill #define RK3399_GRF_USB20_PHY0_CON0_REG 0x0e450
55 1.4 jmcneill #define RK3399_GRF_USB20_PHY1_CON0_REG 0x0e460
56 1.4 jmcneill #define RK3399_USBPHY_COMMONONN __BIT(4)
57 1.4 jmcneill #define RK3399_GRF_USB20_PHY0_CON1_REG 0x0e454
58 1.4 jmcneill #define RK3399_GRF_USB20_PHY1_CON1_REG 0x0e464
59 1.4 jmcneill #define RK3399_GRF_USB20_PHY0_CON2_REG 0x0e458
60 1.4 jmcneill #define RK3399_GRF_USB20_PHY1_CON2_REG 0x0e468
61 1.4 jmcneill #define RK3399_USBPHY_SUSPEND_N __BIT(1)
62 1.4 jmcneill #define RK3399_USBPHY_UTMI_SEL __BIT(0)
63 1.4 jmcneill
64 1.4 jmcneill #define RK3399_PHY_NO(_sc) ((_sc)->sc_reg == 0xe450 ? 0 : 1)
65 1.1 jmcneill
66 1.1 jmcneill enum rk_usb_type {
67 1.1 jmcneill USB_RK3328 = 1,
68 1.4 jmcneill USB_RK3399,
69 1.1 jmcneill };
70 1.1 jmcneill
71 1.8 thorpej static const struct device_compatible_entry compat_data[] = {
72 1.8 thorpej { .compat = "rockchip,rk3328-usb2phy", .value = USB_RK3328 },
73 1.8 thorpej { .compat = "rockchip,rk3399-usb2phy", .value = USB_RK3399 },
74 1.8 thorpej
75 1.8 thorpej { 0 }
76 1.1 jmcneill };
77 1.1 jmcneill
78 1.1 jmcneill struct rk_usb_clk {
79 1.1 jmcneill struct clk base;
80 1.1 jmcneill };
81 1.1 jmcneill
82 1.1 jmcneill struct rk_usb_softc {
83 1.1 jmcneill device_t sc_dev;
84 1.3 jmcneill struct syscon *sc_syscon;
85 1.1 jmcneill enum rk_usb_type sc_type;
86 1.1 jmcneill
87 1.1 jmcneill struct clk_domain sc_clkdom;
88 1.1 jmcneill struct rk_usb_clk sc_usbclk;
89 1.4 jmcneill
90 1.4 jmcneill bus_addr_t sc_reg;
91 1.1 jmcneill };
92 1.1 jmcneill
93 1.1 jmcneill CFATTACH_DECL_NEW(rk_usb, sizeof(struct rk_usb_softc),
94 1.1 jmcneill rk_usb_match, rk_usb_attach, NULL, NULL);
95 1.1 jmcneill
96 1.1 jmcneill static struct clk *
97 1.1 jmcneill rk_usb_clk_get(void *priv, const char *name)
98 1.1 jmcneill {
99 1.1 jmcneill struct rk_usb_softc * const sc = priv;
100 1.1 jmcneill
101 1.1 jmcneill if (strcmp(name, sc->sc_usbclk.base.name) != 0)
102 1.1 jmcneill return NULL;
103 1.1 jmcneill
104 1.1 jmcneill return &sc->sc_usbclk.base;
105 1.1 jmcneill }
106 1.1 jmcneill
107 1.1 jmcneill static void
108 1.1 jmcneill rk_usb_clk_put(void *priv, struct clk *clk)
109 1.1 jmcneill {
110 1.1 jmcneill }
111 1.1 jmcneill
112 1.1 jmcneill static u_int
113 1.1 jmcneill rk_usb_clk_get_rate(void *priv, struct clk *clk)
114 1.1 jmcneill {
115 1.1 jmcneill return 480000000;
116 1.1 jmcneill }
117 1.1 jmcneill
118 1.1 jmcneill static int
119 1.1 jmcneill rk_usb_clk_enable(void *priv, struct clk *clk)
120 1.1 jmcneill {
121 1.1 jmcneill struct rk_usb_softc * const sc = priv;
122 1.4 jmcneill uint32_t reg, write_mask, write_val;
123 1.1 jmcneill
124 1.4 jmcneill switch (sc->sc_type) {
125 1.4 jmcneill case USB_RK3328:
126 1.4 jmcneill reg = RK3328_CON2_REG;
127 1.4 jmcneill write_mask = RK3328_USBPHY_COMMONONN << 16;
128 1.4 jmcneill write_val = 0;
129 1.4 jmcneill break;
130 1.4 jmcneill case USB_RK3399:
131 1.4 jmcneill reg = RK3399_PHY_NO(sc) == 0 ?
132 1.4 jmcneill RK3399_GRF_USB20_PHY0_CON0_REG :
133 1.4 jmcneill RK3399_GRF_USB20_PHY1_CON0_REG;
134 1.4 jmcneill write_mask = RK3399_USBPHY_COMMONONN << 16;
135 1.4 jmcneill write_val = 0;
136 1.4 jmcneill break;
137 1.4 jmcneill default:
138 1.4 jmcneill return ENXIO;
139 1.4 jmcneill }
140 1.3 jmcneill
141 1.3 jmcneill syscon_lock(sc->sc_syscon);
142 1.4 jmcneill syscon_write_4(sc->sc_syscon, reg, write_mask | write_val);
143 1.3 jmcneill syscon_unlock(sc->sc_syscon);
144 1.1 jmcneill
145 1.1 jmcneill return 0;
146 1.1 jmcneill }
147 1.1 jmcneill
148 1.1 jmcneill static int
149 1.1 jmcneill rk_usb_clk_disable(void *priv, struct clk *clk)
150 1.1 jmcneill {
151 1.1 jmcneill struct rk_usb_softc * const sc = priv;
152 1.4 jmcneill uint32_t reg, write_mask, write_val;
153 1.1 jmcneill
154 1.4 jmcneill switch (sc->sc_type) {
155 1.4 jmcneill case USB_RK3328:
156 1.4 jmcneill reg = RK3328_CON2_REG;
157 1.4 jmcneill write_mask = RK3328_USBPHY_COMMONONN << 16;
158 1.4 jmcneill write_val = RK3328_USBPHY_COMMONONN;
159 1.4 jmcneill break;
160 1.4 jmcneill case USB_RK3399:
161 1.4 jmcneill reg = RK3399_PHY_NO(sc) == 0 ?
162 1.4 jmcneill RK3399_GRF_USB20_PHY0_CON0_REG :
163 1.4 jmcneill RK3399_GRF_USB20_PHY1_CON0_REG;
164 1.4 jmcneill write_mask = RK3399_USBPHY_COMMONONN << 16;
165 1.4 jmcneill write_val = RK3399_USBPHY_COMMONONN;
166 1.4 jmcneill break;
167 1.4 jmcneill default:
168 1.4 jmcneill return ENXIO;
169 1.4 jmcneill }
170 1.3 jmcneill
171 1.3 jmcneill syscon_lock(sc->sc_syscon);
172 1.4 jmcneill syscon_write_4(sc->sc_syscon, reg, write_mask | write_val);
173 1.3 jmcneill syscon_unlock(sc->sc_syscon);
174 1.1 jmcneill
175 1.1 jmcneill return 0;
176 1.1 jmcneill }
177 1.1 jmcneill
178 1.1 jmcneill static const struct clk_funcs rk_usb_clk_funcs = {
179 1.1 jmcneill .get = rk_usb_clk_get,
180 1.1 jmcneill .put = rk_usb_clk_put,
181 1.1 jmcneill .get_rate = rk_usb_clk_get_rate,
182 1.1 jmcneill .enable = rk_usb_clk_enable,
183 1.1 jmcneill .disable = rk_usb_clk_disable,
184 1.1 jmcneill };
185 1.1 jmcneill
186 1.1 jmcneill static struct clk *
187 1.7 aymeric rk_usb_fdt_decode(device_t dev, int cc_phandle, const void *data, size_t len)
188 1.1 jmcneill {
189 1.1 jmcneill struct rk_usb_softc * const sc = device_private(dev);
190 1.1 jmcneill
191 1.1 jmcneill if (len != 0)
192 1.1 jmcneill return NULL;
193 1.1 jmcneill
194 1.1 jmcneill return &sc->sc_usbclk.base;
195 1.1 jmcneill }
196 1.1 jmcneill
197 1.1 jmcneill static const struct fdtbus_clock_controller_func rk_usb_fdt_funcs = {
198 1.1 jmcneill .decode = rk_usb_fdt_decode
199 1.1 jmcneill };
200 1.1 jmcneill
201 1.1 jmcneill static int
202 1.1 jmcneill rk_usb_match(device_t parent, cfdata_t cf, void *aux)
203 1.1 jmcneill {
204 1.1 jmcneill struct fdt_attach_args * const faa = aux;
205 1.1 jmcneill
206 1.1 jmcneill return of_match_compat_data(faa->faa_phandle, compat_data);
207 1.1 jmcneill }
208 1.1 jmcneill
209 1.1 jmcneill static void
210 1.1 jmcneill rk_usb_attach(device_t parent, device_t self, void *aux)
211 1.1 jmcneill {
212 1.1 jmcneill struct rk_usb_softc * const sc = device_private(self);
213 1.1 jmcneill struct fdt_attach_args * const faa = aux;
214 1.1 jmcneill const int phandle = faa->faa_phandle;
215 1.4 jmcneill struct clk *clk;
216 1.1 jmcneill int child;
217 1.1 jmcneill
218 1.4 jmcneill /* Cache the base address of this PHY so we know which instance we are */
219 1.4 jmcneill if (fdtbus_get_reg(phandle, 0, &sc->sc_reg, NULL) != 0) {
220 1.4 jmcneill aprint_error(": couldn't get registers\n");
221 1.4 jmcneill return;
222 1.4 jmcneill }
223 1.4 jmcneill
224 1.4 jmcneill clk = fdtbus_clock_get(phandle, "phyclk");
225 1.4 jmcneill if (clk && clk_enable(clk) != 0) {
226 1.4 jmcneill aprint_error(": couldn't enable phy clock\n");
227 1.4 jmcneill return;
228 1.4 jmcneill }
229 1.4 jmcneill
230 1.1 jmcneill sc->sc_dev = self;
231 1.8 thorpej sc->sc_type = of_search_compatible(phandle, compat_data)->value;
232 1.3 jmcneill sc->sc_syscon = fdtbus_syscon_lookup(OF_parent(phandle));
233 1.3 jmcneill if (sc->sc_syscon == NULL) {
234 1.3 jmcneill aprint_error(": couldn't get grf syscon\n");
235 1.1 jmcneill return;
236 1.1 jmcneill }
237 1.1 jmcneill
238 1.1 jmcneill const char *clkname = fdtbus_get_string(phandle, "clock-output-names");
239 1.1 jmcneill if (clkname == NULL)
240 1.1 jmcneill clkname = faa->faa_name;
241 1.1 jmcneill
242 1.1 jmcneill sc->sc_clkdom.name = device_xname(self);
243 1.1 jmcneill sc->sc_clkdom.funcs = &rk_usb_clk_funcs;
244 1.1 jmcneill sc->sc_clkdom.priv = sc;
245 1.1 jmcneill sc->sc_usbclk.base.domain = &sc->sc_clkdom;
246 1.1 jmcneill sc->sc_usbclk.base.name = kmem_asprintf("%s", clkname);
247 1.1 jmcneill clk_attach(&sc->sc_usbclk.base);
248 1.1 jmcneill
249 1.1 jmcneill aprint_naive("\n");
250 1.1 jmcneill aprint_normal(": USB2 PHY\n");
251 1.1 jmcneill
252 1.1 jmcneill fdtbus_register_clock_controller(self, phandle, &rk_usb_fdt_funcs);
253 1.1 jmcneill
254 1.1 jmcneill for (child = OF_child(phandle); child; child = OF_peer(child)) {
255 1.1 jmcneill if (!fdtbus_status_okay(child))
256 1.1 jmcneill continue;
257 1.1 jmcneill
258 1.1 jmcneill struct fdt_attach_args cfaa = *faa;
259 1.1 jmcneill cfaa.faa_phandle = child;
260 1.1 jmcneill cfaa.faa_name = fdtbus_get_string(child, "name");
261 1.1 jmcneill cfaa.faa_quiet = false;
262 1.1 jmcneill
263 1.1 jmcneill config_found(self, &cfaa, NULL);
264 1.1 jmcneill }
265 1.1 jmcneill }
266 1.1 jmcneill
267 1.1 jmcneill /*
268 1.1 jmcneill * USB PHY
269 1.1 jmcneill */
270 1.1 jmcneill
271 1.1 jmcneill static int rk_usbphy_match(device_t, cfdata_t, void *);
272 1.1 jmcneill static void rk_usbphy_attach(device_t, device_t, void *);
273 1.1 jmcneill
274 1.1 jmcneill struct rk_usbphy_softc {
275 1.1 jmcneill device_t sc_dev;
276 1.1 jmcneill int sc_phandle;
277 1.4 jmcneill struct fdtbus_regulator *sc_supply;
278 1.1 jmcneill };
279 1.1 jmcneill
280 1.1 jmcneill CFATTACH_DECL_NEW(rk_usbphy, sizeof(struct rk_usbphy_softc),
281 1.1 jmcneill rk_usbphy_match, rk_usbphy_attach, NULL, NULL);
282 1.1 jmcneill
283 1.1 jmcneill static void *
284 1.1 jmcneill rk_usbphy_acquire(device_t dev, const void *data, size_t len)
285 1.1 jmcneill {
286 1.1 jmcneill struct rk_usbphy_softc * const sc = device_private(dev);
287 1.1 jmcneill
288 1.1 jmcneill if (len != 0)
289 1.1 jmcneill return NULL;
290 1.1 jmcneill
291 1.1 jmcneill return sc;
292 1.1 jmcneill }
293 1.1 jmcneill
294 1.1 jmcneill static void
295 1.1 jmcneill rk_usbphy_release(device_t dev, void *priv)
296 1.1 jmcneill {
297 1.1 jmcneill }
298 1.1 jmcneill
299 1.1 jmcneill static int
300 1.1 jmcneill rk_usbphy_otg_enable(device_t dev, void *priv, bool enable)
301 1.1 jmcneill {
302 1.4 jmcneill struct rk_usbphy_softc * const sc = device_private(dev);
303 1.1 jmcneill struct rk_usb_softc * const usb_sc = device_private(device_parent(dev));
304 1.4 jmcneill uint32_t reg, write_mask, write_val;
305 1.4 jmcneill int error;
306 1.1 jmcneill
307 1.4 jmcneill switch (usb_sc->sc_type) {
308 1.4 jmcneill case USB_RK3328:
309 1.4 jmcneill reg = RK3328_CON0_REG;
310 1.4 jmcneill write_mask = 0x1ffU << 16;
311 1.4 jmcneill write_val = enable ? 0 : 0x1d1;
312 1.4 jmcneill break;
313 1.4 jmcneill case USB_RK3399:
314 1.4 jmcneill reg = RK3399_PHY_NO(usb_sc) == 0 ?
315 1.4 jmcneill RK3399_GRF_USB20_PHY0_CON1_REG :
316 1.4 jmcneill RK3399_GRF_USB20_PHY1_CON1_REG;
317 1.4 jmcneill write_mask = (RK3399_USBPHY_SUSPEND_N|RK3399_USBPHY_UTMI_SEL) << 16;
318 1.6 jmcneill write_val = enable ? 0 : RK3399_USBPHY_UTMI_SEL;
319 1.4 jmcneill break;
320 1.4 jmcneill default:
321 1.4 jmcneill return ENXIO;
322 1.4 jmcneill }
323 1.4 jmcneill
324 1.4 jmcneill if (sc->sc_supply) {
325 1.4 jmcneill error = enable ? fdtbus_regulator_enable(sc->sc_supply) :
326 1.4 jmcneill fdtbus_regulator_disable(sc->sc_supply);
327 1.4 jmcneill if (error != 0)
328 1.4 jmcneill return error;
329 1.4 jmcneill }
330 1.3 jmcneill
331 1.3 jmcneill syscon_lock(usb_sc->sc_syscon);
332 1.4 jmcneill syscon_write_4(usb_sc->sc_syscon, reg, write_mask | write_val);
333 1.3 jmcneill syscon_unlock(usb_sc->sc_syscon);
334 1.1 jmcneill
335 1.1 jmcneill return 0;
336 1.1 jmcneill }
337 1.1 jmcneill
338 1.1 jmcneill static int
339 1.1 jmcneill rk_usbphy_host_enable(device_t dev, void *priv, bool enable)
340 1.1 jmcneill {
341 1.4 jmcneill struct rk_usbphy_softc * const sc = device_private(dev);
342 1.1 jmcneill struct rk_usb_softc * const usb_sc = device_private(device_parent(dev));
343 1.4 jmcneill uint32_t reg, write_mask, write_val;
344 1.4 jmcneill int error;
345 1.1 jmcneill
346 1.4 jmcneill switch (usb_sc->sc_type) {
347 1.4 jmcneill case USB_RK3328:
348 1.4 jmcneill reg = RK3328_CON1_REG;
349 1.4 jmcneill write_mask = 0x1ffU << 16;
350 1.4 jmcneill write_val = enable ? 0 : 0x1d1;
351 1.4 jmcneill break;
352 1.4 jmcneill case USB_RK3399:
353 1.4 jmcneill reg = RK3399_PHY_NO(usb_sc) == 0 ?
354 1.4 jmcneill RK3399_GRF_USB20_PHY0_CON2_REG :
355 1.4 jmcneill RK3399_GRF_USB20_PHY1_CON2_REG;
356 1.4 jmcneill write_mask = (RK3399_USBPHY_SUSPEND_N|RK3399_USBPHY_UTMI_SEL) << 16;
357 1.6 jmcneill write_val = enable ? 0 : RK3399_USBPHY_UTMI_SEL;
358 1.4 jmcneill break;
359 1.4 jmcneill default:
360 1.4 jmcneill return ENXIO;
361 1.4 jmcneill }
362 1.4 jmcneill
363 1.4 jmcneill if (sc->sc_supply) {
364 1.4 jmcneill error = enable ? fdtbus_regulator_enable(sc->sc_supply) :
365 1.4 jmcneill fdtbus_regulator_disable(sc->sc_supply);
366 1.4 jmcneill if (error != 0)
367 1.4 jmcneill return error;
368 1.4 jmcneill }
369 1.3 jmcneill
370 1.3 jmcneill syscon_lock(usb_sc->sc_syscon);
371 1.4 jmcneill syscon_write_4(usb_sc->sc_syscon, reg, write_mask | write_val);
372 1.3 jmcneill syscon_unlock(usb_sc->sc_syscon);
373 1.1 jmcneill
374 1.1 jmcneill return 0;
375 1.1 jmcneill }
376 1.1 jmcneill
377 1.1 jmcneill const struct fdtbus_phy_controller_func rk_usbphy_otg_funcs = {
378 1.1 jmcneill .acquire = rk_usbphy_acquire,
379 1.1 jmcneill .release = rk_usbphy_release,
380 1.1 jmcneill .enable = rk_usbphy_otg_enable,
381 1.1 jmcneill };
382 1.1 jmcneill
383 1.1 jmcneill const struct fdtbus_phy_controller_func rk_usbphy_host_funcs = {
384 1.1 jmcneill .acquire = rk_usbphy_acquire,
385 1.1 jmcneill .release = rk_usbphy_release,
386 1.1 jmcneill .enable = rk_usbphy_host_enable,
387 1.1 jmcneill };
388 1.1 jmcneill
389 1.1 jmcneill static int
390 1.1 jmcneill rk_usbphy_match(device_t parent, cfdata_t cf, void *aux)
391 1.1 jmcneill {
392 1.1 jmcneill struct fdt_attach_args * const faa = aux;
393 1.1 jmcneill const int phandle = faa->faa_phandle;
394 1.1 jmcneill const char *name = fdtbus_get_string(phandle, "name");
395 1.1 jmcneill
396 1.1 jmcneill if (strcmp(name, "otg-port") == 0 || strcmp(name, "host-port") == 0)
397 1.1 jmcneill return 1;
398 1.1 jmcneill
399 1.1 jmcneill return 0;
400 1.1 jmcneill }
401 1.1 jmcneill
402 1.1 jmcneill static void
403 1.1 jmcneill rk_usbphy_attach(device_t parent, device_t self, void *aux)
404 1.1 jmcneill {
405 1.1 jmcneill struct rk_usbphy_softc * const sc = device_private(self);
406 1.1 jmcneill struct fdt_attach_args * const faa = aux;
407 1.1 jmcneill const int phandle = faa->faa_phandle;
408 1.1 jmcneill const char *name = fdtbus_get_string(phandle, "name");
409 1.1 jmcneill
410 1.1 jmcneill sc->sc_dev = self;
411 1.1 jmcneill sc->sc_phandle = phandle;
412 1.4 jmcneill if (of_hasprop(phandle, "phy-supply")) {
413 1.4 jmcneill sc->sc_supply = fdtbus_regulator_acquire(phandle, "phy-supply");
414 1.4 jmcneill if (sc->sc_supply == NULL) {
415 1.4 jmcneill aprint_error(": couldn't acquire regulator\n");
416 1.4 jmcneill return;
417 1.4 jmcneill }
418 1.4 jmcneill }
419 1.1 jmcneill
420 1.1 jmcneill aprint_naive("\n");
421 1.1 jmcneill
422 1.1 jmcneill if (strcmp(name, "otg-port") == 0) {
423 1.1 jmcneill aprint_normal(": USB2 OTG port\n");
424 1.1 jmcneill fdtbus_register_phy_controller(self, phandle, &rk_usbphy_otg_funcs);
425 1.1 jmcneill } else if (strcmp(name, "host-port") == 0) {
426 1.1 jmcneill aprint_normal(": USB2 host port\n");
427 1.1 jmcneill fdtbus_register_phy_controller(self, phandle, &rk_usbphy_host_funcs);
428 1.1 jmcneill }
429 1.1 jmcneill }
430