s3c2440_i2s.h revision 1.1 1 1.1 nisimura /*-
2 1.1 nisimura * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 1.1 nisimura * All rights reserved.
4 1.1 nisimura *
5 1.1 nisimura * This code is derived from software contributed to The NetBSD Foundation
6 1.1 nisimura * by Paul Fleischer <paul (at) xpg.dk>
7 1.1 nisimura *
8 1.1 nisimura * Redistribution and use in source and binary forms, with or without
9 1.1 nisimura * modification, are permitted provided that the following conditions
10 1.1 nisimura * are met:
11 1.1 nisimura * 1. Redistributions of source code must retain the above copyright
12 1.1 nisimura * notice, this list of conditions and the following disclaimer.
13 1.1 nisimura * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 nisimura * notice, this list of conditions and the following disclaimer in the
15 1.1 nisimura * documentation and/or other materials provided with the distribution.
16 1.1 nisimura *
17 1.1 nisimura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.1 nisimura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 nisimura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 nisimura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.1 nisimura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 nisimura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 nisimura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 nisimura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 nisimura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 nisimura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 nisimura * POSSIBILITY OF SUCH DAMAGE.
28 1.1 nisimura */
29 1.1 nisimura #ifndef _S3C2440_I2S_H_
30 1.1 nisimura #define _S3C2440_I2S_H_
31 1.1 nisimura
32 1.1 nisimura struct s3c2440_i2s_attach_args {
33 1.1 nisimura void *i2sa_handle; /* Handle of the S3C2440 I2S Controller */
34 1.1 nisimura };
35 1.1 nisimura
36 1.1 nisimura /* It should be possible to allocate most buffer sizes within
37 1.1 nisimura 2 segments.
38 1.1 nisimura However, worst case actually is PHYSMEM / PAGE_SIZE, which seems to
39 1.1 nisimura be 65535/4096 = 16 as default for most architectures.
40 1.1 nisimura This does seem like a too pesimistic number.
41 1.1 nisimura */
42 1.1 nisimura #define S3C2440_I2S_BUF_MAX_SEGS 2
43 1.1 nisimura
44 1.1 nisimura struct s3c2440_i2s_buf {
45 1.1 nisimura void *i2b_parent; /* I2S handle */
46 1.1 nisimura
47 1.1 nisimura /* Size of the buffer */
48 1.1 nisimura int i2b_size;
49 1.1 nisimura
50 1.1 nisimura /* Kernelspace virtual address of the buffer */
51 1.1 nisimura void *i2b_addr;
52 1.1 nisimura
53 1.1 nisimura /* Physical segments holding the buffer */
54 1.1 nisimura bus_dma_segment_t i2b_segs[S3C2440_I2S_BUF_MAX_SEGS];
55 1.1 nisimura
56 1.1 nisimura /* Number of segments in use */
57 1.1 nisimura int i2b_nsegs;
58 1.1 nisimura
59 1.1 nisimura /* Map used for transfers DMA transfers */
60 1.1 nisimura bus_dmamap_t i2b_dmamap;
61 1.1 nisimura
62 1.1 nisimura /* DMA transfer structure */
63 1.1 nisimura dmac_xfer_t i2b_xfer;
64 1.1 nisimura
65 1.1 nisimura /* Callback */
66 1.1 nisimura void (*i2b_cb)(void*);
67 1.1 nisimura void *i2b_cb_cookie;
68 1.1 nisimura };
69 1.1 nisimura
70 1.1 nisimura typedef struct s3c2440_i2s_buf* s3c2440_i2s_buf_t;
71 1.1 nisimura
72 1.1 nisimura
73 1.1 nisimura void s3c2440_i2s_set_intr_lock(void *handle, kmutex_t *sc_intr_lock);
74 1.1 nisimura
75 1.1 nisimura #define S3C2440_I2S_NONE (0)
76 1.1 nisimura #define S3C2440_I2S_TRANSMIT (1<<0)
77 1.1 nisimura #define S3C2440_I2S_RECEIVE (1<<1)
78 1.1 nisimura #define S3C2440_I2S_BOTH (S3C2440_I2S_TRANSMIT | S3C2440_I2S_RECEIVE)
79 1.1 nisimura /* Set transfer direction of the I2S bus */
80 1.1 nisimura void s3c2440_i2s_set_direction(void *handle, int direction);
81 1.1 nisimura
82 1.1 nisimura /* Set the I2S clocks (master and serial) from the given sample rate */
83 1.1 nisimura void s3c2440_i2s_set_sample_rate(void *handle, int sample_rate);
84 1.1 nisimura void s3c2440_i2s_set_sample_width(void *handle, int width);
85 1.1 nisimura
86 1.1 nisimura #define S3C2440_I2S_BUS_MSB 1
87 1.1 nisimura #define S3C2440_I2S_BUS_I2S 2
88 1.1 nisimura void s3c2440_i2s_set_bus_format(void *handle, int format);
89 1.1 nisimura
90 1.1 nisimura /* Enable the I2S bus */
91 1.1 nisimura int s3c2440_i2s_commit(void *handle);
92 1.1 nisimura
93 1.1 nisimura /* Disable the I2S bus */
94 1.1 nisimura int s3c2440_i2s_disable(void *handle);
95 1.1 nisimura
96 1.1 nisimura int s3c2440_i2s_get_master_clock(void *handle);
97 1.1 nisimura int s3c2440_i2s_get_serial_clock(void *handle);
98 1.1 nisimura
99 1.1 nisimura /* Allocate a I2S buffer. */
100 1.1 nisimura int s3c2440_i2s_alloc(void *, int, size_t, int, s3c2440_i2s_buf_t *);
101 1.1 nisimura
102 1.1 nisimura /* Free an I2S buffer. */
103 1.1 nisimura void s3c2440_i2s_free(s3c2440_i2s_buf_t);
104 1.1 nisimura
105 1.1 nisimura /* Write data (from the I2S buffer) onto the I2S bus */
106 1.1 nisimura int s3c2440_i2s_output(s3c2440_i2s_buf_t, void *, int, void (*)(void*), void*);
107 1.1 nisimura int s3c2440_i2s_input(s3c2440_i2s_buf_t, void *, int, void (*)(void*), void*);
108 1.1 nisimura
109 1.1 nisimura int s3c2440_i2s_halt_output(s3c2440_i2s_buf_t);
110 1.1 nisimura
111 1.1 nisimura #endif
112 1.1 nisimura
113