s3c2440_rtc.c revision 1.4
1 /* $NetBSD: s3c2440_rtc.c,v 1.4 2025/09/07 04:46:59 thorpej Exp $ */ 2 3 /*-- 4 * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Fleischer <paul (at) xpg.dk> 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 #include <sys/types.h> 34 #include <sys/param.h> 35 #include <sys/device.h> 36 #include <sys/bus.h> 37 #include <sys/time.h> 38 39 #include <dev/clock_subr.h> 40 41 #include <arm/s3c2xx0/s3c24x0var.h> 42 #include <arm/s3c2xx0/s3c2440var.h> 43 #include <arm/s3c2xx0/s3c2440reg.h> 44 45 #ifdef SSRTC_DEBUG 46 #define DPRINTF(s) do { printf s; } while (/*CONSTCOND*/0) 47 #else 48 #define DPRINTF(s) do {} while (/*CONSTCOND*/0) 49 #endif 50 51 /* As the RTC keeps track of Leap years, we need to use the right zero-year */ 52 #define SSRTC_YEAR_ZERO 2000 53 54 struct ssrtc_softc { 55 device_t sc_dev; 56 bus_space_tag_t sc_iot; 57 bus_space_handle_t sc_ioh; 58 struct todr_chip_handle sc_todr; 59 }; 60 61 static int ssrtc_match(device_t, cfdata_t, void *); 62 static void ssrtc_attach(device_t, device_t, void *); 63 64 CFATTACH_DECL_NEW(ssrtc, sizeof(struct ssrtc_softc), 65 ssrtc_match, ssrtc_attach, NULL, NULL); 66 67 static int ssrtc_todr_gettime_ymdhms(struct todr_chip_handle *, 68 struct clock_ymdhms *); 69 static int ssrtc_todr_settime_ymdhms(struct todr_chip_handle *, 70 struct clock_ymdhms *); 71 72 static int 73 ssrtc_match(device_t parent, cfdata_t cf, void *aux) 74 { 75 return 1; 76 } 77 78 static void 79 ssrtc_attach(device_t parent, device_t self, void *aux) 80 { 81 struct ssrtc_softc *sc = device_private(self); 82 struct s3c2xx0_attach_args *sa = aux; 83 84 sc->sc_dev = self; 85 sc->sc_iot = sa->sa_iot; 86 87 if (bus_space_map(sc->sc_iot, S3C2440_RTC_BASE, 88 S3C2440_RTC_SIZE, 0, &sc->sc_ioh)) { 89 aprint_error(": failed to map registers"); 90 return; 91 } 92 aprint_normal(": RTC \n"); 93 94 sc->sc_todr.cookie = sc; 95 sc->sc_todr.todr_gettime_ymdhms = ssrtc_todr_gettime_ymdhms; 96 sc->sc_todr.todr_settime_ymdhms = ssrtc_todr_settime_ymdhms; 97 98 todr_attach(&sc->sc_todr); 99 } 100 101 static int 102 ssrtc_todr_gettime_ymdhms(struct todr_chip_handle *h, struct clock_ymdhms *dt) 103 { 104 struct ssrtc_softc *sc = h->cookie; 105 uint8_t reg; 106 107 reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, RTC_BCDSEC); 108 DPRINTF(("BCDSEC: %02X\n", reg)); 109 dt->dt_sec = bcdtobin(reg); 110 111 reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, RTC_BCDMIN); 112 DPRINTF(("BCDMIN: %02X\n", reg)); 113 dt->dt_min = bcdtobin(reg); 114 115 reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, RTC_BCDHOUR); 116 DPRINTF(("BCDHOUR: %02X\n", reg)); 117 dt->dt_hour = bcdtobin(reg); 118 119 reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, RTC_BCDDATE); 120 DPRINTF(("BCDDATE: %02X\n", reg)); 121 dt->dt_day = bcdtobin(reg); 122 123 reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, RTC_BCDDAY); 124 DPRINTF(("BCDDAY: %02X\n", reg)); 125 dt->dt_wday = bcdtobin(reg); 126 127 reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, RTC_BCDMON); 128 DPRINTF(("BCDMON: %02X\n", reg)); 129 dt->dt_mon = bcdtobin(reg); 130 131 reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, RTC_BCDYEAR); 132 DPRINTF(("BCDYEAR: %02X\n", reg)); 133 dt->dt_year = SSRTC_YEAR_ZERO + bcdtobin(reg); 134 135 DPRINTF(("Seconds: %d\n", dt->dt_sec)); 136 DPRINTF(("Minutes: %d\n", dt->dt_min)); 137 DPRINTF(("Hour: %d\n", dt->dt_hour)); 138 DPRINTF(("Mon: %d\n", dt->dt_mon)); 139 DPRINTF(("Date: %d\n", dt->dt_day)); 140 DPRINTF(("Day: %d\n", dt->dt_wday)); 141 DPRINTF(("Year: %d\n", dt->dt_year)); 142 143 return 0; 144 } 145 146 static int 147 ssrtc_todr_settime_ymdhms(struct todr_chip_handle *h, struct clock_ymdhms *dt) 148 { 149 struct ssrtc_softc *sc = h->cookie; 150 uint8_t reg; 151 152 DPRINTF(("ssrtc_todr_settime")); 153 154 /* Set RTCEN */ 155 reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, RTC_RTCCON); 156 bus_space_write_1(sc->sc_iot, sc->sc_ioh, RTC_RTCCON, reg | RTCCON_RTCEN); 157 158 bus_space_write_1(sc->sc_iot, sc->sc_ioh, RTC_BCDSEC, bintobcd(dt->dt_sec)); 159 bus_space_write_1(sc->sc_iot, sc->sc_ioh, RTC_BCDMIN, bintobcd(dt->dt_min)); 160 bus_space_write_1(sc->sc_iot, sc->sc_ioh, RTC_BCDHOUR, bintobcd(dt->dt_hour)); 161 bus_space_write_1(sc->sc_iot, sc->sc_ioh, RTC_BCDDATE, bintobcd(dt->dt_day)); 162 bus_space_write_1(sc->sc_iot, sc->sc_ioh, RTC_BCDDAY, bintobcd(dt->dt_wday)); 163 bus_space_write_1(sc->sc_iot, sc->sc_ioh, RTC_BCDMON, bintobcd(dt->dt_mon)); 164 bus_space_write_1(sc->sc_iot, sc->sc_ioh, RTC_BCDYEAR, bintobcd(dt->dt_year-SSRTC_YEAR_ZERO)); 165 166 /* Clear RTCEN */ 167 reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, RTC_RTCCON); 168 bus_space_write_1(sc->sc_iot, sc->sc_ioh, RTC_RTCCON, reg & ~RTCCON_RTCEN); 169 return 0; 170 } 171
Indexes created Mon Oct 13 04:09:54 GMT 2025