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      1  1.3  nisimura /* $NetBSD: s3c24x0_spi.h,v 1.3 2012/01/30 03:28:33 nisimura Exp $ */
      2  1.1       bsh 
      3  1.1       bsh /*
      4  1.1       bsh  * Copyright (c) 2004  Genetec corporation.  All rights reserved.
      5  1.1       bsh  * Written by Hiroyuki Bessho for Genetec corporation.
      6  1.1       bsh  *
      7  1.1       bsh  * Redistribution and use in source and binary forms, with or without
      8  1.1       bsh  * modification, are permitted provided that the following conditions
      9  1.1       bsh  * are met:
     10  1.1       bsh  * 1. Redistributions of source code must retain the above copyright
     11  1.1       bsh  *    notice, this list of conditions and the following disclaimer.
     12  1.1       bsh  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1       bsh  *    notice, this list of conditions and the following disclaimer in the
     14  1.1       bsh  *    documentation and/or other materials provided with the distribution.
     15  1.1       bsh  * 3. The name of Genetec corporation may not be used to endorse
     16  1.1       bsh  *    or promote products derived from this software without specific prior
     17  1.1       bsh  *    written permission.
     18  1.1       bsh  *
     19  1.1       bsh  * THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND
     20  1.1       bsh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1       bsh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1       bsh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORP.
     23  1.1       bsh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1       bsh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1       bsh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1       bsh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1       bsh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1       bsh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1       bsh  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1       bsh  */
     31  1.1       bsh 
     32  1.1       bsh #ifndef _S3C2410_SPI_H_
     33  1.1       bsh #define _S3C2410_SPI_H_
     34  1.1       bsh 
     35  1.1       bsh #include <arm/s3c2xx0/s3c24x0var.h>
     36  1.1       bsh 
     37  1.1       bsh struct ssspi_softc;
     38  1.1       bsh 
     39  1.1       bsh /*
     40  1.1       bsh  * attach arguments for sub-devices hooked to SPI ports.
     41  1.1       bsh  */
     42  1.1       bsh struct ssspi_attach_args {
     43  1.1       bsh 	s3c2xx0_chipset_tag_t	spia_sc;
     44  1.1       bsh 	bus_space_tag_t  	spia_iot;
     45  1.1       bsh 	bus_space_handle_t	spia_ioh;   /* SPI controller registers */
     46  1.1       bsh 	bus_space_handle_t	spia_gpioh; /* GPIO registers. SPI devices often
     47  1.1       bsh 					       needs additional pins */
     48  1.1       bsh 	bus_dma_tag_t    	spia_dmat;
     49  1.1       bsh 	short			spia_intr;  /* interrupt from SPI */
     50  1.1       bsh 	short			spia_index; /* index number of SPI unit (0|1) */
     51  1.1       bsh 	short			spia_aux_intr; /* additional interrupt */
     52  1.1       bsh };
     53  1.1       bsh 
     54  1.1       bsh 
     55  1.1       bsh int s3c24x0_spi_setup(struct ssspi_softc *, uint32_t, int, int);
     56  1.3  nisimura int s3c24x0_spi_master_send(struct ssspi_softc *, uint8_t);
     57  1.3  nisimura int s3c24x0_spi_wait(struct ssspi_softc *, uint8_t*);
     58  1.3  nisimura void s3c24x0_spi_spin_wait(struct ssspi_softc *sc);
     59  1.3  nisimura int s3c24x0_spi_bps(struct ssspi_softc *sc, int bps);
     60  1.3  nisimura 
     61  1.1       bsh 
     62  1.1       bsh #endif /* _S3C2410_SPI_H_ */
     63