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s3c2xx0_intr.c revision 1.15.6.1
      1  1.15.6.1     mrg /* $NetBSD: s3c2xx0_intr.c,v 1.15.6.1 2012/02/18 07:31:32 mrg Exp $ */
      2       1.1     bsh 
      3       1.1     bsh /*
      4       1.5     bsh  * Copyright (c) 2002, 2003 Fujitsu Component Limited
      5       1.5     bsh  * Copyright (c) 2002, 2003 Genetec Corporation
      6       1.1     bsh  * All rights reserved.
      7       1.1     bsh  *
      8       1.1     bsh  * Redistribution and use in source and binary forms, with or without
      9       1.1     bsh  * modification, are permitted provided that the following conditions
     10       1.1     bsh  * are met:
     11       1.1     bsh  * 1. Redistributions of source code must retain the above copyright
     12       1.1     bsh  *    notice, this list of conditions and the following disclaimer.
     13       1.1     bsh  * 2. Redistributions in binary form must reproduce the above copyright
     14       1.1     bsh  *    notice, this list of conditions and the following disclaimer in the
     15       1.1     bsh  *    documentation and/or other materials provided with the distribution.
     16       1.1     bsh  * 3. Neither the name of The Fujitsu Component Limited nor the name of
     17       1.1     bsh  *    Genetec corporation may not be used to endorse or promote products
     18       1.1     bsh  *    derived from this software without specific prior written permission.
     19       1.1     bsh  *
     20       1.1     bsh  * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
     21       1.1     bsh  * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
     22       1.1     bsh  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     23       1.1     bsh  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     24       1.1     bsh  * DISCLAIMED.  IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
     25       1.1     bsh  * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26       1.1     bsh  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     27       1.1     bsh  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
     28       1.1     bsh  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     29       1.1     bsh  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     30       1.1     bsh  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
     31       1.1     bsh  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32       1.1     bsh  * SUCH DAMAGE.
     33       1.1     bsh  */
     34       1.1     bsh 
     35       1.1     bsh /*
     36       1.1     bsh  * Common part of IRQ handlers for Samsung S3C2800/2400/2410 processors.
     37       1.1     bsh  * derived from i80321_icu.c
     38       1.1     bsh  */
     39       1.1     bsh 
     40       1.1     bsh /*
     41       1.1     bsh  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
     42       1.1     bsh  * All rights reserved.
     43       1.1     bsh  *
     44       1.1     bsh  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
     45       1.1     bsh  *
     46       1.1     bsh  * Redistribution and use in source and binary forms, with or without
     47       1.1     bsh  * modification, are permitted provided that the following conditions
     48       1.1     bsh  * are met:
     49       1.1     bsh  * 1. Redistributions of source code must retain the above copyright
     50       1.1     bsh  *    notice, this list of conditions and the following disclaimer.
     51       1.1     bsh  * 2. Redistributions in binary form must reproduce the above copyright
     52       1.1     bsh  *    notice, this list of conditions and the following disclaimer in the
     53       1.1     bsh  *    documentation and/or other materials provided with the distribution.
     54       1.1     bsh  * 3. All advertising materials mentioning features or use of this software
     55       1.1     bsh  *    must display the following acknowledgement:
     56       1.1     bsh  *	This product includes software developed for the NetBSD Project by
     57       1.1     bsh  *	Wasabi Systems, Inc.
     58       1.1     bsh  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     59       1.1     bsh  *    or promote products derived from this software without specific prior
     60       1.1     bsh  *    written permission.
     61       1.1     bsh  *
     62       1.1     bsh  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     63       1.1     bsh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     64       1.1     bsh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     65       1.1     bsh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     66       1.1     bsh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     67       1.1     bsh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     68       1.1     bsh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     69       1.1     bsh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     70       1.1     bsh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     71       1.1     bsh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     72       1.1     bsh  * POSSIBILITY OF SUCH DAMAGE.
     73       1.1     bsh  */
     74       1.4   lukem 
     75       1.4   lukem #include <sys/cdefs.h>
     76  1.15.6.1     mrg __KERNEL_RCSID(0, "$NetBSD: s3c2xx0_intr.c,v 1.15.6.1 2012/02/18 07:31:32 mrg Exp $");
     77       1.1     bsh 
     78       1.1     bsh #include <sys/param.h>
     79       1.1     bsh #include <sys/systm.h>
     80       1.1     bsh #include <sys/malloc.h>
     81      1.14    matt 
     82      1.15  dyoung #include <sys/bus.h>
     83       1.1     bsh #include <machine/intr.h>
     84      1.14    matt 
     85       1.1     bsh #include <arm/cpufunc.h>
     86       1.1     bsh 
     87       1.1     bsh #include <arm/s3c2xx0/s3c2xx0reg.h>
     88       1.1     bsh #include <arm/s3c2xx0/s3c2xx0var.h>
     89       1.1     bsh 
     90       1.1     bsh volatile uint32_t *s3c2xx0_intr_mask_reg;
     91       1.1     bsh 
     92      1.10   perry static inline void
     93       1.1     bsh __raise(int ipl)
     94       1.1     bsh {
     95      1.13    matt 	if (curcpl() < ipl) {
     96       1.1     bsh 		s3c2xx0_setipl(ipl);
     97       1.1     bsh 	}
     98       1.1     bsh }
     99       1.1     bsh /*
    100       1.1     bsh  * modify interrupt mask table for SPL levels
    101       1.1     bsh  */
    102       1.1     bsh void
    103       1.1     bsh s3c2xx0_update_intr_masks(int irqno, int level)
    104       1.1     bsh {
    105       1.1     bsh 	int mask = 1 << irqno;
    106       1.1     bsh 	int i;
    107       1.1     bsh 
    108       1.1     bsh 
    109       1.1     bsh 	s3c2xx0_ilevel[irqno] = level;
    110       1.1     bsh 
    111       1.1     bsh 	for (i = 0; i < level; ++i)
    112       1.1     bsh 		s3c2xx0_imask[i] |= mask;	/* Enable interrupt at lower
    113       1.1     bsh 						 * level */
    114       1.1     bsh 	for (; i < NIPL - 1; ++i)
    115      1.12    matt 		s3c2xx0_imask[i] &= ~mask;	/* Disable interrupt at upper
    116       1.1     bsh 						 * level */
    117       1.1     bsh 
    118       1.1     bsh 	/*
    119      1.11     wiz 	 * Enforce a hierarchy that gives "slow" device (or devices with
    120       1.1     bsh 	 * limited input buffer space/"real-time" requirements) a better
    121       1.1     bsh 	 * chance at not dropping data.
    122       1.1     bsh 	 */
    123      1.12    matt 	s3c2xx0_imask[IPL_VM] &= s3c2xx0_imask[IPL_SOFTSERIAL];
    124      1.12    matt 	s3c2xx0_imask[IPL_CLOCK] &= s3c2xx0_imask[IPL_VM];
    125      1.12    matt 	s3c2xx0_imask[IPL_HIGH] &= s3c2xx0_imask[IPL_CLOCK];
    126       1.1     bsh }
    127       1.1     bsh 
    128       1.1     bsh static int
    129       1.1     bsh stray_interrupt(void *cookie)
    130       1.1     bsh {
    131       1.1     bsh 	int save;
    132       1.1     bsh 	int irqno = (int) cookie;
    133       1.1     bsh 	printf("stray interrupt %d\n", irqno);
    134       1.1     bsh 
    135       1.1     bsh 	save = disable_interrupts(I32_bit);
    136       1.1     bsh 	*s3c2xx0_intr_mask_reg &= ~(1U << irqno);
    137       1.1     bsh 	restore_interrupts(save);
    138       1.1     bsh 
    139       1.1     bsh 	return 0;
    140       1.1     bsh }
    141       1.1     bsh /*
    142       1.1     bsh  * Initialize interrupt dispatcher.
    143       1.1     bsh  */
    144       1.1     bsh void
    145       1.1     bsh s3c2xx0_intr_init(struct s3c2xx0_intr_dispatch * dispatch_table, int icu_len)
    146       1.1     bsh {
    147       1.1     bsh 	int i;
    148       1.1     bsh 
    149       1.1     bsh 	for (i = 0; i < icu_len; ++i) {
    150       1.1     bsh 		dispatch_table[i].func = stray_interrupt;
    151       1.1     bsh 		dispatch_table[i].cookie = (void *) (i);
    152      1.12    matt 		dispatch_table[i].level = IPL_VM;
    153  1.15.6.1     mrg 		sprintf(dispatch_table[i].name, "irq %d", i);
    154  1.15.6.1     mrg 		evcnt_attach_dynamic(&dispatch_table[i].ev, EVCNT_TYPE_INTR,
    155  1.15.6.1     mrg 				     NULL, "s3c2xx0", dispatch_table[i].name);
    156       1.1     bsh 	}
    157       1.1     bsh 
    158       1.7     bsh 	global_intr_mask = ~0;		/* no intr is globally blocked. */
    159       1.7     bsh 
    160      1.12    matt 	_splraise(IPL_VM);
    161       1.1     bsh 	enable_interrupts(I32_bit);
    162       1.1     bsh }
    163       1.8     bsh 
    164       1.8     bsh /*
    165       1.8     bsh  * initialize variables so that splfoo() doesn't touch illegal address.
    166       1.8     bsh  * called during bootstrap.
    167       1.8     bsh  */
    168       1.8     bsh void
    169       1.8     bsh s3c2xx0_intr_bootstrap(vaddr_t icureg)
    170       1.8     bsh {
    171       1.8     bsh 	s3c2xx0_intr_mask_reg = (volatile uint32_t *)(icureg + INTCTL_INTMSK);
    172       1.8     bsh }
    173       1.8     bsh 
    174       1.8     bsh 
    175       1.7     bsh 
    176       1.1     bsh #undef splx
    177       1.1     bsh void
    178       1.1     bsh splx(int ipl)
    179       1.1     bsh {
    180       1.1     bsh 	s3c2xx0_splx(ipl);
    181       1.1     bsh }
    182       1.5     bsh 
    183       1.1     bsh #undef _splraise
    184       1.1     bsh int
    185       1.1     bsh _splraise(int ipl)
    186       1.1     bsh {
    187       1.1     bsh 	return s3c2xx0_splraise(ipl);
    188       1.1     bsh }
    189       1.5     bsh 
    190       1.1     bsh #undef _spllower
    191       1.1     bsh int
    192       1.1     bsh _spllower(int ipl)
    193       1.1     bsh {
    194       1.1     bsh 	return s3c2xx0_spllower(ipl);
    195       1.1     bsh }
    196