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s3c2xx0_intr.c revision 1.14
      1 /* $NetBSD: s3c2xx0_intr.c,v 1.14 2010/12/20 00:25:29 matt Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2002, 2003 Fujitsu Component Limited
      5  * Copyright (c) 2002, 2003 Genetec Corporation
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. Neither the name of The Fujitsu Component Limited nor the name of
     17  *    Genetec corporation may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
     21  * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
     22  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     23  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     24  * DISCLAIMED.  IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
     25  * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     27  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
     28  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     29  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
     31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  */
     34 
     35 /*
     36  * Common part of IRQ handlers for Samsung S3C2800/2400/2410 processors.
     37  * derived from i80321_icu.c
     38  */
     39 
     40 /*
     41  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
     42  * All rights reserved.
     43  *
     44  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
     45  *
     46  * Redistribution and use in source and binary forms, with or without
     47  * modification, are permitted provided that the following conditions
     48  * are met:
     49  * 1. Redistributions of source code must retain the above copyright
     50  *    notice, this list of conditions and the following disclaimer.
     51  * 2. Redistributions in binary form must reproduce the above copyright
     52  *    notice, this list of conditions and the following disclaimer in the
     53  *    documentation and/or other materials provided with the distribution.
     54  * 3. All advertising materials mentioning features or use of this software
     55  *    must display the following acknowledgement:
     56  *	This product includes software developed for the NetBSD Project by
     57  *	Wasabi Systems, Inc.
     58  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     59  *    or promote products derived from this software without specific prior
     60  *    written permission.
     61  *
     62  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     64  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     65  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     66  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     67  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     68  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     69  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     70  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     71  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     72  * POSSIBILITY OF SUCH DAMAGE.
     73  */
     74 
     75 #include <sys/cdefs.h>
     76 __KERNEL_RCSID(0, "$NetBSD: s3c2xx0_intr.c,v 1.14 2010/12/20 00:25:29 matt Exp $");
     77 
     78 #include <sys/param.h>
     79 #include <sys/systm.h>
     80 #include <sys/malloc.h>
     81 
     82 #include <machine/bus.h>
     83 #include <machine/intr.h>
     84 
     85 #include <arm/cpufunc.h>
     86 
     87 #include <arm/s3c2xx0/s3c2xx0reg.h>
     88 #include <arm/s3c2xx0/s3c2xx0var.h>
     89 
     90 volatile uint32_t *s3c2xx0_intr_mask_reg;
     91 
     92 static inline void
     93 __raise(int ipl)
     94 {
     95 	if (curcpl() < ipl) {
     96 		s3c2xx0_setipl(ipl);
     97 	}
     98 }
     99 /*
    100  * modify interrupt mask table for SPL levels
    101  */
    102 void
    103 s3c2xx0_update_intr_masks(int irqno, int level)
    104 {
    105 	int mask = 1 << irqno;
    106 	int i;
    107 
    108 
    109 	s3c2xx0_ilevel[irqno] = level;
    110 
    111 	for (i = 0; i < level; ++i)
    112 		s3c2xx0_imask[i] |= mask;	/* Enable interrupt at lower
    113 						 * level */
    114 	for (; i < NIPL - 1; ++i)
    115 		s3c2xx0_imask[i] &= ~mask;	/* Disable interrupt at upper
    116 						 * level */
    117 
    118 	/*
    119 	 * Enforce a hierarchy that gives "slow" device (or devices with
    120 	 * limited input buffer space/"real-time" requirements) a better
    121 	 * chance at not dropping data.
    122 	 */
    123 	s3c2xx0_imask[IPL_VM] &= s3c2xx0_imask[IPL_SOFTSERIAL];
    124 	s3c2xx0_imask[IPL_CLOCK] &= s3c2xx0_imask[IPL_VM];
    125 	s3c2xx0_imask[IPL_HIGH] &= s3c2xx0_imask[IPL_CLOCK];
    126 }
    127 
    128 static int
    129 stray_interrupt(void *cookie)
    130 {
    131 	int save;
    132 	int irqno = (int) cookie;
    133 	printf("stray interrupt %d\n", irqno);
    134 
    135 	save = disable_interrupts(I32_bit);
    136 	*s3c2xx0_intr_mask_reg &= ~(1U << irqno);
    137 	restore_interrupts(save);
    138 
    139 	return 0;
    140 }
    141 /*
    142  * Initialize interrupt dispatcher.
    143  */
    144 void
    145 s3c2xx0_intr_init(struct s3c2xx0_intr_dispatch * dispatch_table, int icu_len)
    146 {
    147 	int i;
    148 
    149 	for (i = 0; i < icu_len; ++i) {
    150 		dispatch_table[i].func = stray_interrupt;
    151 		dispatch_table[i].cookie = (void *) (i);
    152 		dispatch_table[i].level = IPL_VM;
    153 	}
    154 
    155 	global_intr_mask = ~0;		/* no intr is globally blocked. */
    156 
    157 	_splraise(IPL_VM);
    158 	enable_interrupts(I32_bit);
    159 }
    160 
    161 /*
    162  * initialize variables so that splfoo() doesn't touch illegal address.
    163  * called during bootstrap.
    164  */
    165 void
    166 s3c2xx0_intr_bootstrap(vaddr_t icureg)
    167 {
    168 	s3c2xx0_intr_mask_reg = (volatile uint32_t *)(icureg + INTCTL_INTMSK);
    169 }
    170 
    171 
    172 
    173 #undef splx
    174 void
    175 splx(int ipl)
    176 {
    177 	s3c2xx0_splx(ipl);
    178 }
    179 
    180 #undef _splraise
    181 int
    182 _splraise(int ipl)
    183 {
    184 	return s3c2xx0_splraise(ipl);
    185 }
    186 
    187 #undef _spllower
    188 int
    189 _spllower(int ipl)
    190 {
    191 	return s3c2xx0_spllower(ipl);
    192 }
    193