s3c2xx0_space.c revision 1.1 1 1.1 bsh /* $NetBSD: s3c2xx0_space.c,v 1.1 2002/11/20 17:52:51 bsh Exp $ */
2 1.1 bsh
3 1.1 bsh /*
4 1.1 bsh * Copyright (c) 2002 Fujitsu Component Limited
5 1.1 bsh * Copyright (c) 2002 Genetec Corporation
6 1.1 bsh * All rights reserved.
7 1.1 bsh *
8 1.1 bsh * Redistribution and use in source and binary forms, with or without
9 1.1 bsh * modification, are permitted provided that the following conditions
10 1.1 bsh * are met:
11 1.1 bsh * 1. Redistributions of source code must retain the above copyright
12 1.1 bsh * notice, this list of conditions and the following disclaimer.
13 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 bsh * notice, this list of conditions and the following disclaimer in the
15 1.1 bsh * documentation and/or other materials provided with the distribution.
16 1.1 bsh * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 1.1 bsh * Genetec corporation may not be used to endorse or promote products
18 1.1 bsh * derived from this software without specific prior written permission.
19 1.1 bsh *
20 1.1 bsh * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 1.1 bsh * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 1.1 bsh * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 1.1 bsh * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 1.1 bsh * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 1.1 bsh * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 1.1 bsh * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 1.1 bsh * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 1.1 bsh * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 1.1 bsh * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 1.1 bsh * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 bsh * SUCH DAMAGE.
33 1.1 bsh */
34 1.1 bsh /* derived from sa11x0_io.c */
35 1.1 bsh
36 1.1 bsh /*
37 1.1 bsh * Copyright (c) 1997 Mark Brinicombe.
38 1.1 bsh * Copyright (c) 1997 Causality Limited.
39 1.1 bsh * All rights reserved.
40 1.1 bsh *
41 1.1 bsh * This code is derived from software contributed to The NetBSD Foundation
42 1.1 bsh * by Ichiro FUKUHARA.
43 1.1 bsh *
44 1.1 bsh * Redistribution and use in source and binary forms, with or without
45 1.1 bsh * modification, are permitted provided that the following conditions
46 1.1 bsh * are met:
47 1.1 bsh * 1. Redistributions of source code must retain the above copyright
48 1.1 bsh * notice, this list of conditions and the following disclaimer.
49 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 bsh * notice, this list of conditions and the following disclaimer in the
51 1.1 bsh * documentation and/or other materials provided with the distribution.
52 1.1 bsh * 3. All advertising materials mentioning features or use of this software
53 1.1 bsh * must display the following acknowledgement:
54 1.1 bsh * This product includes software developed by Mark Brinicombe.
55 1.1 bsh * 4. The name of the company nor the name of the author may be used to
56 1.1 bsh * endorse or promote products derived from this software without specific
57 1.1 bsh * prior written permission.
58 1.1 bsh *
59 1.1 bsh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 1.1 bsh * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 1.1 bsh * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 1.1 bsh * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 1.1 bsh * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 1.1 bsh * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 1.1 bsh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 1.1 bsh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 1.1 bsh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 1.1 bsh * SUCH DAMAGE.
70 1.1 bsh */
71 1.1 bsh
72 1.1 bsh /*
73 1.1 bsh * bus_space functions for Samsung S3C2800/2400/2410.
74 1.1 bsh */
75 1.1 bsh
76 1.1 bsh #include <sys/param.h>
77 1.1 bsh #include <sys/systm.h>
78 1.1 bsh
79 1.1 bsh #include <uvm/uvm_extern.h>
80 1.1 bsh
81 1.1 bsh #include <machine/bus.h>
82 1.1 bsh
83 1.1 bsh /* Prototypes for all the bus_space structure functions */
84 1.1 bsh bs_protos(s3c2xx0);
85 1.1 bsh bs_protos(generic);
86 1.1 bsh bs_protos(generic_armv4);
87 1.1 bsh bs_protos(bs_notimpl);
88 1.1 bsh
89 1.1 bsh struct bus_space s3c2xx0_bs_tag = {
90 1.1 bsh /* cookie */
91 1.1 bsh (void *) 0,
92 1.1 bsh
93 1.1 bsh /* mapping/unmapping */
94 1.1 bsh s3c2xx0_bs_map,
95 1.1 bsh s3c2xx0_bs_unmap,
96 1.1 bsh s3c2xx0_bs_subregion,
97 1.1 bsh
98 1.1 bsh /* allocation/deallocation */
99 1.1 bsh s3c2xx0_bs_alloc, /* not implemented */
100 1.1 bsh s3c2xx0_bs_free, /* not implemented */
101 1.1 bsh
102 1.1 bsh /* get kernel virtual address */
103 1.1 bsh s3c2xx0_bs_vaddr,
104 1.1 bsh
105 1.1 bsh /* mmap */
106 1.1 bsh bs_notimpl_bs_mmap,
107 1.1 bsh
108 1.1 bsh /* barrier */
109 1.1 bsh s3c2xx0_bs_barrier,
110 1.1 bsh
111 1.1 bsh /* read (single) */
112 1.1 bsh generic_bs_r_1,
113 1.1 bsh generic_armv4_bs_r_2,
114 1.1 bsh generic_bs_r_4,
115 1.1 bsh bs_notimpl_bs_r_8,
116 1.1 bsh
117 1.1 bsh /* read multiple */
118 1.1 bsh generic_bs_rm_1,
119 1.1 bsh generic_armv4_bs_rm_2,
120 1.1 bsh generic_bs_rm_4,
121 1.1 bsh bs_notimpl_bs_rm_8,
122 1.1 bsh
123 1.1 bsh /* read region */
124 1.1 bsh bs_notimpl_bs_rr_1,
125 1.1 bsh generic_armv4_bs_rr_2,
126 1.1 bsh generic_bs_rr_4,
127 1.1 bsh bs_notimpl_bs_rr_8,
128 1.1 bsh
129 1.1 bsh /* write (single) */
130 1.1 bsh generic_bs_w_1,
131 1.1 bsh generic_armv4_bs_w_2,
132 1.1 bsh generic_bs_w_4,
133 1.1 bsh bs_notimpl_bs_w_8,
134 1.1 bsh
135 1.1 bsh /* write multiple */
136 1.1 bsh generic_bs_wm_1,
137 1.1 bsh generic_armv4_bs_wm_2,
138 1.1 bsh generic_bs_wm_4,
139 1.1 bsh bs_notimpl_bs_wm_8,
140 1.1 bsh
141 1.1 bsh /* write region */
142 1.1 bsh bs_notimpl_bs_wr_1,
143 1.1 bsh generic_armv4_bs_wr_2,
144 1.1 bsh generic_bs_wr_4,
145 1.1 bsh bs_notimpl_bs_wr_8,
146 1.1 bsh
147 1.1 bsh /* set multiple */
148 1.1 bsh bs_notimpl_bs_sm_1,
149 1.1 bsh bs_notimpl_bs_sm_2,
150 1.1 bsh bs_notimpl_bs_sm_4,
151 1.1 bsh bs_notimpl_bs_sm_8,
152 1.1 bsh
153 1.1 bsh /* set region */
154 1.1 bsh bs_notimpl_bs_sr_1,
155 1.1 bsh generic_armv4_bs_sr_2,
156 1.1 bsh bs_notimpl_bs_sr_4,
157 1.1 bsh bs_notimpl_bs_sr_8,
158 1.1 bsh
159 1.1 bsh /* copy */
160 1.1 bsh bs_notimpl_bs_c_1,
161 1.1 bsh generic_armv4_bs_c_2,
162 1.1 bsh bs_notimpl_bs_c_4,
163 1.1 bsh bs_notimpl_bs_c_8,
164 1.1 bsh };
165 1.1 bsh
166 1.1 bsh int
167 1.1 bsh s3c2xx0_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
168 1.1 bsh int flag, bus_space_handle_t * bshp)
169 1.1 bsh {
170 1.1 bsh u_long startpa, endpa, pa;
171 1.1 bsh vaddr_t va;
172 1.1 bsh pt_entry_t *pte;
173 1.1 bsh
174 1.1 bsh if ((u_long) bpa > (u_long) KERNEL_BASE) {
175 1.1 bsh /* Some IO registers (ex. UART ports for console) are mapped
176 1.1 bsh * to fixed address by board specific routine. */
177 1.1 bsh *bshp = bpa;
178 1.1 bsh return (0);
179 1.1 bsh }
180 1.1 bsh startpa = trunc_page(bpa);
181 1.1 bsh endpa = round_page(bpa + size);
182 1.1 bsh
183 1.1 bsh /* XXX use extent manager to check duplicate mapping */
184 1.1 bsh
185 1.1 bsh va = uvm_km_valloc(kernel_map, endpa - startpa);
186 1.1 bsh if (!va)
187 1.1 bsh return (ENOMEM);
188 1.1 bsh
189 1.1 bsh *bshp = (bus_space_handle_t) (va + (bpa - startpa));
190 1.1 bsh
191 1.1 bsh for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
192 1.1 bsh pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE);
193 1.1 bsh pte = vtopte(va);
194 1.1 bsh if ((flag & BUS_SPACE_MAP_CACHEABLE) == 0)
195 1.1 bsh *pte &= ~L2_S_CACHE_MASK;
196 1.1 bsh }
197 1.1 bsh pmap_update(pmap_kernel());
198 1.1 bsh
199 1.1 bsh return (0);
200 1.1 bsh }
201 1.1 bsh
202 1.1 bsh void
203 1.1 bsh s3c2xx0_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
204 1.1 bsh {
205 1.1 bsh
206 1.1 bsh /* Nothing to do. */
207 1.1 bsh }
208 1.1 bsh
209 1.1 bsh
210 1.1 bsh int
211 1.1 bsh s3c2xx0_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
212 1.1 bsh bus_size_t size, bus_space_handle_t * nbshp)
213 1.1 bsh {
214 1.1 bsh
215 1.1 bsh *nbshp = bsh + offset;
216 1.1 bsh return (0);
217 1.1 bsh }
218 1.1 bsh
219 1.1 bsh void
220 1.1 bsh s3c2xx0_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
221 1.1 bsh bus_size_t len, int flags)
222 1.1 bsh {
223 1.1 bsh
224 1.1 bsh /* Nothing to do. */
225 1.1 bsh }
226 1.1 bsh
227 1.1 bsh void *
228 1.1 bsh s3c2xx0_bs_vaddr(void *t, bus_space_handle_t bsh)
229 1.1 bsh {
230 1.1 bsh
231 1.1 bsh return ((void *) bsh);
232 1.1 bsh }
233 1.1 bsh
234 1.1 bsh
235 1.1 bsh int
236 1.1 bsh s3c2xx0_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
237 1.1 bsh bus_size_t size, bus_size_t alignment, bus_size_t boundary,
238 1.1 bsh int flags, bus_addr_t * bpap, bus_space_handle_t * bshp)
239 1.1 bsh {
240 1.1 bsh
241 1.1 bsh panic("s3c2xx0_io_bs_alloc(): not implemented\n");
242 1.1 bsh }
243 1.1 bsh
244 1.1 bsh void
245 1.1 bsh s3c2xx0_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
246 1.1 bsh {
247 1.1 bsh
248 1.1 bsh panic("s3c2xx0_io_bs_free(): not implemented\n");
249 1.1 bsh }
250