sscom_s3c2410.c revision 1.7
1 /* $NetBSD: sscom_s3c2410.c,v 1.7 2014/03/14 21:40:48 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003 Fujitsu Component Limited 5 * Copyright (c) 2002, 2003 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: sscom_s3c2410.c,v 1.7 2014/03/14 21:40:48 matt Exp $"); 37 38 #include "opt_sscom.h" 39 #include "opt_ddb.h" 40 #include "opt_kgdb.h" 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/ioctl.h> 45 #include <sys/select.h> 46 #include <sys/tty.h> 47 #include <sys/proc.h> 48 #include <sys/conf.h> 49 #include <sys/file.h> 50 #include <sys/uio.h> 51 #include <sys/kernel.h> 52 #include <sys/syslog.h> 53 #include <sys/types.h> 54 #include <sys/device.h> 55 #include <sys/malloc.h> 56 #include <sys/timepps.h> 57 #include <sys/vnode.h> 58 59 #include <machine/intr.h> 60 #include <sys/bus.h> 61 62 #include <arm/s3c2xx0/s3c2410reg.h> 63 #include <arm/s3c2xx0/s3c2410var.h> 64 #include <arm/s3c2xx0/sscom_var.h> 65 #include <sys/termios.h> 66 67 static int sscom_match(device_t, cfdata_t, void *); 68 static void sscom_attach(device_t, device_t, void *); 69 70 CFATTACH_DECL_NEW(sscom, sizeof(struct sscom_softc), sscom_match, 71 sscom_attach, NULL, NULL); 72 73 const struct sscom_uart_info s3c2410_uart_config[] = { 74 /* UART 0 */ 75 { 76 0, 77 S3C2410_INT_TXD0, 78 S3C2410_INT_RXD0, 79 S3C2410_INT_ERR0, 80 S3C2410_UART_BASE(0), 81 }, 82 /* UART 1 */ 83 { 84 1, 85 S3C2410_INT_TXD1, 86 S3C2410_INT_RXD1, 87 S3C2410_INT_ERR1, 88 S3C2410_UART_BASE(1), 89 }, 90 /* UART 2 */ 91 { 92 2, 93 S3C2410_INT_TXD2, 94 S3C2410_INT_RXD2, 95 S3C2410_INT_ERR2, 96 S3C2410_UART_BASE(2), 97 }, 98 }; 99 100 static int 101 sscom_match(device_t parent, cfdata_t cf, void *aux) 102 { 103 struct s3c2xx0_attach_args *sa = aux; 104 int unit = sa->sa_index; 105 106 return unit == 0 || unit == 1; 107 } 108 109 /* RXINTn, TXINTn and ERRn interrupts are cascaded to UARTn irq. */ 110 111 #define _sscom_intbit(irqno) (1<<((irqno)-S3C2410_SUBIRQ_MIN)) 112 113 static void 114 s3c2410_change_txrx_interrupts(struct sscom_softc *sc, bool unmask_p, 115 u_int flags) 116 { 117 int intbits = 0; 118 if (flags & SSCOM_HW_RXINT) 119 intbits |= _sscom_intbit((sc)->sc_rx_irqno); 120 if (flags & SSCOM_HW_TXINT) 121 intbits |= _sscom_intbit((sc)->sc_rx_irqno); 122 if (unmask_p) { 123 s3c2410_unmask_subinterrupts(intbits); 124 } else { 125 s3c2410_mask_subinterrupts(intbits); 126 } 127 } 128 129 static void 130 sscom_attach(device_t parent, device_t self, void *aux) 131 { 132 struct sscom_softc *sc = device_private(self); 133 struct s3c2xx0_attach_args *sa = aux; 134 int unit = sa->sa_index; 135 bus_addr_t iobase = s3c2410_uart_config[unit].iobase; 136 137 aprint_normal(": UART%d addr=%lx", sa->sa_index, iobase ); 138 139 sc->sc_dev = self; 140 sc->sc_iot = s3c2xx0_softc->sc_iot; 141 sc->sc_unit = unit; 142 sc->sc_frequency = s3c2xx0_softc->sc_pclk; 143 144 sc->sc_change_txrx_interrupts = s3c2410_change_txrx_interrupts; 145 146 sc->sc_rx_irqno = s3c2410_uart_config[sa->sa_index].rx_int; 147 sc->sc_tx_irqno = s3c2410_uart_config[sa->sa_index].tx_int; 148 149 if (bus_space_map(sc->sc_iot, iobase, SSCOM_SIZE, 0, &sc->sc_ioh)) { 150 aprint_error( ": failed to map registers\n" ); 151 return; 152 } 153 154 printf("\n"); 155 156 s3c24x0_intr_establish(s3c2410_uart_config[unit].tx_int, 157 IPL_SERIAL, IST_LEVEL, sscomtxintr, sc); 158 s3c24x0_intr_establish(s3c2410_uart_config[unit].rx_int, 159 IPL_SERIAL, IST_LEVEL, sscomrxintr, sc); 160 s3c24x0_intr_establish(s3c2410_uart_config[unit].err_int, 161 IPL_SERIAL, IST_LEVEL, sscomrxintr, sc); 162 sscom_disable_txrxint(sc); 163 164 sscom_attach_subr(sc); 165 } 166 167 168 169 int 170 s3c2410_sscom_cnattach(bus_space_tag_t iot, int unit, int rate, 171 int frequency, tcflag_t cflag) 172 { 173 return sscom_cnattach(iot, s3c2410_uart_config + unit, 174 rate, frequency, cflag); 175 } 176 177 #ifdef KGDB 178 int 179 s3c2410_sscom_kgdb_attach(bus_space_tag_t iot, int unit, int rate, 180 int frequency, tcflag_t cflag) 181 { 182 return sscom_kgdb_attach(iot, s3c2410_uart_config + unit, 183 rate, frequency, cflag); 184 } 185 #endif /* KGDB */ 186
Indexes created Tue Sep 30 20:09:53 GMT 2025