sscom_var.h revision 1.1
1 /* $NetBSD: sscom_var.h,v 1.1 2002/11/20 17:52:53 bsh Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 /* derived from sys/dev/ic/comvar.h */ 35 /* 36 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed by Christopher G. Demetriou 49 * for the NetBSD Project. 50 * 4. The name of the author may not be used to endorse or promote products 51 * derived from this software without specific prior written permission 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 57 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 58 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 62 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 #ifndef _ARM_S3C2XX0_SSCOM_VAR_H 66 #define _ARM_S3C2XX0_SSCOM_VAR_H 67 68 #include <sys/param.h> 69 #include <sys/systm.h> 70 #include <sys/device.h> 71 #include <sys/termios.h> 72 #include <sys/callout.h> 73 #include <machine/bus.h> 74 75 /* Hardware flag masks */ 76 #define SSCOM_HW_FIFO 0x01 77 #define SSCOM_HW_FLOW 0x02 78 #define SSCOM_HW_DEV_OK 0x04 79 #define SSCOM_HW_CONSOLE 0x08 80 #define SSCOM_HW_KGDB 0x10 81 #define SSCOM_HW_TXINT 0x20 82 #define SSCOM_HW_RXINT 0x40 83 84 /* Buffer size for character buffer */ 85 #define SSCOM_RING_SIZE 2048 86 87 struct sscom_softc { 88 struct device sc_dev; 89 void *sc_si; 90 struct tty *sc_tty; 91 92 struct callout sc_diag_callout; 93 94 int sc_unit; /* UART0/UART1 */ 95 int sc_frequency; 96 97 bus_space_tag_t sc_iot; 98 bus_space_handle_t sc_ioh; 99 100 u_int sc_overflows, 101 sc_floods, 102 sc_errors; 103 104 int sc_hwflags, 105 sc_swflags; 106 u_int sc_fifolen; 107 108 u_int sc_r_hiwat, 109 sc_r_lowat; 110 u_char *volatile sc_rbget, 111 *volatile sc_rbput; 112 volatile u_int sc_rbavail; 113 u_char *sc_rbuf, 114 *sc_ebuf; 115 116 u_char *sc_tba; 117 u_int sc_tbc, 118 sc_heldtbc; 119 120 volatile u_char sc_rx_flags, 121 #define RX_TTY_BLOCKED 0x01 122 #define RX_TTY_OVERFLOWED 0x02 123 #define RX_IBUF_BLOCKED 0x04 124 #define RX_IBUF_OVERFLOWED 0x08 125 #define RX_ANY_BLOCK 0x0f 126 sc_tx_busy, 127 sc_tx_done, 128 sc_tx_stopped, 129 sc_st_check, 130 sc_rx_ready; 131 132 /* data to stored in UART registers. 133 actual write to UART register is pended while sc_tx_busy */ 134 uint16_t sc_ucon; /* control register */ 135 uint16_t sc_ubrdiv; /* baudrate register */ 136 uint8_t sc_heldchange; /* register changes are pended */ 137 uint8_t sc_ulcon; /* line control */ 138 uint8_t sc_umcon; /* modem control */ 139 #define UMCON_HW_MASK (UMCON_RTS) 140 #define UMCON_DTR (1<<4) /* provided by other means such as GPIO */ 141 uint8_t sc_msts; /* modem status */ 142 #define MSTS_CTS UMSTAT_CTS /* bit0 */ 143 #define MSTS_DCD (1<<1) 144 #define MSTS_DSR (1<<2) 145 146 uint8_t sc_msr_dcd; /* DCD or 0 */ 147 uint8_t sc_mcr_dtr; /* DTR or 0 or DTR|RTS*/ 148 uint8_t sc_mcr_rts; /* RTS or DTR in sc_umcon */ 149 uint8_t sc_msr_cts; /* CTS or DCD in sc_msts */ 150 151 uint8_t sc_msr_mask; /* sc_msr_cts|sc_msr_dcd */ 152 uint8_t sc_mcr_active; 153 uint8_t sc_msr_delta; 154 155 uint8_t sc_rx_irqno, sc_tx_irqno; 156 157 #if 0 158 /* PPS signal on DCD, with or without inkernel clock disciplining */ 159 u_char sc_ppsmask; /* pps signal mask */ 160 u_char sc_ppsassert; /* pps leading edge */ 161 u_char sc_ppsclear; /* pps trailing edge */ 162 pps_info_t ppsinfo; 163 pps_params_t ppsparam; 164 #endif 165 166 #if NRND > 0 && defined(RND_COM) 167 rndsource_element_t rnd_source; 168 #endif 169 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(SSCOM_MPLOCK) 170 struct simplelock sc_lock; 171 #endif 172 173 /* 174 * S3C2XX0's UART doesn't have modem control/status pins. 175 * On platforms with S3C2XX0, those pins are simply unavailable 176 * or provided by other means such as GPIO. Platform specific attach routine 177 * have to provide functions to read/write modem control/status pins. 178 */ 179 int (* read_modem_status)( struct sscom_softc * ); 180 void (* set_modem_control)( struct sscom_softc * ); 181 }; 182 183 /* Macros to clear/set/test flags. */ 184 #define SET(t, f) (t) |= (f) 185 #define CLR(t, f) (t) &= ~(f) 186 #define ISSET(t, f) ((t) & (f)) 187 188 /* UART register address, etc. */ 189 struct sscom_uart_info { 190 int unit; 191 char tx_int, rx_int, err_int; 192 bus_addr_t iobase; 193 }; 194 195 #define sscom_rxrdy(iot,ioh) \ 196 (bus_space_read_1((iot), (ioh), SSCOM_UTRSTAT) & UTRSTAT_RXREADY) 197 #define sscom_getc(iot,ioh) bus_space_read_1((iot), (ioh), SSCOM_URXH) 198 #define sscom_geterr(iot,ioh) bus_space_read_1((iot), (ioh), SSCOM_UERSTAT) 199 200 #define sscom_enable_rxint(sc) (s3c2xx0_unmask_interrupts(1<<sc->sc_rx_irqno), \ 201 (sc->sc_hwflags |= SSCOM_HW_RXINT)) 202 #define sscom_disable_rxint(sc) (s3c2xx0_mask_interrupts(1<<sc->sc_rx_irqno), \ 203 (sc->sc_hwflags &= ~SSCOM_HW_RXINT)) 204 #define sscom_enable_txint(sc) (s3c2xx0_unmask_interrupts(1<<sc->sc_tx_irqno), \ 205 (sc->sc_hwflags |= SSCOM_HW_TXINT)) 206 #define sscom_disable_txint(sc) (s3c2xx0_mask_interrupts(1<<sc->sc_tx_irqno), \ 207 (sc->sc_hwflags &= ~SSCOM_HW_TXINT)) 208 #define sscom_enable_txrxint(sc) \ 209 (s3c2xx0_unmask_interrupts((1<<sc->sc_tx_irqno)|(1<<sc->sc_rx_irqno)), \ 210 (sc->sc_hwflags |= (SSCOM_HW_TXINT|SSCOM_HW_RXINT))) 211 #define sscom_disable_txrxint(sc) \ 212 (s3c2xx0_mask_interrupts((1<<sc->sc_tx_irqno)|(1<<sc->sc_rx_irqno)), \ 213 (sc->sc_hwflags &= ~(SSCOM_HW_TXINT|SSCOM_HW_RXINT))) 214 215 216 int sscomspeed(long, long); 217 void sscom_attach_subr(struct sscom_softc *); 218 219 int sscom_detach(struct device *, int); 220 int sscom_activate(struct device *, enum devact); 221 void sscom_shutdown(struct sscom_softc *); 222 void sscomdiag (void *); 223 void sscomstart(struct tty *); 224 int sscomparam(struct tty *, struct termios *); 225 int sscomread(dev_t, struct uio *, int); 226 void sscom_config(struct sscom_softc *); 227 228 int sscomintr(void *); 229 230 int sscom_cnattach(bus_space_tag_t, const struct sscom_uart_info *, 231 int, int, tcflag_t); 232 void sscom_cndetach(void); 233 int sscom_is_console(bus_space_tag_t, int, bus_space_handle_t *); 234 235 #ifdef KGDB 236 int sscom_kgdb_attach(bus_space_tag_t, const struct sscom_uart_info *, 237 int, int, tcflag_t); 238 #endif 239 240 #endif /* _ARM_S3C2XX0_SSCOM_VAR_H */ 241
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