sscom_var.h revision 1.4
1 /* $NetBSD: sscom_var.h,v 1.4 2003/07/31 19:08:10 bsh Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003 Fujitsu Component Limited 5 * Copyright (c) 2002, 2003 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 /* derived from sys/dev/ic/comvar.h */ 35 36 /* 37 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by Christopher G. Demetriou 50 * for the NetBSD Project. 51 * 4. The name of the author may not be used to endorse or promote products 52 * derived from this software without specific prior written permission 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 57 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 58 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 59 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 63 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 #ifndef _ARM_S3C2XX0_SSCOM_VAR_H 67 #define _ARM_S3C2XX0_SSCOM_VAR_H 68 69 #include "opt_multiprocessor.h" 70 #include "opt_lockdebug.h" 71 72 #include <sys/param.h> 73 #include <sys/systm.h> 74 #include <sys/device.h> 75 #include <sys/termios.h> 76 #include <sys/callout.h> 77 #include <machine/bus.h> 78 79 /* Hardware flag masks */ 80 #define SSCOM_HW_FLOW 0x02 81 #define SSCOM_HW_DEV_OK 0x04 82 #define SSCOM_HW_CONSOLE 0x08 83 #define SSCOM_HW_KGDB 0x10 84 #define SSCOM_HW_TXINT 0x20 85 #define SSCOM_HW_RXINT 0x40 86 87 /* Buffer size for character buffer */ 88 #define SSCOM_RING_SIZE 2048 89 90 struct sscom_softc { 91 struct device sc_dev; 92 void *sc_si; 93 struct tty *sc_tty; 94 95 struct callout sc_diag_callout; 96 97 int sc_unit; /* UART0/UART1 */ 98 int sc_frequency; 99 100 bus_space_tag_t sc_iot; 101 bus_space_handle_t sc_ioh; 102 103 u_int sc_overflows, 104 sc_floods, 105 sc_errors; 106 107 int sc_hwflags, 108 sc_swflags; 109 110 u_int sc_r_hiwat, 111 sc_r_lowat; 112 u_char *volatile sc_rbget, 113 *volatile sc_rbput; 114 volatile u_int sc_rbavail; 115 u_char *sc_rbuf, 116 *sc_ebuf; 117 118 u_char *sc_tba; 119 u_int sc_tbc, 120 sc_heldtbc; 121 122 volatile u_char sc_rx_flags, 123 #define RX_TTY_BLOCKED 0x01 124 #define RX_TTY_OVERFLOWED 0x02 125 #define RX_IBUF_BLOCKED 0x04 126 #define RX_IBUF_OVERFLOWED 0x08 127 #define RX_ANY_BLOCK 0x0f 128 sc_tx_busy, 129 sc_tx_done, 130 sc_tx_stopped, 131 sc_st_check, 132 sc_rx_ready; 133 134 /* data to stored in UART registers. 135 actual write to UART register is pended while sc_tx_busy */ 136 uint16_t sc_ucon; /* control register */ 137 uint16_t sc_ubrdiv; /* baudrate register */ 138 uint8_t sc_heldchange; /* register changes are pended */ 139 uint8_t sc_ulcon; /* line control */ 140 uint8_t sc_umcon; /* modem control */ 141 #define UMCON_HW_MASK (UMCON_RTS) 142 #define UMCON_DTR (1<<4) /* provided by other means such as GPIO */ 143 uint8_t sc_msts; /* modem status */ 144 #define MSTS_CTS UMSTAT_CTS /* bit0 */ 145 #define MSTS_DCD (1<<1) 146 #define MSTS_DSR (1<<2) 147 148 uint8_t sc_msr_dcd; /* DCD or 0 */ 149 uint8_t sc_mcr_dtr; /* DTR or 0 or DTR|RTS*/ 150 uint8_t sc_mcr_rts; /* RTS or DTR in sc_umcon */ 151 uint8_t sc_msr_cts; /* CTS or DCD in sc_msts */ 152 153 uint8_t sc_msr_mask; /* sc_msr_cts|sc_msr_dcd */ 154 uint8_t sc_mcr_active; 155 uint8_t sc_msr_delta; 156 157 uint8_t sc_rx_irqno, sc_tx_irqno; 158 159 #if 0 160 /* PPS signal on DCD, with or without inkernel clock disciplining */ 161 u_char sc_ppsmask; /* pps signal mask */ 162 u_char sc_ppsassert; /* pps leading edge */ 163 u_char sc_ppsclear; /* pps trailing edge */ 164 pps_info_t ppsinfo; 165 pps_params_t ppsparam; 166 #endif 167 168 #if NRND > 0 && defined(RND_COM) 169 rndsource_element_t rnd_source; 170 #endif 171 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(SSCOM_MPLOCK) 172 struct simplelock sc_lock; 173 #endif 174 175 /* 176 * S3C2XX0's UART doesn't have modem control/status pins. 177 * On platforms with S3C2XX0, those pins are simply unavailable 178 * or provided by other means such as GPIO. Platform specific attach routine 179 * have to provide functions to read/write modem control/status pins. 180 */ 181 int (* read_modem_status)( struct sscom_softc * ); 182 void (* set_modem_control)( struct sscom_softc * ); 183 }; 184 185 /* Macros to clear/set/test flags. */ 186 #define SET(t, f) (t) |= (f) 187 #define CLR(t, f) (t) &= ~(f) 188 #define ISSET(t, f) ((t) & (f)) 189 190 /* UART register address, etc. */ 191 struct sscom_uart_info { 192 int unit; 193 char tx_int, rx_int, err_int; 194 bus_addr_t iobase; 195 }; 196 197 #define sscom_rxrdy(iot,ioh) \ 198 (bus_space_read_1((iot), (ioh), SSCOM_UTRSTAT) & UTRSTAT_RXREADY) 199 #define sscom_getc(iot,ioh) bus_space_read_1((iot), (ioh), SSCOM_URXH) 200 #define sscom_geterr(iot,ioh) bus_space_read_1((iot), (ioh), SSCOM_UERSTAT) 201 202 #define sscom_enable_rxint(sc) (s3c2xx0_unmask_interrupts(1<<sc->sc_rx_irqno), \ 203 (sc->sc_hwflags |= SSCOM_HW_RXINT)) 204 #define sscom_disable_rxint(sc) (s3c2xx0_mask_interrupts(1<<sc->sc_rx_irqno), \ 205 (sc->sc_hwflags &= ~SSCOM_HW_RXINT)) 206 #define sscom_enable_txint(sc) (s3c2xx0_unmask_interrupts(1<<sc->sc_tx_irqno), \ 207 (sc->sc_hwflags |= SSCOM_HW_TXINT)) 208 #define sscom_disable_txint(sc) (s3c2xx0_mask_interrupts(1<<sc->sc_tx_irqno), \ 209 (sc->sc_hwflags &= ~SSCOM_HW_TXINT)) 210 #define sscom_enable_txrxint(sc) \ 211 (s3c2xx0_unmask_interrupts((1<<sc->sc_tx_irqno)|(1<<sc->sc_rx_irqno)), \ 212 (sc->sc_hwflags |= (SSCOM_HW_TXINT|SSCOM_HW_RXINT))) 213 #define sscom_disable_txrxint(sc) \ 214 (s3c2xx0_mask_interrupts((1<<sc->sc_tx_irqno)|(1<<sc->sc_rx_irqno)), \ 215 (sc->sc_hwflags &= ~(SSCOM_HW_TXINT|SSCOM_HW_RXINT))) 216 217 218 int sscomspeed(long, long); 219 void sscom_attach_subr(struct sscom_softc *); 220 221 int sscom_detach(struct device *, int); 222 int sscom_activate(struct device *, enum devact); 223 void sscom_shutdown(struct sscom_softc *); 224 void sscomdiag (void *); 225 void sscomstart(struct tty *); 226 int sscomparam(struct tty *, struct termios *); 227 int sscomread(dev_t, struct uio *, int); 228 void sscom_config(struct sscom_softc *); 229 230 int sscomtxintr(void *); 231 int sscomrxintr(void *); 232 233 int sscom_cnattach(bus_space_tag_t, const struct sscom_uart_info *, 234 int, int, tcflag_t); 235 void sscom_cndetach(void); 236 int sscom_is_console(bus_space_tag_t, int, bus_space_handle_t *); 237 238 #ifdef KGDB 239 int sscom_kgdb_attach(bus_space_tag_t, const struct sscom_uart_info *, 240 int, int, tcflag_t); 241 #endif 242 243 #endif /* _ARM_S3C2XX0_SSCOM_VAR_H */ 244
Indexes created Tue Sep 30 11:09:46 GMT 2025