sa11x0.c revision 1.10
1 /* $NetBSD: sa11x0.c,v 1.10 2003/01/01 00:46:15 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by IWAMOTO Toshihiro and Ichiro FUKUHARA. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 */ 25 /*- 26 * Copyright (c) 1999 27 * Shin Takemura and PocketBSD Project. All rights reserved. 28 * 29 * Redistribution and use in source and binary forms, with or without 30 * modification, are permitted provided that the following conditions 31 * are met: 32 * 1. Redistributions of source code must retain the above copyright 33 * notice, this list of conditions and the following disclaimer. 34 * 2. Redistributions in binary form must reproduce the above copyright 35 * notice, this list of conditions and the following disclaimer in the 36 * documentation and/or other materials provided with the distribution. 37 * 3. All advertising materials mentioning features or use of this software 38 * must display the following acknowledgement: 39 * This product includes software developed by the PocketBSD project 40 * and its contributors. 41 * 4. Neither the name of the project nor the names of its contributors 42 * may be used to endorse or promote products derived from this software 43 * without specific prior written permission. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 48 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 49 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 55 * SUCH DAMAGE. 56 * 57 */ 58 #include <sys/param.h> 59 #include <sys/systm.h> 60 #include <sys/device.h> 61 #include <sys/kernel.h> 62 #include <sys/reboot.h> 63 64 #include <machine/cpu.h> 65 #include <machine/bus.h> 66 67 #include <arm/mainbus/mainbus.h> 68 #include <arm/sa11x0/sa11x0_reg.h> 69 #include <arm/sa11x0/sa11x0_var.h> 70 #include <arm/sa11x0/sa11x0_dmacreg.h> 71 #include <arm/sa11x0/sa11x0_ppcreg.h> 72 #include <arm/sa11x0/sa11x0_gpioreg.h> 73 74 #ifdef hpcarm 75 #include <hpc/include/config_hook.h> 76 #include <hpc/include/platid.h> 77 #include <hpc/include/platid_mask.h> 78 #endif 79 80 #include "locators.h" 81 82 /* prototypes */ 83 static int sa11x0_match(struct device *, struct cfdata *, void *); 84 static void sa11x0_attach(struct device *, struct device *, void *); 85 static int sa11x0_search(struct device *, struct cfdata *, void *); 86 static int sa11x0_print(void *, const char *); 87 88 /* attach structures */ 89 CFATTACH_DECL(saip, sizeof(struct sa11x0_softc), 90 sa11x0_match, sa11x0_attach, NULL, NULL); 91 92 extern struct bus_space sa11x0_bs_tag; 93 extern vaddr_t saipic_base; 94 95 extern int SetCPSR(int, int); 96 97 /* 98 * int sa11x0_print(void *aux, const char *name) 99 * print configuration info for children 100 */ 101 102 static int 103 sa11x0_print(aux, name) 104 void *aux; 105 const char *name; 106 { 107 struct sa11x0_attach_args *sa = (struct sa11x0_attach_args*)aux; 108 109 if (sa->sa_size) 110 aprint_normal(" addr 0x%lx", sa->sa_addr); 111 if (sa->sa_size > 1) 112 aprint_normal("-0x%lx", sa->sa_addr + sa->sa_size - 1); 113 if (sa->sa_memsize) 114 aprint_normal(" membase 0x%lx", sa->sa_membase); 115 if (sa->sa_memsize > 1) 116 aprint_normal("-0x%lx", sa->sa_membase + sa->sa_memsize - 1); 117 if (sa->sa_intr > 1) 118 aprint_normal(" intr %d", sa->sa_intr); 119 if (sa->sa_gpio != -1) 120 aprint_normal(" gpio %d", sa->sa_gpio); 121 122 return (UNCONF); 123 } 124 125 int 126 sa11x0_match(parent, match, aux) 127 struct device *parent; 128 struct cfdata *match; 129 void *aux; 130 { 131 return 1; 132 } 133 134 void 135 sa11x0_attach(parent, self, aux) 136 struct device *parent; 137 struct device *self; 138 void *aux; 139 { 140 struct sa11x0_softc *sc = (struct sa11x0_softc*)self; 141 142 sc->sc_iot = &sa11x0_bs_tag; 143 144 /* Map the SAIP */ 145 if (bus_space_map(sc->sc_iot, SAIPIC_BASE, SAIPIC_NPORTS, 146 0, &sc->sc_ioh)) 147 panic("%s: Cannot map registers", self->dv_xname); 148 saipic_base = sc->sc_ioh; 149 150 /* Map the GPIO registers */ 151 if (bus_space_map(sc->sc_iot, SAGPIO_BASE, SAGPIO_NPORTS, 152 0, &sc->sc_gpioh)) 153 panic("%s: unable to map GPIO registers", self->dv_xname); 154 bus_space_write_4(sc->sc_iot, sc->sc_gpioh, SAGPIO_EDR, 0xffffffff); 155 156 /* Map the PPC registers */ 157 if (bus_space_map(sc->sc_iot, SAPPC_BASE, SAPPC_NPORTS, 158 0, &sc->sc_ppch)) 159 panic("%s: unable to map PPC registers", self->dv_xname); 160 161 /* Map the DMA controller registers */ 162 if (bus_space_map(sc->sc_iot, SADMAC_BASE, SADMAC_NPORTS, 163 0, &sc->sc_dmach)) 164 panic("%s: unable to map DMAC registers", self->dv_xname); 165 166 /* Map the reset controller registers */ 167 if (bus_space_map(sc->sc_iot, SARCR_BASE, NBPG, 168 0, &sc->sc_reseth)) 169 panic("%s: unable to map reset registers", self->dv_xname); 170 171 printf("\n"); 172 173 /* 174 * Mask all interrupts. 175 * They are later unmasked at each device's attach routine. 176 */ 177 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAIPIC_MR, 0); 178 179 /* Route all bits to IRQ */ 180 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAIPIC_LR, 0); 181 182 /* Exit idle mode only when unmasked intr is received */ 183 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAIPIC_CR, 1); 184 185 /* disable all DMAC channels */ 186 bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR0_CLR, 1); 187 bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR1_CLR, 1); 188 bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR2_CLR, 1); 189 bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR3_CLR, 1); 190 bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR4_CLR, 1); 191 bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR5_CLR, 1); 192 193 /* 194 * XXX this is probably a bad place, but intr bit shouldn't be 195 * XXX enabled before intr mask is set. 196 * XXX Having sane imask[] suffice?? 197 */ 198 SetCPSR(I32_bit, 0); 199 200 /* 201 * Attach each devices 202 */ 203 config_search(sa11x0_search, self, NULL); 204 } 205 206 int 207 sa11x0_search(parent, cf, aux) 208 struct device *parent; 209 struct cfdata *cf; 210 void *aux; 211 { 212 struct sa11x0_softc *sc = (struct sa11x0_softc *)parent; 213 struct sa11x0_attach_args sa; 214 215 sa.sa_sc = sc; 216 sa.sa_iot = sc->sc_iot; 217 sa.sa_addr = cf->cf_loc[SAIPCF_ADDR]; 218 sa.sa_size = cf->cf_loc[SAIPCF_SIZE]; 219 sa.sa_membase = cf->cf_loc[SAIPCF_MEMBASE]; 220 sa.sa_memsize = cf->cf_loc[SAIPCF_MEMSIZE]; 221 sa.sa_intr = cf->cf_loc[SAIPCF_INTR]; 222 sa.sa_gpio = cf->cf_loc[SAIPCF_GPIO]; 223 224 if (config_match(parent, cf, &sa) > 0) 225 config_attach(parent, cf, &sa, sa11x0_print); 226 227 return 0; 228 } 229
Indexes created Wed Oct 01 13:09:50 GMT 2025