sa11x0_gpioreg.h revision 1.1 1 1.1 rjs /* $NetBSD: sa11x0_gpioreg.h,v 1.1 2001/07/08 23:37:53 rjs Exp $ */
2 1.1 rjs
3 1.1 rjs /*-
4 1.1 rjs * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
5 1.1 rjs *
6 1.1 rjs * This code is derived from software contributed to The NetBSD Foundation
7 1.1 rjs * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
8 1.1 rjs *
9 1.1 rjs * Redistribution and use in source and binary forms, with or without
10 1.1 rjs * modification, are permitted provided that the following conditions
11 1.1 rjs * are met:
12 1.1 rjs * 1. Redistributions of source code must retain the above copyright
13 1.1 rjs * notice, this list of conditions and the following disclaimer.
14 1.1 rjs * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 rjs * notice, this list of conditions and the following disclaimer in the
16 1.1 rjs * documentation and/or other materials provided with the distribution.
17 1.1 rjs * 3. All advertising materials mentioning features or use of this software
18 1.1 rjs * must display the following acknowledgement:
19 1.1 rjs * This product includes software developed by the NetBSD
20 1.1 rjs * Foundation, Inc. and its contributors.
21 1.1 rjs * 4. Neither the name of The NetBSD Foundation nor the names of its
22 1.1 rjs * contributors may be used to endorse or promote products derived
23 1.1 rjs * from this software without specific prior written permission.
24 1.1 rjs *
25 1.1 rjs * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 1.1 rjs * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 rjs * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 rjs * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 1.1 rjs * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 rjs * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 rjs * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 rjs * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 rjs * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 rjs * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 rjs * POSSIBILITY OF SUCH DAMAGE.
36 1.1 rjs */
37 1.1 rjs
38 1.1 rjs /*
39 1.1 rjs * SA-11x0 GPIO Register
40 1.1 rjs */
41 1.1 rjs
42 1.1 rjs #define SAGPIO_NPORTS 8
43 1.1 rjs
44 1.1 rjs /* GPIO pin-level register */
45 1.1 rjs #define SAGPIO_PLR 0x00
46 1.1 rjs
47 1.1 rjs /* GPIO pin direction register */
48 1.1 rjs #define SAGPIO_PDR 0x04
49 1.1 rjs
50 1.1 rjs /* GPIO pin output set register */
51 1.1 rjs #define SAGPIO_PSR 0x08
52 1.1 rjs
53 1.1 rjs /* GPIO pin output clear register */
54 1.1 rjs #define SAGPIO_PCR 0x0C
55 1.1 rjs
56 1.1 rjs /* GPIO rising-edge detect register */
57 1.1 rjs #define SAGPIO_RER 0x10
58 1.1 rjs
59 1.1 rjs /* GPIO falling-edge detect register */
60 1.1 rjs #define SAGPIO_FER 0x14
61 1.1 rjs
62 1.1 rjs /* GPIO edge-detect status register */
63 1.1 rjs #define SAGPIO_EDR 0x18
64 1.1 rjs
65 1.1 rjs /* GPIO alternate function register */
66 1.1 rjs #define SAGPIO_AFR 0x1C
67 1.1 rjs
68 1.1 rjs /* XXX */
69 1.1 rjs #define GPIO(x) (0x00000001 << (x))
70 1.1 rjs
71 1.1 rjs /*
72 1.1 rjs * iPAQ H3600 specific parameter
73 1.1 rjs */
74 1.1 rjs /*
75 1.1 rjs port I/O(Active) name desc
76 1.1 rjs 0 I(L) PWR_ON# button detect: power-on
77 1.1 rjs 1 I(L) IP_IRQ# cpu-interrupt
78 1.1 rjs 2...9 O LDD{8..15} LCD DATA(8-15)
79 1.1 rjs 10 I(L) CARD_IND1# PCMCIA Socket1 inserted detection
80 1.1 rjs 11 I(L) CARD_IRQ1# PCMCIA slot1 IRQ
81 1.1 rjs 12 O CLK_SET0 clock select 0 for audio codec
82 1.1 rjs 13 O CLK_SET1 clock select 1 for audio codec
83 1.1 rjs 14 I/O L3_SDA UDA1341 L3DATA
84 1.1 rjs 15 O L3_MODE UDA1341 L3MODE
85 1.1 rjs 16 O L3_SCLK UDA1341 L3SCLK
86 1.1 rjs 17 I(L) CARD_IND0# PCMCIA Socket0 inserted detection
87 1.1 rjs 18 I(L) KEY_ACT# button detect: center button
88 1.1 rjs 19 I SYS_CLK Stereo audio codev external clock
89 1.1 rjs 20 I(H) BAT_FAULT Battery fault
90 1.1 rjs 21 I(L) CARD_IRQ0# PCMCIA slot0 IRQ
91 1.1 rjs 22 I(L) LOCK# expansion pack lock/unlock signal
92 1.1 rjs 23 I(H) COM_DCD RS-232 DCD
93 1.1 rjs 24 I(H) OPT_IRQ expansion pach shared IRQ
94 1.1 rjs 25 I(H) COM_CTS RS-232 CTS
95 1.1 rjs 26 O(H) COM_RTS RS-232 RTS
96 1.1 rjs 27 O(L) OPT_DETECT# Indicates presence of expansion pack inserted
97 1.1 rjs
98 1.1 rjs Extended GPIO
99 1.1 rjs 0 O(H) VPEN Enables programming and erasing of Flash
100 1.1 rjs 1 O(H) CARD_RESET CF/PCMCIA card reset signal
101 1.1 rjs 2 O(H) OPT_RESET Expansion pack reset signal
102 1.1 rjs 3 O(L) CODEC_RESET# onboard codec reset signal
103 1.1 rjs 4 O(H) OPT_NVRAM_ON Enables power supply to the NVRAM of the
104 1.1 rjs Expansion pack.(=OPT_ON)
105 1.1 rjs 5 O(H) OPT_ON Enables full power supply to the Expansion pack.
106 1.1 rjs 6 O(H) LCD_ON Enables LCD 3.3V power supply
107 1.1 rjs 7 O(H) RS232_ON Enables RS232
108 1.1 rjs 8 O(H) LCD_PCI Enables power to LCD control IC
109 1.1 rjs 9 O(H) IR_ON Enables power to IR module
110 1.1 rjs 10 O(H) AUD_ON Enables power to audio output amp.
111 1.1 rjs 11 O(H) AUD_PWR_ON Enables power to all audio modules.
112 1.1 rjs 12 O(H) QMUTE Mutes yhe onboard audio codec
113 1.1 rjs 13 O IR_FSEL FIR mode selection:H=FIR,L=SIR
114 1.1 rjs 14 O(H) LCD_5V_ON Enables 5V to the LCD module
115 1.1 rjs 15 O(H) LVDD_ON Enables 9V and -6.5V to the LCD module
116 1.1 rjs */
117 1.1 rjs
118 1.1 rjs #define GPIO_H3600_POWER_BUTTON GPIO (0)
119 1.1 rjs #define GPIO_H3600_PCMCIA_CD0 GPIO (17)
120 1.1 rjs #define GPIO_H3600_PCMCIA_CD1 GPIO (10)
121 1.1 rjs #define GPIO_H3600_PCMCIA_IRQ0 GPIO (21)
122 1.1 rjs #define GPIO_H3600_PCMCIA_IRQ1 GPIO (11)
123 1.1 rjs #define GPIO_H3600_OPT_LOCK GPIO (22)
124 1.1 rjs #define GPIO_H3600_OPT_IRQ GPIO (24)
125 1.1 rjs #define GPIO_H3600_OPT_DETECT GPIO (27)
126 1.1 rjs
127 1.1 rjs #define EGPIO_H3600_VPEN GPIO (0)
128 1.1 rjs #define EGPIO_H3600_CARD_RESET GPIO (1)
129 1.1 rjs #define EGPIO_H3600_OPT_RESET GPIO (2)
130 1.1 rjs #define EGPIO_H3600_CODEC_RESET GPIO (3)
131 1.1 rjs #define EGPIO_H3600_OPT_NVRAM_ON GPIO (4)
132 1.1 rjs #define EGPIO_H3600_OPT_ON GPIO (5)
133 1.1 rjs #define EGPIO_H3600_LCD33_ON GPIO (6)
134 1.1 rjs #define EGPIO_H3600_RS232_ON GPIO (7)
135 1.1 rjs #define EGPIO_H3600_LCD_PCI GPIO (8)
136 1.1 rjs #define EGPIO_H3600_IR_ON GPIO (9)
137 1.1 rjs #define EGPIO_H3600_AUD_ON GPIO (10)
138 1.1 rjs #define EGPIO_H3600_AUD_PWRON GPIO (11)
139 1.1 rjs #define EGPIO_H3600_QMUTE GPIO (12)
140 1.1 rjs #define EGPIO_H3600_IR_FSEL GPIO (13)
141 1.1 rjs #define EGPIO_H3600_LCD5_ON GPIO (14)
142 1.1 rjs #define EGPIO_H3600_LVDD_ON GPIO (15)
143 1.1 rjs
144 1.1 rjs #define EGPIO_INIT (EGPIO_H3600_OPT_NVRAM_ON| \
145 1.1 rjs EGPIO_H3600_LCD33_ON| \
146 1.1 rjs EGPIO_H3600_LCD_PCI| \
147 1.1 rjs EGPIO_H3600_AUD_ON) & 0xFFFF
148 1.1 rjs
149 1.1 rjs #define EGPIO_LCD_INIT EGPIO_H3600_LCD33_ON| \
150 1.1 rjs EGPIO_H3600_LCD_PCI| \
151 1.1 rjs EGPIO_H3600_LCD5_ON| \
152 1.1 rjs EGPIO_H3600_LVDD_ON
153 1.1 rjs
154 1.1 rjs #define IRQ_H3600_POWER_BUTTON IRQ_GPIO0
155 1.1 rjs #define IRQ_H3600_PCMCIA_CD0 IRQ_GPIO17
156 1.1 rjs #define IRQ_H3600_PCMCIA_CD1 IRQ_GPIO10
157 1.1 rjs #define IRQ_H3600_PCMCIA_IRQ0 IRQ_GPIO21
158 1.1 rjs #define IRQ_H3600_PCMCIA_IRQ1 IRQ_GPIO11
159 1.1 rjs #define IRQ_H3600_OPT_IRQ IRQ_GPIO24
160 1.1 rjs #define IRQ_H3600_OPT_DETECT IRQ_GPIO27
161 1.1 rjs
162 1.1 rjs /*
163 1.1 rjs * JORNADA720 specific parameter
164 1.1 rjs */
165 1.1 rjs
166 1.1 rjs #define JORNADA720_KBD_IRQ GPIO (0)
167 1.1 rjs #define JORNADA720_MOUSE_IRQ GPIO (9)
168