sa11x0_gpioreg.h revision 1.2 1 /* $NetBSD: sa11x0_gpioreg.h,v 1.2 2001/07/30 15:58:56 rjs Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the NetBSD
20 * Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 * contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * SA-11x0 GPIO Register
40 */
41
42 #define SAGPIO_NPORTS 8
43
44 /* GPIO pin-level register */
45 #define SAGPIO_PLR 0x00
46
47 /* GPIO pin direction register */
48 #define SAGPIO_PDR 0x04
49
50 /* GPIO pin output set register */
51 #define SAGPIO_PSR 0x08
52
53 /* GPIO pin output clear register */
54 #define SAGPIO_PCR 0x0C
55
56 /* GPIO rising-edge detect register */
57 #define SAGPIO_RER 0x10
58
59 /* GPIO falling-edge detect register */
60 #define SAGPIO_FER 0x14
61
62 /* GPIO edge-detect status register */
63 #define SAGPIO_EDR 0x18
64
65 /* GPIO alternate function register */
66 #define SAGPIO_AFR 0x1C
67
68 /* XXX */
69 #define GPIO(x) (0x00000001 << (x))
70
71 /*
72 * SA-11x0 GPIOs parameter
73 */
74 /*
75 port name desc
76 0 Reserved
77 1 Reserved
78 2...9 LDD{8..15} LCD DATA(8-15)
79 10 SSP_TXD SSP transmit
80 11 SSP_RXD SSP receive
81 12 SSP_SCLK SSP serial clock
82 13 SSP_SFRM SSP frameclock
83 14 UART_TXD UART transmit
84 15 UART_RXD UART receive
85 16 GPCLK_OUT General-purpose clock out
86 17 Reserved
87 18 UART_SCLK Sample clock input
88 19 SSP_CLK Sample clock input
89 20 UART_SCLK3 Sample clock input
90 21 MCP_CLK MCP dock in
91 22 TREQA Either TIC request A
92 23 TREQB Either TIC request B
93 24 Reserved
94 25 RTC Real Time Clock
95 26 RCLK_OUT internal clock /2
96 27 32KHZ_OUT Raw 32.768kHz osc output
97 */
98