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sa11x0_irqhandler.c revision 1.7
      1  1.7  peter /*	$NetBSD: sa11x0_irqhandler.c,v 1.7 2006/03/04 17:22:06 peter Exp $	*/
      2  1.1    rjs 
      3  1.1    rjs /*-
      4  1.1    rjs  * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
      5  1.1    rjs  * All rights reserved.
      6  1.1    rjs  *
      7  1.1    rjs  * This code is derived from software contributed to the NetBSD Foundation
      8  1.1    rjs  * by IWAMOTO Toshihiro.
      9  1.1    rjs  *
     10  1.1    rjs  * This code is derived from software contributed to The NetBSD Foundation
     11  1.1    rjs  * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
     12  1.1    rjs  * Simulation Facility, NASA Ames Research Center.
     13  1.1    rjs  *
     14  1.1    rjs  * Redistribution and use in source and binary forms, with or without
     15  1.1    rjs  * modification, are permitted provided that the following conditions
     16  1.1    rjs  * are met:
     17  1.1    rjs  * 1. Redistributions of source code must retain the above copyright
     18  1.1    rjs  *    notice, this list of conditions and the following disclaimer.
     19  1.1    rjs  * 2. Redistributions in binary form must reproduce the above copyright
     20  1.1    rjs  *    notice, this list of conditions and the following disclaimer in the
     21  1.1    rjs  *    documentation and/or other materials provided with the distribution.
     22  1.1    rjs  * 3. All advertising materials mentioning features or use of this software
     23  1.1    rjs  *    must display the following acknowledgement:
     24  1.1    rjs  *	This product includes software developed by the NetBSD
     25  1.1    rjs  *	Foundation, Inc. and its contributors.
     26  1.1    rjs  * 4. Neither the name of The NetBSD Foundation nor the names of its
     27  1.1    rjs  *    contributors may be used to endorse or promote products derived
     28  1.1    rjs  *    from this software without specific prior written permission.
     29  1.1    rjs  *
     30  1.1    rjs  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     31  1.1    rjs  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     32  1.1    rjs  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     33  1.1    rjs  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     34  1.1    rjs  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     35  1.1    rjs  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     36  1.1    rjs  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     37  1.1    rjs  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     38  1.1    rjs  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     39  1.1    rjs  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     40  1.1    rjs  * POSSIBILITY OF SUCH DAMAGE.
     41  1.1    rjs  */
     42  1.1    rjs 
     43  1.1    rjs /*-
     44  1.1    rjs  * Copyright (c) 1991 The Regents of the University of California.
     45  1.1    rjs  * All rights reserved.
     46  1.1    rjs  *
     47  1.1    rjs  * This code is derived from software contributed to Berkeley by
     48  1.1    rjs  * William Jolitz.
     49  1.1    rjs  *
     50  1.1    rjs  * Redistribution and use in source and binary forms, with or without
     51  1.1    rjs  * modification, are permitted provided that the following conditions
     52  1.1    rjs  * are met:
     53  1.1    rjs  * 1. Redistributions of source code must retain the above copyright
     54  1.1    rjs  *    notice, this list of conditions and the following disclaimer.
     55  1.1    rjs  * 2. Redistributions in binary form must reproduce the above copyright
     56  1.1    rjs  *    notice, this list of conditions and the following disclaimer in the
     57  1.1    rjs  *    documentation and/or other materials provided with the distribution.
     58  1.5    agc  * 3. Neither the name of the University nor the names of its contributors
     59  1.1    rjs  *    may be used to endorse or promote products derived from this software
     60  1.1    rjs  *    without specific prior written permission.
     61  1.1    rjs  *
     62  1.1    rjs  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     63  1.1    rjs  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     64  1.1    rjs  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     65  1.1    rjs  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     66  1.1    rjs  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     67  1.1    rjs  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     68  1.1    rjs  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     69  1.1    rjs  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     70  1.1    rjs  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     71  1.1    rjs  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     72  1.1    rjs  * SUCH DAMAGE.
     73  1.1    rjs  *
     74  1.1    rjs  *	@(#)isa.c	7.2 (Berkeley) 5/13/91
     75  1.1    rjs  */
     76  1.1    rjs 
     77  1.4  lukem 
     78  1.4  lukem #include <sys/cdefs.h>
     79  1.7  peter __KERNEL_RCSID(0, "$NetBSD: sa11x0_irqhandler.c,v 1.7 2006/03/04 17:22:06 peter Exp $");
     80  1.1    rjs 
     81  1.1    rjs #include "opt_irqstats.h"
     82  1.1    rjs 
     83  1.1    rjs #include <sys/param.h>
     84  1.1    rjs #include <sys/kernel.h>
     85  1.1    rjs #include <sys/systm.h>
     86  1.1    rjs #include <sys/syslog.h>
     87  1.1    rjs #include <sys/malloc.h>
     88  1.1    rjs #include <uvm/uvm_extern.h>
     89  1.1    rjs 
     90  1.1    rjs #include <arm/sa11x0/sa11x0_reg.h>
     91  1.1    rjs #include <arm/sa11x0/sa11x0_var.h>
     92  1.1    rjs 
     93  1.1    rjs #include <machine/intr.h>
     94  1.1    rjs #include <machine/cpu.h>
     95  1.1    rjs 
     96  1.1    rjs irqhandler_t *irqhandlers[NIRQS];
     97  1.1    rjs 
     98  1.1    rjs int current_intr_depth;
     99  1.1    rjs u_int actual_mask;
    100  1.1    rjs #ifdef hpcarm
    101  1.1    rjs #define IPL_LEVELS (NIPL+1)
    102  1.1    rjs u_int imask[NIPL];
    103  1.1    rjs #else
    104  1.1    rjs u_int spl_mask;
    105  1.1    rjs u_int irqmasks[IPL_LEVELS];
    106  1.1    rjs #endif
    107  1.1    rjs u_int irqblock[NIRQS];
    108  1.1    rjs 
    109  1.1    rjs 
    110  1.3    chs extern void set_spl_masks(void);
    111  1.1    rjs static int fakeintr(void *);
    112  1.1    rjs #ifdef DEBUG
    113  1.3    chs static int dumpirqhandlers(void);
    114  1.1    rjs #endif
    115  1.3    chs void intr_calculatemasks(void);
    116  1.3    chs 
    117  1.3    chs const struct evcnt *sa11x0_intr_evcnt(sa11x0_chipset_tag_t, int);
    118  1.3    chs void stray_irqhandler(void *);
    119  1.3    chs 
    120  1.1    rjs /*
    121  1.1    rjs  * Recalculate the interrupt masks from scratch.
    122  1.1    rjs  * We could code special registry and deregistry versions of this function that
    123  1.1    rjs  * would be faster, but the code would be nastier, and we don't expect this to
    124  1.1    rjs  * happen very much anyway.
    125  1.1    rjs  */
    126  1.1    rjs void
    127  1.3    chs intr_calculatemasks(void)
    128  1.1    rjs {
    129  1.1    rjs 	int irq, level;
    130  1.1    rjs 	struct irqhandler *q;
    131  1.1    rjs 	int intrlevel[ICU_LEN];
    132  1.1    rjs 
    133  1.1    rjs 	/* First, figure out which levels each IRQ uses. */
    134  1.1    rjs 	for (irq = 0; irq < ICU_LEN; irq++) {
    135  1.1    rjs 		int levels = 0;
    136  1.1    rjs 		for (q = irqhandlers[irq]; q; q = q->ih_next)
    137  1.1    rjs 			levels |= 1 << q->ih_level;
    138  1.1    rjs 		intrlevel[irq] = levels;
    139  1.1    rjs 	}
    140  1.1    rjs 
    141  1.1    rjs 	/* Then figure out which IRQs use each level. */
    142  1.1    rjs #ifdef hpcarm
    143  1.1    rjs 	for (level = 0; level < NIPL; level++) {
    144  1.1    rjs #else
    145  1.1    rjs 	for (level = 0; level <= IPL_LEVELS; level++) {
    146  1.1    rjs #endif
    147  1.1    rjs 		int irqs = 0;
    148  1.1    rjs 		for (irq = 0; irq < ICU_LEN; irq++)
    149  1.1    rjs 			if (intrlevel[irq] & (1 << level))
    150  1.1    rjs 				irqs |= 1 << irq;
    151  1.1    rjs #ifdef hpcarm
    152  1.1    rjs 		imask[level] = irqs;
    153  1.1    rjs #else
    154  1.1    rjs 		irqmasks[level] = irqs;
    155  1.1    rjs #endif
    156  1.1    rjs 	}
    157  1.1    rjs 
    158  1.1    rjs 	/*
    159  1.1    rjs 	 * Enforce a hierarchy that gives slow devices a better chance at not
    160  1.1    rjs 	 * dropping data.
    161  1.1    rjs 	 */
    162  1.1    rjs #ifdef hpcarm
    163  1.1    rjs 	for (level = NIPL - 1; level > 0; level--)
    164  1.1    rjs 		imask[level - 1] |= imask[level];
    165  1.1    rjs #else
    166  1.1    rjs 	for (level = IPL_LEVELS; level > 0; level--)
    167  1.1    rjs 		irqmasks[level - 1] |= irqmasks[level];
    168  1.1    rjs #endif
    169  1.1    rjs 	/*
    170  1.1    rjs 	 * Calculate irqblock[], which emulates hardware interrupt levels.
    171  1.1    rjs 	 */
    172  1.1    rjs 	for (irq = 0; irq < ICU_LEN; irq++) {
    173  1.1    rjs 		int irqs = 1 << irq;
    174  1.1    rjs 		for (q = irqhandlers[irq]; q; q = q->ih_next)
    175  1.1    rjs #ifdef hpcarm
    176  1.1    rjs 			irqs |= ~imask[q->ih_level];
    177  1.1    rjs #else
    178  1.1    rjs 			irqs |= ~irqmasks[q->ih_level];
    179  1.1    rjs #endif
    180  1.1    rjs 		irqblock[irq] = irqs;
    181  1.1    rjs 	}
    182  1.1    rjs }
    183  1.1    rjs 
    184  1.1    rjs 
    185  1.1    rjs const struct evcnt *
    186  1.1    rjs sa11x0_intr_evcnt(sa11x0_chipset_tag_t ic, int irq)
    187  1.1    rjs {
    188  1.1    rjs 
    189  1.1    rjs 	/* XXX for now, no evcnt parent reported */
    190  1.1    rjs 	return NULL;
    191  1.1    rjs }
    192  1.1    rjs 
    193  1.1    rjs void *
    194  1.1    rjs sa11x0_intr_establish(sa11x0_chipset_tag_t ic, int irq, int type, int level,
    195  1.7  peter     int (*ih_fun)(void *), void *ih_arg)
    196  1.1    rjs {
    197  1.1    rjs 	int saved_cpsr;
    198  1.1    rjs 	struct irqhandler **p, *q, *ih;
    199  1.1    rjs 	static struct irqhandler fakehand = {fakeintr};
    200  1.1    rjs 
    201  1.1    rjs 	/* no point in sleeping unless someone can free memory. */
    202  1.1    rjs 	ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
    203  1.1    rjs 	if (ih == NULL)
    204  1.1    rjs 		panic("sa11x0_intr_establish: can't malloc handler info");
    205  1.1    rjs 
    206  1.1    rjs 	if (irq < 0 || irq >= ICU_LEN || type == IST_NONE)
    207  1.1    rjs 		panic("intr_establish: bogus irq or type");
    208  1.1    rjs 
    209  1.1    rjs 	/* All interrupts are level intrs. */
    210  1.1    rjs 
    211  1.1    rjs 	/*
    212  1.1    rjs 	 * Figure out where to put the handler.
    213  1.1    rjs 	 * This is O(N^2), but we want to preserve the order, and N is
    214  1.1    rjs 	 * generally small.
    215  1.1    rjs 	 */
    216  1.1    rjs 	for (p = &irqhandlers[irq]; (q = *p) != NULL; p = &q->ih_next)
    217  1.1    rjs 		;
    218  1.1    rjs 
    219  1.1    rjs 	/*
    220  1.1    rjs 	 * Actually install a fake handler momentarily, since we might be doing
    221  1.1    rjs 	 * this with interrupts enabled and don't want the real routine called
    222  1.1    rjs 	 * until masking is set up.
    223  1.1    rjs 	 */
    224  1.1    rjs 	fakehand.ih_level = level;
    225  1.1    rjs 	*p = &fakehand;
    226  1.1    rjs 
    227  1.1    rjs 	intr_calculatemasks();
    228  1.1    rjs 
    229  1.1    rjs 	/*
    230  1.1    rjs 	 * Poke the real handler in now.
    231  1.1    rjs 	 */
    232  1.1    rjs 	ih->ih_func = ih_fun;
    233  1.1    rjs 	ih->ih_arg = ih_arg;
    234  1.1    rjs #ifdef hpcarm
    235  1.1    rjs 	ih->ih_count = 0;
    236  1.1    rjs #else
    237  1.1    rjs 	ih->ih_num = 0;
    238  1.1    rjs #endif
    239  1.1    rjs 	ih->ih_next = NULL;
    240  1.1    rjs 	ih->ih_level = level;
    241  1.1    rjs #ifdef hpcarm
    242  1.1    rjs 	ih->ih_irq = irq;
    243  1.1    rjs #endif
    244  1.1    rjs 	ih->ih_name = NULL; /* XXX */
    245  1.1    rjs 	*p = ih;
    246  1.1    rjs 
    247  1.1    rjs 	saved_cpsr = SetCPSR(I32_bit, I32_bit);
    248  1.1    rjs 	set_spl_masks();
    249  1.1    rjs 
    250  1.1    rjs 	irq_setmasks();
    251  1.1    rjs 
    252  1.1    rjs 	SetCPSR(I32_bit, saved_cpsr & I32_bit);
    253  1.1    rjs #ifdef DEBUG
    254  1.1    rjs 	dumpirqhandlers();
    255  1.1    rjs #endif
    256  1.1    rjs 	return (ih);
    257  1.1    rjs }
    258  1.1    rjs 
    259  1.1    rjs #ifdef hpcarm
    260  1.1    rjs /*
    261  1.1    rjs  * Deregister an interrupt handler.
    262  1.1    rjs  */
    263  1.1    rjs void
    264  1.1    rjs sa11x0_intr_disestablish(sa11x0_chipset_tag_t ic, void *arg)
    265  1.1    rjs {
    266  1.1    rjs 	struct irqhandler *ih = arg;
    267  1.1    rjs 	int irq = ih->ih_irq;
    268  1.1    rjs 	int saved_cpsr;
    269  1.1    rjs 	struct irqhandler **p, *q;
    270  1.1    rjs 
    271  1.1    rjs #if DIAGNOSTIC
    272  1.1    rjs 	if (irq < 0 || irq >= ICU_LEN)
    273  1.1    rjs 		panic("intr_disestablish: bogus irq");
    274  1.1    rjs #endif
    275  1.1    rjs 
    276  1.1    rjs 	/*
    277  1.1    rjs 	 * Remove the handler from the chain.
    278  1.1    rjs 	 * This is O(n^2), too.
    279  1.1    rjs 	 */
    280  1.1    rjs 	for (p = &irqhandlers[irq]; (q = *p) != NULL && q != ih;
    281  1.1    rjs 	     p = &q->ih_next)
    282  1.1    rjs 		;
    283  1.1    rjs 	if (q)
    284  1.1    rjs 		*p = q->ih_next;
    285  1.1    rjs 	else
    286  1.1    rjs 		panic("intr_disestablish: handler not registered");
    287  1.1    rjs 	free(ih, M_DEVBUF);
    288  1.1    rjs 
    289  1.1    rjs 	intr_calculatemasks();
    290  1.1    rjs 	saved_cpsr = SetCPSR(I32_bit, I32_bit);
    291  1.1    rjs 	set_spl_masks();
    292  1.1    rjs 
    293  1.1    rjs 	irq_setmasks();
    294  1.1    rjs 	SetCPSR(I32_bit, saved_cpsr & I32_bit);
    295  1.1    rjs 
    296  1.1    rjs }
    297  1.1    rjs #endif
    298  1.1    rjs 
    299  1.1    rjs void
    300  1.1    rjs stray_irqhandler(void *p)
    301  1.1    rjs {
    302  1.1    rjs 
    303  1.1    rjs 	printf("stray interrupt\n");
    304  1.1    rjs }
    305  1.1    rjs 
    306  1.1    rjs int
    307  1.1    rjs fakeintr(void *p)
    308  1.1    rjs {
    309  1.1    rjs 
    310  1.1    rjs 	return 0;
    311  1.1    rjs }
    312  1.1    rjs 
    313  1.1    rjs #ifdef DEBUG
    314  1.1    rjs int
    315  1.7  peter dumpirqhandlers(void)
    316  1.1    rjs {
    317  1.1    rjs 	int irq;
    318  1.1    rjs 	struct irqhandler *p;
    319  1.1    rjs 
    320  1.1    rjs 	for (irq = 0; irq < ICU_LEN; irq++) {
    321  1.1    rjs 		printf("irq %d:", irq);
    322  1.1    rjs 		p = irqhandlers[irq];
    323  1.1    rjs 		for (; p; p = p->ih_next)
    324  1.1    rjs 			printf("ih_func: 0x%lx, ", (unsigned long)p->ih_func);
    325  1.1    rjs 		printf("\n");
    326  1.1    rjs 	}
    327  1.1    rjs 	return 0;
    328  1.1    rjs }
    329  1.1    rjs #endif
    330  1.1    rjs /* End of irqhandler.c */
    331