sa11x0_irqhandler.c revision 1.14 1 /* $NetBSD: sa11x0_irqhandler.c,v 1.14 2008/04/27 18:58:45 matt Exp $ */
2
3 /*-
4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to the NetBSD Foundation
8 * by IWAMOTO Toshihiro.
9 *
10 * This code is derived from software contributed to The NetBSD Foundation
11 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
12 * Simulation Facility, NASA Ames Research Center.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 * 3. All advertising materials mentioning features or use of this software
23 * must display the following acknowledgement:
24 * This product includes software developed by the NetBSD
25 * Foundation, Inc. and its contributors.
26 * 4. Neither the name of The NetBSD Foundation nor the names of its
27 * contributors may be used to endorse or promote products derived
28 * from this software without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 * POSSIBILITY OF SUCH DAMAGE.
41 */
42
43 /*-
44 * Copyright (c) 1991 The Regents of the University of California.
45 * All rights reserved.
46 *
47 * This code is derived from software contributed to Berkeley by
48 * William Jolitz.
49 *
50 * Redistribution and use in source and binary forms, with or without
51 * modification, are permitted provided that the following conditions
52 * are met:
53 * 1. Redistributions of source code must retain the above copyright
54 * notice, this list of conditions and the following disclaimer.
55 * 2. Redistributions in binary form must reproduce the above copyright
56 * notice, this list of conditions and the following disclaimer in the
57 * documentation and/or other materials provided with the distribution.
58 * 3. Neither the name of the University nor the names of its contributors
59 * may be used to endorse or promote products derived from this software
60 * without specific prior written permission.
61 *
62 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
63 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
66 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
67 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
68 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72 * SUCH DAMAGE.
73 *
74 * @(#)isa.c 7.2 (Berkeley) 5/13/91
75 */
76
77
78 #include <sys/cdefs.h>
79 __KERNEL_RCSID(0, "$NetBSD: sa11x0_irqhandler.c,v 1.14 2008/04/27 18:58:45 matt Exp $");
80
81 #include "opt_irqstats.h"
82
83 #include <sys/param.h>
84 #include <sys/kernel.h>
85 #include <sys/systm.h>
86 #include <sys/syslog.h>
87 #include <sys/malloc.h>
88 #include <uvm/uvm_extern.h>
89
90 #include <arm/sa11x0/sa11x0_reg.h>
91 #include <arm/sa11x0/sa11x0_var.h>
92
93 #include <machine/intr.h>
94 #include <machine/cpu.h>
95
96 irqhandler_t *irqhandlers[NIRQS];
97
98 u_int actual_mask;
99 u_int irqmasks[NIPL];
100
101 extern void set_spl_masks(void);
102 static int fakeintr(void *);
103 #ifdef INTR_DEBUG
104 static int dumpirqhandlers(void);
105 #endif
106 void intr_calculatemasks(void);
107
108 const struct evcnt *sa11x0_intr_evcnt(sa11x0_chipset_tag_t, int);
109 void stray_irqhandler(void *);
110
111 #if IPL_NONE > IPL_HIGH
112 #error IPL_NONE must be less than IPL_HIGH
113 #endif
114 /*
115 * Recalculate the interrupt masks from scratch.
116 * We could code special registry and deregistry versions of this function that
117 * would be faster, but the code would be nastier, and we don't expect this to
118 * happen very much anyway.
119 */
120 void
121 intr_calculatemasks(void)
122 {
123 int irq, ipl;
124 struct irqhandler *q;
125 int intrlevel[ICU_LEN];
126
127 /* First, figure out which levels each IRQ uses. */
128 for (irq = 0; irq < ICU_LEN; irq++) {
129 int ipls = 0;
130 for (q = irqhandlers[irq]; q; q = q->ih_next)
131 ipls |= 1 << q->ih_level;
132 intrlevel[irq] = ipls;
133 }
134
135 /* Then figure out which IRQs use each level. */
136 for (ipl = 0; ipl < NIPL; ipl++) {
137 int irqs = 0;
138 for (irq = 0; irq < ICU_LEN; irq++)
139 if (intrlevel[irq] & (1 << ipl))
140 irqs |= 1 << irq;
141 irqmasks[ipl] = irqs;
142 }
143
144 /*
145 * Enforce a hierarchy that gives slow devices a better chance at not
146 * dropping data.
147 */
148 for (ipl = IPL_NONE; ipl < NIPL - 1; ipl++)
149 irqmasks[ipl + 1] |= irqmasks[ipl];
150 }
151
152
153 const struct evcnt *
154 sa11x0_intr_evcnt(sa11x0_chipset_tag_t ic, int irq)
155 {
156
157 /* XXX for now, no evcnt parent reported */
158 return NULL;
159 }
160
161 void *
162 sa11x0_intr_establish(sa11x0_chipset_tag_t ic, int irq, int type, int level,
163 int (*ih_fun)(void *), void *ih_arg)
164 {
165 int saved_cpsr;
166 struct irqhandler **p, *q, *ih;
167 static struct irqhandler fakehand = {fakeintr};
168
169 /* no point in sleeping unless someone can free memory. */
170 ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
171 if (ih == NULL)
172 panic("sa11x0_intr_establish: can't malloc handler info");
173
174 if (irq < 0 || irq >= ICU_LEN || type == IST_NONE)
175 panic("intr_establish: bogus irq or type");
176
177 /* All interrupts are level intrs. */
178
179 /*
180 * Figure out where to put the handler.
181 * This is O(N^2), but we want to preserve the order, and N is
182 * generally small.
183 */
184 for (p = &irqhandlers[irq]; (q = *p) != NULL; p = &q->ih_next)
185 continue;
186
187 /*
188 * Actually install a fake handler momentarily, since we might be doing
189 * this with interrupts enabled and don't want the real routine called
190 * until masking is set up.
191 */
192 fakehand.ih_level = level;
193 *p = &fakehand;
194
195 intr_calculatemasks();
196
197 /*
198 * Poke the real handler in now.
199 */
200 ih->ih_func = ih_fun;
201 ih->ih_arg = ih_arg;
202 #ifdef hpcarm
203 ih->ih_count = 0;
204 #else
205 ih->ih_num = 0;
206 #endif
207 ih->ih_next = NULL;
208 ih->ih_level = level;
209 #ifdef hpcarm
210 ih->ih_irq = irq;
211 #endif
212 ih->ih_name = NULL; /* XXX */
213 *p = ih;
214
215 saved_cpsr = SetCPSR(I32_bit, I32_bit);
216 set_spl_masks();
217
218 irq_setmasks();
219
220 SetCPSR(I32_bit, saved_cpsr & I32_bit);
221 #ifdef INTR_DEBUG
222 dumpirqhandlers();
223 #endif
224 return ih;
225 }
226
227 #ifdef hpcarm
228 /*
229 * Deregister an interrupt handler.
230 */
231 void
232 sa11x0_intr_disestablish(sa11x0_chipset_tag_t ic, void *arg)
233 {
234 struct irqhandler *ih = arg;
235 int irq = ih->ih_irq;
236 int saved_cpsr;
237 struct irqhandler **p, *q;
238
239 #if DIAGNOSTIC
240 if (irq < 0 || irq >= ICU_LEN)
241 panic("intr_disestablish: bogus irq");
242 #endif
243
244 /*
245 * Remove the handler from the chain.
246 * This is O(n^2), too.
247 */
248 for (p = &irqhandlers[irq]; (q = *p) != NULL && q != ih;
249 p = &q->ih_next)
250 continue;
251 if (q)
252 *p = q->ih_next;
253 else
254 panic("intr_disestablish: handler not registered");
255 free(ih, M_DEVBUF);
256
257 intr_calculatemasks();
258 saved_cpsr = SetCPSR(I32_bit, I32_bit);
259 set_spl_masks();
260
261 irq_setmasks();
262 SetCPSR(I32_bit, saved_cpsr & I32_bit);
263
264 }
265 #endif
266
267 void
268 stray_irqhandler(void *p)
269 {
270
271 printf("stray interrupt\n");
272 }
273
274 int
275 fakeintr(void *p)
276 {
277
278 return 0;
279 }
280
281 #ifdef INTR_DEBUG
282 int
283 dumpirqhandlers(void)
284 {
285 int irq;
286 struct irqhandler *p;
287
288 for (irq = 0; irq < ICU_LEN; irq++) {
289 printf("irq %d:", irq);
290 p = irqhandlers[irq];
291 for (; p; p = p->ih_next)
292 printf("ih_func: 0x%lx, ", (unsigned long)p->ih_func);
293 printf("\n");
294 }
295 return 0;
296 }
297 #endif
298