sa11x0_ost.c revision 1.17
1 /* $NetBSD: sa11x0_ost.c,v 1.17 2006/04/18 17:50:25 peter Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Mark Brinicombe. 5 * Copyright (c) 1997 Causality Limited. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by IWAMOTO Toshihiro and Ichiro FUKUHARA. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: sa11x0_ost.c,v 1.17 2006/04/18 17:50:25 peter Exp $"); 42 43 #include <sys/types.h> 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/time.h> 48 #include <sys/device.h> 49 50 #include <machine/bus.h> 51 #include <machine/intr.h> 52 53 #include <arm/cpufunc.h> 54 55 #include <arm/arm32/katelib.h> 56 57 #include <arm/sa11x0/sa11x0_reg.h> 58 #include <arm/sa11x0/sa11x0_var.h> 59 #include <arm/sa11x0/sa11x0_ostreg.h> 60 61 static int saost_match(struct device *, struct cfdata *, void *); 62 static void saost_attach(struct device *, struct device *, void *); 63 64 int gettick(void); 65 static int clockintr(void *); 66 static int statintr(void *); 67 void rtcinit(void); 68 69 struct saost_softc { 70 struct device sc_dev; 71 bus_addr_t sc_baseaddr; 72 bus_space_tag_t sc_iot; 73 bus_space_handle_t sc_ioh; 74 75 uint32_t sc_clock_count; 76 uint32_t sc_statclock_count; 77 uint32_t sc_statclock_step; 78 }; 79 80 static struct saost_softc *saost_sc = NULL; 81 82 #define TIMER_FREQUENCY 3686400 /* 3.6864MHz */ 83 #define TICKS_PER_MICROSECOND (TIMER_FREQUENCY/1000000) 84 85 #ifndef STATHZ 86 #define STATHZ 64 87 #endif 88 89 CFATTACH_DECL(saost, sizeof(struct saost_softc), 90 saost_match, saost_attach, NULL, NULL); 91 92 static int 93 saost_match(struct device *parent, struct cfdata *match, void *aux) 94 { 95 return (1); 96 } 97 98 void 99 saost_attach(struct device *parent, struct device *self, void *aux) 100 { 101 struct saost_softc *sc = (struct saost_softc*)self; 102 struct sa11x0_attach_args *sa = aux; 103 104 printf("\n"); 105 106 sc->sc_iot = sa->sa_iot; 107 sc->sc_baseaddr = sa->sa_addr; 108 109 saost_sc = sc; 110 111 if(bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, 112 &sc->sc_ioh)) 113 panic("%s: Cannot map registers", self->dv_xname); 114 115 /* disable all channel and clear interrupt status */ 116 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_IR, 0); 117 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_SR, 0xf); 118 119 printf("%s: SA-11x0 OS Timer\n", sc->sc_dev.dv_xname); 120 } 121 122 static int 123 clockintr(void *arg) 124 { 125 struct clockframe *frame = arg; 126 uint32_t oscr, nextmatch, oldmatch; 127 int s; 128 129 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, 130 SAOST_SR, 1); 131 132 /* schedule next clock intr */ 133 oldmatch = saost_sc->sc_clock_count; 134 nextmatch = oldmatch + TIMER_FREQUENCY / hz; 135 136 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR0, 137 nextmatch); 138 oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh, 139 SAOST_CR); 140 141 if ((nextmatch > oldmatch && 142 (oscr > nextmatch || oscr < oldmatch)) || 143 (nextmatch < oldmatch && oscr > nextmatch && oscr < oldmatch)) { 144 /* 145 * we couldn't set the matching register in time. 146 * just set it to some value so that next interrupt happens. 147 * XXX is it possible to compansate lost interrupts? 148 */ 149 150 s = splhigh(); 151 oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh, 152 SAOST_CR); 153 nextmatch = oscr + 10; 154 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, 155 SAOST_MR0, nextmatch); 156 splx(s); 157 } 158 159 saost_sc->sc_clock_count = nextmatch; 160 hardclock(frame); 161 162 return(1); 163 } 164 165 static int 166 statintr(void *arg) 167 { 168 struct clockframe *frame = arg; 169 uint32_t oscr, nextmatch, oldmatch; 170 int s; 171 172 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, 173 SAOST_SR, 2); 174 175 /* schedule next clock intr */ 176 oldmatch = saost_sc->sc_statclock_count; 177 nextmatch = oldmatch + saost_sc->sc_statclock_step; 178 179 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR1, 180 nextmatch); 181 oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh, 182 SAOST_CR); 183 184 if ((nextmatch > oldmatch && 185 (oscr > nextmatch || oscr < oldmatch)) || 186 (nextmatch < oldmatch && oscr > nextmatch && oscr < oldmatch)) { 187 /* 188 * we couldn't set the matching register in time. 189 * just set it to some value so that next interrupt happens. 190 * XXX is it possible to compansate lost interrupts? 191 */ 192 193 s = splhigh(); 194 oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh, 195 SAOST_CR); 196 nextmatch = oscr + 10; 197 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, 198 SAOST_MR1, nextmatch); 199 splx(s); 200 } 201 202 saost_sc->sc_statclock_count = nextmatch; 203 statclock(frame); 204 205 return(1); 206 } 207 208 209 void 210 setstatclockrate(int schz) 211 { 212 uint32_t count; 213 214 saost_sc->sc_statclock_step = TIMER_FREQUENCY / schz; 215 count = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_CR); 216 count += saost_sc->sc_statclock_step; 217 saost_sc->sc_statclock_count = count; 218 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, 219 SAOST_MR1, count); 220 } 221 222 void 223 cpu_initclocks(void) 224 { 225 stathz = STATHZ; 226 profhz = stathz; 227 saost_sc->sc_statclock_step = TIMER_FREQUENCY / stathz; 228 229 printf("clock: hz=%d stathz=%d\n", hz, stathz); 230 231 /* Use the channels 0 and 1 for hardclock and statclock, respectively */ 232 saost_sc->sc_clock_count = TIMER_FREQUENCY / hz; 233 saost_sc->sc_statclock_count = TIMER_FREQUENCY / stathz; 234 235 sa11x0_intr_establish(0, 26, 1, IPL_CLOCK, clockintr, 0); 236 sa11x0_intr_establish(0, 27, 1, IPL_CLOCK, statintr, 0); 237 238 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_SR, 0xf); 239 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_IR, 3); 240 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR0, 241 saost_sc->sc_clock_count); 242 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR1, 243 saost_sc->sc_statclock_count); 244 245 /* Zero the counter value */ 246 bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_CR, 0); 247 } 248 249 int 250 gettick(void) 251 { 252 int counter; 253 u_int savedints; 254 savedints = disable_interrupts(I32_bit); 255 256 counter = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh, 257 SAOST_CR); 258 259 restore_interrupts(savedints); 260 return counter; 261 } 262 263 void 264 microtime(struct timeval *tvp) 265 { 266 int s, tm, deltatm; 267 static struct timeval lasttime; 268 269 if(saost_sc == NULL) { 270 tvp->tv_sec = 0; 271 tvp->tv_usec = 0; 272 return; 273 } 274 275 s = splhigh(); 276 tm = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh, 277 SAOST_CR); 278 279 deltatm = saost_sc->sc_clock_count - tm; 280 281 #ifdef OST_DEBUG 282 printf("deltatm = %d\n",deltatm); 283 #endif 284 285 *tvp = time; 286 tvp->tv_usec++; /* XXX */ 287 while (tvp->tv_usec >= 1000000) { 288 tvp->tv_sec++; 289 tvp->tv_usec -= 1000000; 290 } 291 292 if (tvp->tv_sec == lasttime.tv_sec && 293 tvp->tv_usec <= lasttime.tv_usec && 294 (tvp->tv_usec = lasttime.tv_usec + 1) >= 1000000) 295 { 296 tvp->tv_sec++; 297 tvp->tv_usec -= 1000000; 298 } 299 lasttime = *tvp; 300 splx(s); 301 } 302 303 void 304 delay(u_int usecs) 305 { 306 uint32_t xtick, otick, delta; 307 int j, csec, usec; 308 309 csec = usecs / 10000; 310 usec = usecs % 10000; 311 312 usecs = (TIMER_FREQUENCY / 100) * csec 313 + (TIMER_FREQUENCY / 100) * usec / 10000; 314 315 if (! saost_sc) { 316 /* clock isn't initialized yet */ 317 for(; usecs > 0; usecs--) 318 for(j = 100; j > 0; j--) 319 ; 320 return; 321 } 322 323 otick = gettick(); 324 325 while (1) { 326 for(j = 100; j > 0; j--) 327 ; 328 xtick = gettick(); 329 delta = xtick - otick; 330 if (delta > usecs) 331 break; 332 usecs -= delta; 333 otick = xtick; 334 } 335 } 336 337 void 338 resettodr(void) 339 { 340 } 341 342 void 343 inittodr(time_t base) 344 { 345 time.tv_sec = base; 346 time.tv_usec = 0; 347 } 348
Indexes created Thu Oct 02 14:10:14 GMT 2025