1 1.5 martin /* $NetBSD: sa11x0_ppcreg.h,v 1.5 2008/04/28 20:23:14 martin Exp $ */ 2 1.1 rjs 3 1.1 rjs /*- 4 1.1 rjs * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved. 5 1.1 rjs * 6 1.1 rjs * This code is derived from software contributed to The NetBSD Foundation 7 1.1 rjs * by IWAMOTO Toshihiro. 8 1.1 rjs * 9 1.1 rjs * Redistribution and use in source and binary forms, with or without 10 1.1 rjs * modification, are permitted provided that the following conditions 11 1.1 rjs * are met: 12 1.1 rjs * 1. Redistributions of source code must retain the above copyright 13 1.1 rjs * notice, this list of conditions and the following disclaimer. 14 1.1 rjs * 2. Redistributions in binary form must reproduce the above copyright 15 1.1 rjs * notice, this list of conditions and the following disclaimer in the 16 1.1 rjs * documentation and/or other materials provided with the distribution. 17 1.1 rjs * 18 1.3 peter * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 1.3 peter * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 1.3 peter * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 1.3 peter * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 1.3 peter * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 1.3 peter * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 1.3 peter * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 1.3 peter * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 1.3 peter * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 1.3 peter * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 1.3 peter * POSSIBILITY OF SUCH DAMAGE. 29 1.1 rjs */ 30 1.1 rjs 31 1.1 rjs /* SA11[01]0 PPC (peripheral pin controller) */ 32 1.1 rjs 33 1.1 rjs /* size of I/O space */ 34 1.2 rjs #define SAPPC_NPORTS 13 35 1.1 rjs 36 1.1 rjs #define SAPPC_PDR 0x00 /* pin direction register */ 37 1.1 rjs 38 1.1 rjs #define SAPPC_PSR 0x04 /* pin state register */ 39 1.1 rjs 40 1.1 rjs #define SAPPC_PAR 0x08 /* pin assignment register */ 41 1.1 rjs #define PAR_UPR 0x01000 /* UART pin assignment */ 42 1.1 rjs #define PAR_SPR 0x40000 /* SSP pin assignment */ 43 1.1 rjs 44 1.1 rjs #define SAPPC_SDR 0x0C /* sleep mode direction register */ 45 1.1 rjs 46 1.1 rjs #define SAPPC_PFR 0x10 /* pin flag register */ 47 1.1 rjs #define PFR_LCD 0x00001 /* LCD controller flag */ 48 1.1 rjs #define PFR_SP1TX 0x01000 /* serial port 1 Tx flag */ 49 1.1 rjs #define PFR_SP1RX 0x02000 /* serial port 1 Rx flag */ 50 1.1 rjs #define PFR_SP2TX 0x04000 /* serial port 2 Tx flag */ 51 1.1 rjs #define PFR_SP2RX 0x08000 /* serial port 2 Rx flag */ 52 1.1 rjs #define PFR_SP3TX 0x10000 /* serial port 3 Tx flag */ 53 1.1 rjs #define PFR_SP3RX 0x20000 /* serial port 3 Rx flag */ 54 1.1 rjs #define PFR_SP4 0x40000 /* serial port 4 flag */ 55 1.2 rjs 56 1.2 rjs /* MCP control register 1 */ 57 1.2 rjs #define SAMCP_CR1 0x30 /* MCP control register 1 */ 58