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sa11x1_pcic.c revision 1.8
      1  1.8     lukem /*      $NetBSD: sa11x1_pcic.c,v 1.8 2003/07/15 00:24:51 lukem Exp $        */
      2  1.1       rjs 
      3  1.1       rjs /*-
      4  1.1       rjs  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  1.1       rjs  * All rights reserved.
      6  1.1       rjs  *
      7  1.1       rjs  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1       rjs  * by IWAMOTO Toshihiro.
      9  1.1       rjs  *
     10  1.1       rjs  * Redistribution and use in source and binary forms, with or without
     11  1.1       rjs  * modification, are permitted provided that the following conditions
     12  1.1       rjs  * are met:
     13  1.1       rjs  * 1. Redistributions of source code must retain the above copyright
     14  1.1       rjs  *    notice, this list of conditions and the following disclaimer.
     15  1.1       rjs  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1       rjs  *    notice, this list of conditions and the following disclaimer in the
     17  1.1       rjs  *    documentation and/or other materials provided with the distribution.
     18  1.1       rjs  * 3. All advertising materials mentioning features or use of this software
     19  1.1       rjs  *    must display the following acknowledgement:
     20  1.1       rjs  *        This product includes software developed by the NetBSD
     21  1.1       rjs  *        Foundation, Inc. and its contributors.
     22  1.1       rjs  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1       rjs  *    contributors may be used to endorse or promote products derived
     24  1.1       rjs  *    from this software without specific prior written permission.
     25  1.1       rjs  *
     26  1.1       rjs  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1       rjs  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1       rjs  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1       rjs  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1       rjs  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1       rjs  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1       rjs  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1       rjs  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1       rjs  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1       rjs  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1       rjs  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1       rjs  */
     38  1.8     lukem 
     39  1.8     lukem #include <sys/cdefs.h>
     40  1.8     lukem __KERNEL_RCSID(0, "$NetBSD: sa11x1_pcic.c,v 1.8 2003/07/15 00:24:51 lukem Exp $");
     41  1.1       rjs 
     42  1.1       rjs #include <sys/param.h>
     43  1.1       rjs #include <sys/systm.h>
     44  1.1       rjs #include <sys/types.h>
     45  1.1       rjs #include <sys/conf.h>
     46  1.1       rjs #include <sys/file.h>
     47  1.1       rjs #include <sys/device.h>
     48  1.1       rjs #include <sys/kernel.h>
     49  1.1       rjs #include <sys/kthread.h>
     50  1.1       rjs #include <sys/malloc.h>
     51  1.1       rjs 
     52  1.1       rjs #include <machine/bus.h>
     53  1.1       rjs #ifdef hpcarm
     54  1.1       rjs #include <machine/platid.h>
     55  1.1       rjs #include <machine/platid_mask.h>
     56  1.1       rjs #endif
     57  1.1       rjs 
     58  1.1       rjs #include <dev/pcmcia/pcmciachip.h>
     59  1.1       rjs #include <dev/pcmcia/pcmciavar.h>
     60  1.1       rjs #include <arm/sa11x0/sa11x0_reg.h>
     61  1.1       rjs #include <arm/sa11x0/sa11x0_var.h>
     62  1.1       rjs #include <arm/sa11x0/sa1111_reg.h>
     63  1.1       rjs #include <arm/sa11x0/sa1111_var.h>
     64  1.1       rjs #include <arm/sa11x0/sa11x1_pcicreg.h>
     65  1.1       rjs #include <arm/sa11x0/sa11xx_pcicvar.h>
     66  1.1       rjs 
     67  1.1       rjs #include "sacpcic.h"
     68  1.1       rjs 
     69  1.1       rjs static	int	sacpcic_match(struct device *, struct cfdata *, void *);
     70  1.1       rjs static	void	sacpcic_attach(struct device *, struct device *, void *);
     71  1.1       rjs static	int	sacpcic_print(void *, const char *);
     72  1.1       rjs static	int	sacpcic_submatch(struct device *, struct cfdata *, void *);
     73  1.1       rjs 
     74  1.1       rjs static	int	sacpcic_read(struct sapcic_socket *, int);
     75  1.1       rjs static	void	sacpcic_write(struct sapcic_socket *, int, int);
     76  1.1       rjs static	void	sacpcic_set_power(struct sapcic_socket *, int);
     77  1.1       rjs static	void	sacpcic_clear_intr(int);
     78  1.1       rjs static	void	*sacpcic_intr_establish(struct sapcic_socket *, int,
     79  1.1       rjs 				       int (*)(void *), void *);
     80  1.1       rjs static	void	sacpcic_intr_disestablish(struct sapcic_socket *, void *);
     81  1.1       rjs 
     82  1.1       rjs struct sacpcic_softc {
     83  1.1       rjs 	struct sapcic_softc sc_pc;
     84  1.1       rjs 	bus_space_handle_t sc_ioh;
     85  1.1       rjs 
     86  1.1       rjs 	struct sapcic_socket sc_socket[2];
     87  1.1       rjs };
     88  1.1       rjs 
     89  1.1       rjs static struct sapcic_tag sacpcic_functions = {
     90  1.1       rjs 	sacpcic_read,
     91  1.1       rjs 	sacpcic_write,
     92  1.1       rjs 	sacpcic_set_power,
     93  1.1       rjs 	sacpcic_clear_intr,
     94  1.1       rjs 	sacpcic_intr_establish,
     95  1.1       rjs 	sacpcic_intr_disestablish
     96  1.1       rjs };
     97  1.1       rjs 
     98  1.1       rjs #ifdef hpcarm
     99  1.1       rjs static int j720_power_capability[] = {
    100  1.1       rjs 	SAPCIC_POWER_5V | SAPCIC_POWER_3V, SAPCIC_POWER_3V
    101  1.1       rjs };
    102  1.1       rjs 
    103  1.1       rjs static struct platid_data sacpcic_platid_table[] = {
    104  1.1       rjs 	{ &platid_mask_MACH_HP_JORNADA_720, j720_power_capability },
    105  1.1       rjs 	{ &platid_mask_MACH_HP_JORNADA_720JP, j720_power_capability },
    106  1.1       rjs 	{ NULL, NULL }
    107  1.1       rjs };
    108  1.1       rjs #endif
    109  1.1       rjs 
    110  1.7   thorpej CFATTACH_DECL(sacpcic, sizeof(struct sacpcic_softc),
    111  1.7   thorpej     sacpcic_match, sacpcic_attach, NULL, NULL);
    112  1.1       rjs 
    113  1.1       rjs static int
    114  1.1       rjs sacpcic_match(parent, cf, aux)
    115  1.1       rjs 	struct device *parent;
    116  1.1       rjs 	struct cfdata *cf;
    117  1.1       rjs 	void *aux;
    118  1.1       rjs {
    119  1.1       rjs 	return (1);
    120  1.1       rjs }
    121  1.1       rjs 
    122  1.1       rjs static void
    123  1.1       rjs sacpcic_attach(parent, self, aux)
    124  1.1       rjs 	struct device *parent;
    125  1.1       rjs 	struct device *self;
    126  1.1       rjs 	void *aux;
    127  1.1       rjs {
    128  1.1       rjs 	int i;
    129  1.1       rjs #ifdef hpcarm
    130  1.1       rjs 	int *ip;
    131  1.1       rjs #endif
    132  1.1       rjs 	struct pcmciabus_attach_args paa;
    133  1.1       rjs 	struct sacpcic_softc *sc = (struct sacpcic_softc *)self;
    134  1.1       rjs 	struct sacc_softc *psc = (struct sacc_softc *)parent;
    135  1.1       rjs #ifdef hpcarm
    136  1.1       rjs 	struct platid_data *p;
    137  1.1       rjs #endif
    138  1.1       rjs 
    139  1.1       rjs 	printf("\n");
    140  1.1       rjs 
    141  1.1       rjs 	sc->sc_pc.sc_iot = psc->sc_iot;
    142  1.1       rjs 	sc->sc_ioh = psc->sc_ioh;
    143  1.1       rjs #ifdef hpcarm
    144  1.3  takemura 	p = platid_search_data(&platid, sacpcic_platid_table);
    145  1.1       rjs #endif
    146  1.1       rjs 
    147  1.1       rjs 	for(i = 0; i < 2; i++) {
    148  1.1       rjs 		sc->sc_socket[i].sc = (struct sapcic_softc *)sc;
    149  1.1       rjs 		sc->sc_socket[i].socket = i;
    150  1.2       rjs 		sc->sc_socket[i].pcictag_cookie = psc;
    151  1.1       rjs 		sc->sc_socket[i].pcictag = &sacpcic_functions;
    152  1.1       rjs 		sc->sc_socket[i].event_thread = NULL;
    153  1.1       rjs 		sc->sc_socket[i].event = 0;
    154  1.1       rjs 		sc->sc_socket[i].laststatus = SAPCIC_CARD_INVALID;
    155  1.1       rjs 		sc->sc_socket[i].shutdown = 0;
    156  1.1       rjs 
    157  1.1       rjs #ifdef hpcarm
    158  1.1       rjs 		if (p == NULL) {
    159  1.1       rjs 			sc->sc_socket[i].power_capability = SAPCIC_POWER_5V;
    160  1.1       rjs 		} else {
    161  1.1       rjs 			ip = (int *)p->data;
    162  1.1       rjs 			sc->sc_socket[i].power_capability = ip[i];
    163  1.1       rjs 		}
    164  1.1       rjs #else
    165  1.1       rjs 		/* XXX */
    166  1.1       rjs 		sc->sc_socket[i].power_capability = SAPCIC_POWER_5V;
    167  1.1       rjs #endif
    168  1.1       rjs 
    169  1.1       rjs 		paa.paa_busname = "pcmcia";
    170  1.1       rjs 		paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions;
    171  1.1       rjs 		paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i];
    172  1.1       rjs 		paa.iobase = 0;
    173  1.1       rjs 		paa.iosize = 0x4000000;
    174  1.1       rjs 
    175  1.1       rjs 		sc->sc_socket[i].pcmcia =
    176  1.1       rjs 		    (struct device *)config_found_sm(&sc->sc_pc.sc_dev,
    177  1.1       rjs 		    &paa, sacpcic_print, sacpcic_submatch);
    178  1.1       rjs 
    179  1.1       rjs 		sacc_intr_establish((sacc_chipset_tag_t)psc,
    180  1.1       rjs 				    i ? IRQ_S1_CDVALID : IRQ_S0_CDVALID,
    181  1.1       rjs 				    IST_EDGE_RAISE, IPL_BIO, sapcic_intr,
    182  1.1       rjs 				    &sc->sc_socket[i]);
    183  1.1       rjs 
    184  1.1       rjs 		/* schedule kthread creation */
    185  1.1       rjs 		kthread_create(sapcic_kthread_create, &sc->sc_socket[i]);
    186  1.1       rjs 
    187  1.1       rjs #if 0 /* XXX */
    188  1.1       rjs 		/* establish_intr should be after creating the kthread */
    189  1.1       rjs 		config_interrupt(&sc->sc_socket[i], sacpcic_config_intr);
    190  1.1       rjs #endif
    191  1.1       rjs 	}
    192  1.1       rjs }
    193  1.1       rjs 
    194  1.1       rjs static int
    195  1.1       rjs sacpcic_print(aux, name)
    196  1.1       rjs 	void *aux;
    197  1.1       rjs 	const char *name;
    198  1.1       rjs {
    199  1.1       rjs 	return (UNCONF);
    200  1.1       rjs }
    201  1.1       rjs 
    202  1.1       rjs static int
    203  1.1       rjs sacpcic_submatch(parent, cf, aux)
    204  1.1       rjs 	struct device *parent;
    205  1.1       rjs 	struct cfdata *cf;
    206  1.1       rjs 	void *aux;
    207  1.1       rjs {
    208  1.4   thorpej 	return config_match(parent, cf, aux);
    209  1.1       rjs }
    210  1.1       rjs 
    211  1.1       rjs 
    212  1.1       rjs static int
    213  1.1       rjs sacpcic_read(so, reg)
    214  1.1       rjs 	struct sapcic_socket *so;
    215  1.1       rjs 	int reg;
    216  1.1       rjs {
    217  1.1       rjs 	int cr, bit;
    218  1.1       rjs 	struct sacpcic_softc *sc = (struct sacpcic_softc *)so->sc;
    219  1.1       rjs 
    220  1.1       rjs 	cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_ioh, SACPCIC_SR);
    221  1.1       rjs 
    222  1.1       rjs 	switch (reg) {
    223  1.1       rjs 	case SAPCIC_STATUS_CARD:
    224  1.1       rjs 		bit = (so->socket ? SR_S1_CARDDETECT : SR_S0_CARDDETECT) & cr;
    225  1.1       rjs 		if (bit)
    226  1.1       rjs 			return SAPCIC_CARD_INVALID;
    227  1.1       rjs 		else
    228  1.1       rjs 			return SAPCIC_CARD_VALID;
    229  1.1       rjs 
    230  1.1       rjs 	case SAPCIC_STATUS_VS1:
    231  1.1       rjs 		bit = (so->socket ? SR_S1_VS1 : SR_S0_VS1);
    232  1.1       rjs 		return (bit & cr);
    233  1.1       rjs 
    234  1.1       rjs 	case SAPCIC_STATUS_VS2:
    235  1.1       rjs 		bit = (so->socket ? SR_S1_VS2 : SR_S0_VS2);
    236  1.1       rjs 		return (bit & cr);
    237  1.1       rjs 
    238  1.1       rjs 	case SAPCIC_STATUS_READY:
    239  1.1       rjs 		bit = (so->socket ? SR_S1_READY : SR_S0_READY);
    240  1.1       rjs 		return (bit & cr);
    241  1.1       rjs 
    242  1.1       rjs 	default:
    243  1.5    provos 		panic("sacpcic_read: bogus register");
    244  1.1       rjs 	}
    245  1.1       rjs }
    246  1.1       rjs 
    247  1.1       rjs static void
    248  1.1       rjs sacpcic_write(so, reg, arg)
    249  1.1       rjs 	struct sapcic_socket *so;
    250  1.1       rjs 	int reg;
    251  1.1       rjs 	int arg;
    252  1.1       rjs {
    253  1.1       rjs 	int s, oldvalue, newvalue, mask;
    254  1.1       rjs 	struct sacpcic_softc *sc = (struct sacpcic_softc *)so->sc;
    255  1.1       rjs 
    256  1.1       rjs 	s = splhigh();
    257  1.1       rjs 	oldvalue = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_ioh, SACPCIC_CR);
    258  1.1       rjs 
    259  1.1       rjs 	switch (reg) {
    260  1.1       rjs 	case SAPCIC_CONTROL_RESET:
    261  1.1       rjs 		mask = so->socket ? CR_S1_RST : CR_S0_RST;
    262  1.1       rjs 
    263  1.1       rjs 		newvalue = (oldvalue & ~mask) | (arg ? mask : 0);
    264  1.1       rjs 		break;
    265  1.1       rjs 
    266  1.1       rjs 	case SAPCIC_CONTROL_LINEENABLE:
    267  1.1       rjs 		mask = so->socket ? CR_S1_FLT : CR_S0_FLT;
    268  1.1       rjs 
    269  1.1       rjs 		newvalue = (oldvalue & ~mask) | (arg ? mask : 0);
    270  1.1       rjs 		break;
    271  1.1       rjs 
    272  1.1       rjs 	case SAPCIC_CONTROL_WAITENABLE:
    273  1.1       rjs 		mask = so->socket ? CR_S1_PWAITEN : CR_S0_PWAITEN;
    274  1.1       rjs 
    275  1.1       rjs 		newvalue = (oldvalue & ~mask) | (arg ? mask : 0);
    276  1.1       rjs 		break;
    277  1.1       rjs 
    278  1.1       rjs 	case SAPCIC_CONTROL_POWERSELECT:
    279  1.1       rjs 		mask = so->socket ? CR_S1_PSE : CR_S0_PSE;
    280  1.1       rjs 		newvalue = oldvalue & ~mask;
    281  1.1       rjs 
    282  1.1       rjs 		switch (arg) {
    283  1.1       rjs 		case SAPCIC_POWER_3V:
    284  1.1       rjs 			break;
    285  1.1       rjs 		case SAPCIC_POWER_5V:
    286  1.1       rjs 			newvalue |= mask;
    287  1.1       rjs 			break;
    288  1.1       rjs 		default:
    289  1.1       rjs 			splx(s);
    290  1.1       rjs 			panic("sacpcic_write: bogus arg");
    291  1.1       rjs 		}
    292  1.1       rjs 		break;
    293  1.1       rjs 
    294  1.1       rjs 	default:
    295  1.1       rjs 		splx(s);
    296  1.1       rjs 		panic("sacpcic_write: bogus register");
    297  1.1       rjs 	}
    298  1.1       rjs 	bus_space_write_4(sc->sc_pc.sc_iot, sc->sc_ioh, SACPCIC_CR, newvalue);
    299  1.1       rjs 	splx(s);
    300  1.1       rjs }
    301  1.1       rjs 
    302  1.1       rjs static void
    303  1.1       rjs sacpcic_set_power(so, arg)
    304  1.1       rjs 	struct sapcic_socket *so;
    305  1.1       rjs 	int arg;
    306  1.1       rjs {
    307  1.1       rjs 	/* XXX this should go to dev/jornada720.c */
    308  1.1       rjs 	int newval, oldval, s;
    309  1.2       rjs 	struct sacc_softc *sc = so->pcictag_cookie;
    310  1.1       rjs 
    311  1.1       rjs 	/* XXX this isn't well confirmed. DANGER DANGER */
    312  1.1       rjs 	switch (arg) {
    313  1.1       rjs 	case SAPCIC_POWER_OFF:
    314  1.1       rjs 		newval = 0;
    315  1.1       rjs 		break;
    316  1.1       rjs 	case SAPCIC_POWER_3V:
    317  1.1       rjs 		newval = 2;
    318  1.1       rjs 		break;
    319  1.1       rjs 	case SAPCIC_POWER_5V:
    320  1.1       rjs 		newval = 1;
    321  1.1       rjs 		break;
    322  1.1       rjs 	default:
    323  1.5    provos 		panic("sacpcic_set_power: bogus arg");
    324  1.1       rjs 	}
    325  1.1       rjs 
    326  1.1       rjs 	s = splbio();
    327  1.2       rjs 	oldval = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
    328  1.1       rjs 				  SACCGPIOA_DVR);
    329  1.1       rjs 	switch (so->socket) {
    330  1.1       rjs 	case 0:
    331  1.1       rjs 		newval = newval | (oldval & 0xc);
    332  1.1       rjs 		break;
    333  1.1       rjs 	case 1:
    334  1.1       rjs 		newval = (newval << 2) | (oldval & 3);
    335  1.1       rjs 		break;
    336  1.1       rjs 	default:
    337  1.1       rjs 		splx(s);
    338  1.5    provos 		panic("sacpcic_set_power");
    339  1.1       rjs 	}
    340  1.2       rjs 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCGPIOA_DVR, newval);
    341  1.1       rjs 	splx(s);
    342  1.1       rjs }
    343  1.1       rjs 
    344  1.1       rjs static void
    345  1.1       rjs sacpcic_clear_intr(arg)
    346  1.1       rjs {
    347  1.1       rjs 	/* sacc_intr_dispatch takes care of intr status */
    348  1.1       rjs }
    349  1.1       rjs 
    350  1.1       rjs static void *
    351  1.1       rjs sacpcic_intr_establish(so, level, ih_fun, ih_arg)
    352  1.1       rjs 	struct sapcic_socket *so;
    353  1.1       rjs 	int level;
    354  1.1       rjs 	int (*ih_fun)(void *);
    355  1.1       rjs 	void *ih_arg;
    356  1.1       rjs {
    357  1.1       rjs 	int irq;
    358  1.1       rjs 
    359  1.1       rjs 	irq = so->socket ? IRQ_S1_READY : IRQ_S0_READY;
    360  1.2       rjs 	return (sacc_intr_establish((sacc_chipset_tag_t)so->pcictag_cookie, irq,
    361  1.1       rjs 				    IST_EDGE_FALL, level, ih_fun, ih_arg));
    362  1.1       rjs }
    363  1.1       rjs 
    364  1.1       rjs static void
    365  1.1       rjs sacpcic_intr_disestablish(so, ih)
    366  1.1       rjs 	struct sapcic_socket *so;
    367  1.1       rjs 	void *ih;
    368  1.1       rjs {
    369  1.2       rjs 	sacc_intr_disestablish((sacc_chipset_tag_t)so->pcictag_cookie, ih);
    370  1.1       rjs }
    371