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sa11x1_pcic.c revision 1.9
      1  1.9      bsh /*      $NetBSD: sa11x1_pcic.c,v 1.9 2003/08/08 12:29:23 bsh Exp $        */
      2  1.1      rjs 
      3  1.1      rjs /*-
      4  1.1      rjs  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  1.1      rjs  * All rights reserved.
      6  1.1      rjs  *
      7  1.1      rjs  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1      rjs  * by IWAMOTO Toshihiro.
      9  1.1      rjs  *
     10  1.1      rjs  * Redistribution and use in source and binary forms, with or without
     11  1.1      rjs  * modification, are permitted provided that the following conditions
     12  1.1      rjs  * are met:
     13  1.1      rjs  * 1. Redistributions of source code must retain the above copyright
     14  1.1      rjs  *    notice, this list of conditions and the following disclaimer.
     15  1.1      rjs  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1      rjs  *    notice, this list of conditions and the following disclaimer in the
     17  1.1      rjs  *    documentation and/or other materials provided with the distribution.
     18  1.1      rjs  * 3. All advertising materials mentioning features or use of this software
     19  1.1      rjs  *    must display the following acknowledgement:
     20  1.1      rjs  *        This product includes software developed by the NetBSD
     21  1.1      rjs  *        Foundation, Inc. and its contributors.
     22  1.1      rjs  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1      rjs  *    contributors may be used to endorse or promote products derived
     24  1.1      rjs  *    from this software without specific prior written permission.
     25  1.1      rjs  *
     26  1.1      rjs  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1      rjs  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1      rjs  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1      rjs  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1      rjs  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1      rjs  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1      rjs  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1      rjs  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1      rjs  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1      rjs  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1      rjs  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1      rjs  */
     38  1.8    lukem 
     39  1.8    lukem #include <sys/cdefs.h>
     40  1.9      bsh __KERNEL_RCSID(0, "$NetBSD: sa11x1_pcic.c,v 1.9 2003/08/08 12:29:23 bsh Exp $");
     41  1.1      rjs 
     42  1.1      rjs #include <sys/param.h>
     43  1.1      rjs #include <sys/systm.h>
     44  1.1      rjs #include <sys/types.h>
     45  1.1      rjs #include <sys/conf.h>
     46  1.1      rjs #include <sys/file.h>
     47  1.1      rjs #include <sys/device.h>
     48  1.1      rjs #include <sys/kernel.h>
     49  1.1      rjs #include <sys/kthread.h>
     50  1.1      rjs #include <sys/malloc.h>
     51  1.1      rjs 
     52  1.1      rjs #include <machine/bus.h>
     53  1.1      rjs 
     54  1.1      rjs #include <dev/pcmcia/pcmciachip.h>
     55  1.1      rjs #include <dev/pcmcia/pcmciavar.h>
     56  1.1      rjs #include <arm/sa11x0/sa11x0_reg.h>
     57  1.1      rjs #include <arm/sa11x0/sa11x0_var.h>
     58  1.1      rjs #include <arm/sa11x0/sa1111_reg.h>
     59  1.1      rjs #include <arm/sa11x0/sa1111_var.h>
     60  1.1      rjs #include <arm/sa11x0/sa11x1_pcicreg.h>
     61  1.1      rjs #include <arm/sa11x0/sa11xx_pcicvar.h>
     62  1.9      bsh #include <arm/sa11x0/sa11x1_pcicvar.h>
     63  1.1      rjs 
     64  1.1      rjs #include "sacpcic.h"
     65  1.1      rjs 
     66  1.9      bsh static int	sacpcic_print(void *, const char *);
     67  1.9      bsh static int	sacpcic_submatch(struct device *, struct cfdata *, void *);
     68  1.1      rjs 
     69  1.1      rjs 
     70  1.9      bsh void
     71  1.9      bsh sacpcic_attach_common(struct sacc_softc *psc, struct sacpcic_softc *sc,
     72  1.9      bsh     void *aux, void (* socket_setup_hook)(struct sapcic_socket *))
     73  1.1      rjs {
     74  1.1      rjs 	int i;
     75  1.1      rjs 	struct pcmciabus_attach_args paa;
     76  1.1      rjs 
     77  1.1      rjs 	printf("\n");
     78  1.1      rjs 
     79  1.1      rjs 	sc->sc_pc.sc_iot = psc->sc_iot;
     80  1.1      rjs 	sc->sc_ioh = psc->sc_ioh;
     81  1.1      rjs 
     82  1.1      rjs 	for(i = 0; i < 2; i++) {
     83  1.1      rjs 		sc->sc_socket[i].sc = (struct sapcic_softc *)sc;
     84  1.1      rjs 		sc->sc_socket[i].socket = i;
     85  1.2      rjs 		sc->sc_socket[i].pcictag_cookie = psc;
     86  1.9      bsh 		sc->sc_socket[i].pcictag = NULL;
     87  1.1      rjs 		sc->sc_socket[i].event_thread = NULL;
     88  1.1      rjs 		sc->sc_socket[i].event = 0;
     89  1.1      rjs 		sc->sc_socket[i].laststatus = SAPCIC_CARD_INVALID;
     90  1.1      rjs 		sc->sc_socket[i].shutdown = 0;
     91  1.1      rjs 
     92  1.9      bsh 		socket_setup_hook(&sc->sc_socket[i]);
     93  1.1      rjs 
     94  1.1      rjs 		paa.paa_busname = "pcmcia";
     95  1.1      rjs 		paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions;
     96  1.1      rjs 		paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i];
     97  1.1      rjs 		paa.iobase = 0;
     98  1.1      rjs 		paa.iosize = 0x4000000;
     99  1.1      rjs 
    100  1.1      rjs 		sc->sc_socket[i].pcmcia =
    101  1.1      rjs 		    (struct device *)config_found_sm(&sc->sc_pc.sc_dev,
    102  1.1      rjs 		    &paa, sacpcic_print, sacpcic_submatch);
    103  1.1      rjs 
    104  1.1      rjs 		sacc_intr_establish((sacc_chipset_tag_t)psc,
    105  1.1      rjs 				    i ? IRQ_S1_CDVALID : IRQ_S0_CDVALID,
    106  1.1      rjs 				    IST_EDGE_RAISE, IPL_BIO, sapcic_intr,
    107  1.1      rjs 				    &sc->sc_socket[i]);
    108  1.1      rjs 
    109  1.1      rjs 		/* schedule kthread creation */
    110  1.1      rjs 		kthread_create(sapcic_kthread_create, &sc->sc_socket[i]);
    111  1.1      rjs 
    112  1.1      rjs #if 0 /* XXX */
    113  1.1      rjs 		/* establish_intr should be after creating the kthread */
    114  1.1      rjs 		config_interrupt(&sc->sc_socket[i], sacpcic_config_intr);
    115  1.1      rjs #endif
    116  1.1      rjs 	}
    117  1.1      rjs }
    118  1.1      rjs 
    119  1.9      bsh int
    120  1.1      rjs sacpcic_print(aux, name)
    121  1.1      rjs 	void *aux;
    122  1.1      rjs 	const char *name;
    123  1.1      rjs {
    124  1.1      rjs 	return (UNCONF);
    125  1.1      rjs }
    126  1.1      rjs 
    127  1.9      bsh int
    128  1.9      bsh sacpcic_submatch(struct device *parent, struct cfdata *cf, void *aux)
    129  1.1      rjs {
    130  1.4  thorpej 	return config_match(parent, cf, aux);
    131  1.1      rjs }
    132  1.1      rjs 
    133  1.1      rjs 
    134  1.9      bsh int
    135  1.9      bsh sacpcic_read(struct sapcic_socket *so, int reg)
    136  1.1      rjs {
    137  1.1      rjs 	int cr, bit;
    138  1.1      rjs 	struct sacpcic_softc *sc = (struct sacpcic_softc *)so->sc;
    139  1.1      rjs 
    140  1.1      rjs 	cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_ioh, SACPCIC_SR);
    141  1.1      rjs 
    142  1.1      rjs 	switch (reg) {
    143  1.1      rjs 	case SAPCIC_STATUS_CARD:
    144  1.1      rjs 		bit = (so->socket ? SR_S1_CARDDETECT : SR_S0_CARDDETECT) & cr;
    145  1.1      rjs 		if (bit)
    146  1.1      rjs 			return SAPCIC_CARD_INVALID;
    147  1.1      rjs 		else
    148  1.1      rjs 			return SAPCIC_CARD_VALID;
    149  1.1      rjs 
    150  1.1      rjs 	case SAPCIC_STATUS_VS1:
    151  1.1      rjs 		bit = (so->socket ? SR_S1_VS1 : SR_S0_VS1);
    152  1.1      rjs 		return (bit & cr);
    153  1.1      rjs 
    154  1.1      rjs 	case SAPCIC_STATUS_VS2:
    155  1.1      rjs 		bit = (so->socket ? SR_S1_VS2 : SR_S0_VS2);
    156  1.1      rjs 		return (bit & cr);
    157  1.1      rjs 
    158  1.1      rjs 	case SAPCIC_STATUS_READY:
    159  1.1      rjs 		bit = (so->socket ? SR_S1_READY : SR_S0_READY);
    160  1.1      rjs 		return (bit & cr);
    161  1.1      rjs 
    162  1.1      rjs 	default:
    163  1.5   provos 		panic("sacpcic_read: bogus register");
    164  1.1      rjs 	}
    165  1.1      rjs }
    166  1.1      rjs 
    167  1.9      bsh void
    168  1.9      bsh sacpcic_write(struct sapcic_socket *so, int reg, int arg)
    169  1.1      rjs {
    170  1.1      rjs 	int s, oldvalue, newvalue, mask;
    171  1.1      rjs 	struct sacpcic_softc *sc = (struct sacpcic_softc *)so->sc;
    172  1.1      rjs 
    173  1.1      rjs 	s = splhigh();
    174  1.1      rjs 	oldvalue = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_ioh, SACPCIC_CR);
    175  1.1      rjs 
    176  1.1      rjs 	switch (reg) {
    177  1.1      rjs 	case SAPCIC_CONTROL_RESET:
    178  1.1      rjs 		mask = so->socket ? CR_S1_RST : CR_S0_RST;
    179  1.1      rjs 
    180  1.1      rjs 		newvalue = (oldvalue & ~mask) | (arg ? mask : 0);
    181  1.1      rjs 		break;
    182  1.1      rjs 
    183  1.1      rjs 	case SAPCIC_CONTROL_LINEENABLE:
    184  1.1      rjs 		mask = so->socket ? CR_S1_FLT : CR_S0_FLT;
    185  1.1      rjs 
    186  1.1      rjs 		newvalue = (oldvalue & ~mask) | (arg ? mask : 0);
    187  1.1      rjs 		break;
    188  1.1      rjs 
    189  1.1      rjs 	case SAPCIC_CONTROL_WAITENABLE:
    190  1.1      rjs 		mask = so->socket ? CR_S1_PWAITEN : CR_S0_PWAITEN;
    191  1.1      rjs 
    192  1.1      rjs 		newvalue = (oldvalue & ~mask) | (arg ? mask : 0);
    193  1.1      rjs 		break;
    194  1.1      rjs 
    195  1.1      rjs 	case SAPCIC_CONTROL_POWERSELECT:
    196  1.1      rjs 		mask = so->socket ? CR_S1_PSE : CR_S0_PSE;
    197  1.1      rjs 		newvalue = oldvalue & ~mask;
    198  1.1      rjs 
    199  1.1      rjs 		switch (arg) {
    200  1.1      rjs 		case SAPCIC_POWER_3V:
    201  1.1      rjs 			break;
    202  1.1      rjs 		case SAPCIC_POWER_5V:
    203  1.1      rjs 			newvalue |= mask;
    204  1.1      rjs 			break;
    205  1.1      rjs 		default:
    206  1.1      rjs 			splx(s);
    207  1.1      rjs 			panic("sacpcic_write: bogus arg");
    208  1.1      rjs 		}
    209  1.1      rjs 		break;
    210  1.1      rjs 
    211  1.1      rjs 	default:
    212  1.1      rjs 		splx(s);
    213  1.1      rjs 		panic("sacpcic_write: bogus register");
    214  1.1      rjs 	}
    215  1.1      rjs 	bus_space_write_4(sc->sc_pc.sc_iot, sc->sc_ioh, SACPCIC_CR, newvalue);
    216  1.1      rjs 	splx(s);
    217  1.1      rjs }
    218  1.1      rjs 
    219  1.9      bsh void
    220  1.1      rjs sacpcic_clear_intr(arg)
    221  1.1      rjs {
    222  1.1      rjs 	/* sacc_intr_dispatch takes care of intr status */
    223  1.1      rjs }
    224  1.1      rjs 
    225  1.9      bsh void *
    226  1.1      rjs sacpcic_intr_establish(so, level, ih_fun, ih_arg)
    227  1.1      rjs 	struct sapcic_socket *so;
    228  1.1      rjs 	int level;
    229  1.1      rjs 	int (*ih_fun)(void *);
    230  1.1      rjs 	void *ih_arg;
    231  1.1      rjs {
    232  1.1      rjs 	int irq;
    233  1.1      rjs 
    234  1.1      rjs 	irq = so->socket ? IRQ_S1_READY : IRQ_S0_READY;
    235  1.2      rjs 	return (sacc_intr_establish((sacc_chipset_tag_t)so->pcictag_cookie, irq,
    236  1.1      rjs 				    IST_EDGE_FALL, level, ih_fun, ih_arg));
    237  1.1      rjs }
    238  1.1      rjs 
    239  1.9      bsh void
    240  1.1      rjs sacpcic_intr_disestablish(so, ih)
    241  1.1      rjs 	struct sapcic_socket *so;
    242  1.1      rjs 	void *ih;
    243  1.1      rjs {
    244  1.2      rjs 	sacc_intr_disestablish((sacc_chipset_tag_t)so->pcictag_cookie, ih);
    245  1.1      rjs }
    246