sa11x1_pcic.c revision 1.17
1 /* $NetBSD: sa11x1_pcic.c,v 1.17 2008/04/20 16:47:52 rafal Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by IWAMOTO Toshihiro. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: sa11x1_pcic.c,v 1.17 2008/04/20 16:47:52 rafal Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/types.h> 45 #include <sys/conf.h> 46 #include <sys/file.h> 47 #include <sys/device.h> 48 #include <sys/kernel.h> 49 #include <sys/kthread.h> 50 #include <sys/malloc.h> 51 52 #include <machine/bus.h> 53 54 #include <dev/pcmcia/pcmciachip.h> 55 #include <dev/pcmcia/pcmciavar.h> 56 #include <arm/sa11x0/sa11x0_reg.h> 57 #include <arm/sa11x0/sa11x0_var.h> 58 #include <arm/sa11x0/sa1111_reg.h> 59 #include <arm/sa11x0/sa1111_var.h> 60 #include <arm/sa11x0/sa11x1_pcicreg.h> 61 #include <arm/sa11x0/sa11xx_pcicvar.h> 62 #include <arm/sa11x0/sa11x1_pcicvar.h> 63 64 #include "sacpcic.h" 65 66 static int sacpcic_print(void *, const char *); 67 68 static void 69 sacpcic_config_deferred(struct device *dev) 70 { 71 struct sacpcic_softc *sc = (struct sacpcic_softc *)dev; 72 struct sapcic_socket *so; 73 int i; 74 75 for (i = 0; i < 2; i++) { 76 so = &sc->sc_socket[i]; 77 sapcic_kthread_create(so); 78 79 sacc_intr_establish((sacc_chipset_tag_t)so->pcictag_cookie, 80 i ? IRQ_S1_CDVALID : IRQ_S0_CDVALID, 81 IST_EDGE_RAISE, IPL_BIO, sapcic_intr, so); 82 } 83 } 84 85 void 86 sacpcic_attach_common(struct sacc_softc *psc, struct sacpcic_softc *sc, 87 void *aux, void (* socket_setup_hook)(struct sapcic_socket *)) 88 { 89 int i; 90 struct pcmciabus_attach_args paa; 91 92 printf("\n"); 93 94 sc->sc_pc.sc_iot = psc->sc_iot; 95 sc->sc_ioh = psc->sc_ioh; 96 97 for (i = 0; i < 2; i++) { 98 sc->sc_socket[i].sc = (struct sapcic_softc *)sc; 99 sc->sc_socket[i].socket = i; 100 sc->sc_socket[i].pcictag_cookie = psc; 101 sc->sc_socket[i].pcictag = NULL; 102 sc->sc_socket[i].event_thread = NULL; 103 sc->sc_socket[i].event = 0; 104 sc->sc_socket[i].laststatus = SAPCIC_CARD_INVALID; 105 sc->sc_socket[i].shutdown = 0; 106 107 socket_setup_hook(&sc->sc_socket[i]); 108 109 paa.paa_busname = "pcmcia"; 110 paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions; 111 paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i]; 112 paa.iobase = 0; 113 paa.iosize = 0x4000000; 114 115 sc->sc_socket[i].pcmcia = 116 config_found_ia(&sc->sc_pc.sc_dev, "pcmciabus", &paa, 117 sacpcic_print); 118 } 119 120 config_interrupts(&sc->sc_pc.sc_dev, sacpcic_config_deferred); 121 } 122 123 int 124 sacpcic_print(void *aux, const char *name) 125 { 126 127 return UNCONF; 128 } 129 130 int 131 sacpcic_read(struct sapcic_socket *so, int reg) 132 { 133 int cr, bit; 134 struct sacpcic_softc *sc = (struct sacpcic_softc *)so->sc; 135 136 cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_ioh, SACPCIC_SR); 137 138 switch (reg) { 139 case SAPCIC_STATUS_CARD: 140 bit = (so->socket ? SR_S1_CARDDETECT : SR_S0_CARDDETECT) & cr; 141 if (bit) 142 return SAPCIC_CARD_INVALID; 143 else 144 return SAPCIC_CARD_VALID; 145 146 case SAPCIC_STATUS_VS1: 147 bit = (so->socket ? SR_S1_VS1 : SR_S0_VS1); 148 return (bit & cr); 149 150 case SAPCIC_STATUS_VS2: 151 bit = (so->socket ? SR_S1_VS2 : SR_S0_VS2); 152 return (bit & cr); 153 154 case SAPCIC_STATUS_READY: 155 bit = (so->socket ? SR_S1_READY : SR_S0_READY); 156 return (bit & cr); 157 158 default: 159 panic("sacpcic_read: bogus register"); 160 } 161 } 162 163 void 164 sacpcic_write(struct sapcic_socket *so, int reg, int arg) 165 { 166 int s, oldvalue, newvalue, mask; 167 struct sacpcic_softc *sc = (struct sacpcic_softc *)so->sc; 168 169 s = splhigh(); 170 oldvalue = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_ioh, SACPCIC_CR); 171 172 switch (reg) { 173 case SAPCIC_CONTROL_RESET: 174 mask = so->socket ? CR_S1_RST : CR_S0_RST; 175 176 newvalue = (oldvalue & ~mask) | (arg ? mask : 0); 177 break; 178 179 case SAPCIC_CONTROL_LINEENABLE: 180 mask = so->socket ? CR_S1_FLT : CR_S0_FLT; 181 182 newvalue = (oldvalue & ~mask) | (arg ? mask : 0); 183 break; 184 185 case SAPCIC_CONTROL_WAITENABLE: 186 mask = so->socket ? CR_S1_PWAITEN : CR_S0_PWAITEN; 187 188 newvalue = (oldvalue & ~mask) | (arg ? mask : 0); 189 break; 190 191 case SAPCIC_CONTROL_POWERSELECT: 192 mask = so->socket ? CR_S1_PSE : CR_S0_PSE; 193 newvalue = oldvalue & ~mask; 194 195 switch (arg) { 196 case SAPCIC_POWER_3V: 197 break; 198 case SAPCIC_POWER_5V: 199 newvalue |= mask; 200 break; 201 default: 202 splx(s); 203 panic("sacpcic_write: bogus arg"); 204 } 205 break; 206 207 default: 208 splx(s); 209 panic("sacpcic_write: bogus register"); 210 } 211 bus_space_write_4(sc->sc_pc.sc_iot, sc->sc_ioh, SACPCIC_CR, newvalue); 212 splx(s); 213 } 214 215 void 216 sacpcic_clear_intr(int arg) 217 { 218 /* sacc_intr_dispatch takes care of intr status */ 219 } 220 221 void * 222 sacpcic_intr_establish(struct sapcic_socket *so, int level, 223 int (*ih_fun)(void *), void *ih_arg) 224 { 225 int irq; 226 227 irq = so->socket ? IRQ_S1_READY : IRQ_S0_READY; 228 return sacc_intr_establish((sacc_chipset_tag_t)so->pcictag_cookie, irq, 229 IST_EDGE_FALL, level, ih_fun, ih_arg); 230 } 231 232 void 233 sacpcic_intr_disestablish(struct sapcic_socket *so, void *ih) 234 { 235 sacc_intr_disestablish((sacc_chipset_tag_t)so->pcictag_cookie, ih); 236 } 237
Indexes created Wed Oct 01 15:09:59 GMT 2025