exynos_platform.c revision 1.12 1 1.12 skrll /* $NetBSD: exynos_platform.c,v 1.12 2018/08/05 14:02:35 skrll Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.11 skrll #include "opt_arm_debug.h"
30 1.1 jmcneill #include "opt_exynos.h"
31 1.1 jmcneill #include "opt_multiprocessor.h"
32 1.1 jmcneill #include "opt_fdt_arm.h"
33 1.1 jmcneill
34 1.1 jmcneill #include "ukbd.h"
35 1.1 jmcneill
36 1.1 jmcneill #include <sys/cdefs.h>
37 1.12 skrll __KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.12 2018/08/05 14:02:35 skrll Exp $");
38 1.1 jmcneill
39 1.1 jmcneill #include <sys/param.h>
40 1.1 jmcneill #include <sys/bus.h>
41 1.1 jmcneill #include <sys/cpu.h>
42 1.1 jmcneill #include <sys/device.h>
43 1.1 jmcneill #include <sys/termios.h>
44 1.1 jmcneill
45 1.1 jmcneill #include <dev/fdt/fdtvar.h>
46 1.1 jmcneill
47 1.1 jmcneill #include <uvm/uvm_extern.h>
48 1.1 jmcneill
49 1.1 jmcneill #include <machine/bootconfig.h>
50 1.1 jmcneill #include <arm/cpufunc.h>
51 1.1 jmcneill
52 1.1 jmcneill #include <arm/samsung/exynos_reg.h>
53 1.1 jmcneill #include <arm/samsung/exynos_var.h>
54 1.10 jmcneill #include <arm/samsung/mct_var.h>
55 1.1 jmcneill
56 1.2 jmcneill #include <evbarm/exynos/platform.h>
57 1.2 jmcneill
58 1.1 jmcneill #include <arm/fdt/arm_fdtvar.h>
59 1.1 jmcneill
60 1.6 jmcneill #define EXYNOS5_SWRESET_REG 0x10040400
61 1.6 jmcneill
62 1.1 jmcneill static const struct pmap_devmap *
63 1.1 jmcneill exynos_platform_devmap(void)
64 1.1 jmcneill {
65 1.1 jmcneill static const struct pmap_devmap devmap[] = {
66 1.1 jmcneill DEVMAP_ENTRY(EXYNOS_CORE_VBASE,
67 1.1 jmcneill EXYNOS_CORE_PBASE,
68 1.2 jmcneill EXYNOS5_CORE_SIZE),
69 1.2 jmcneill DEVMAP_ENTRY(EXYNOS5_AUDIOCORE_VBASE,
70 1.2 jmcneill EXYNOS5_AUDIOCORE_PBASE,
71 1.2 jmcneill EXYNOS5_AUDIOCORE_SIZE),
72 1.1 jmcneill DEVMAP_ENTRY_END
73 1.8 skrll };
74 1.1 jmcneill
75 1.1 jmcneill return devmap;
76 1.1 jmcneill }
77 1.1 jmcneill
78 1.2 jmcneill #define EXYNOS_IOPHYSTOVIRT(a) \
79 1.2 jmcneill ((vaddr_t)(((a) - EXYNOS_CORE_PBASE) + EXYNOS_CORE_VBASE))
80 1.2 jmcneill
81 1.1 jmcneill static void
82 1.1 jmcneill exynos_platform_bootstrap(void)
83 1.1 jmcneill {
84 1.2 jmcneill paddr_t uart_address = armreg_tpidruro_read(); /* XXX */
85 1.2 jmcneill exynos_bootstrap(EXYNOS_CORE_VBASE, EXYNOS_IOPHYSTOVIRT(uart_address));
86 1.1 jmcneill }
87 1.1 jmcneill
88 1.1 jmcneill static void
89 1.1 jmcneill exynos_platform_init_attach_args(struct fdt_attach_args *faa)
90 1.1 jmcneill {
91 1.1 jmcneill extern struct bus_space armv7_generic_bs_tag;
92 1.1 jmcneill extern struct bus_space armv7_generic_a4x_bs_tag;
93 1.9 ryo extern struct arm32_bus_dma_tag arm_generic_dma_tag;
94 1.1 jmcneill
95 1.1 jmcneill faa->faa_bst = &armv7_generic_bs_tag;
96 1.1 jmcneill faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag;
97 1.9 ryo faa->faa_dmat = &arm_generic_dma_tag;
98 1.1 jmcneill }
99 1.1 jmcneill
100 1.1 jmcneill static void
101 1.1 jmcneill exynos_platform_early_putchar(char c)
102 1.1 jmcneill {
103 1.4 jmcneill #if defined(VERBOSE_INIT_ARM)
104 1.2 jmcneill extern void exynos_putchar(int); /* XXX from exynos_start.S */
105 1.2 jmcneill
106 1.2 jmcneill exynos_putchar(c);
107 1.4 jmcneill #endif
108 1.1 jmcneill }
109 1.1 jmcneill
110 1.1 jmcneill static void
111 1.1 jmcneill exynos_platform_device_register(device_t self, void *aux)
112 1.1 jmcneill {
113 1.1 jmcneill exynos_device_register(self, aux);
114 1.1 jmcneill }
115 1.1 jmcneill
116 1.1 jmcneill static void
117 1.6 jmcneill exynos5_platform_reset(void)
118 1.1 jmcneill {
119 1.6 jmcneill bus_space_tag_t bst = &armv7_generic_bs_tag;
120 1.6 jmcneill bus_space_handle_t bsh;
121 1.6 jmcneill
122 1.6 jmcneill bus_space_map(bst, EXYNOS5_SWRESET_REG, 4, 0, &bsh);
123 1.6 jmcneill bus_space_write_4(bst, bsh, 0, 1);
124 1.1 jmcneill }
125 1.1 jmcneill
126 1.1 jmcneill static u_int
127 1.1 jmcneill exynos_platform_uart_freq(void)
128 1.1 jmcneill {
129 1.1 jmcneill return EXYNOS_UART_FREQ;
130 1.1 jmcneill }
131 1.1 jmcneill
132 1.1 jmcneill static const struct arm_platform exynos5_platform = {
133 1.12 skrll .ap_devmap = exynos_platform_devmap,
134 1.12 skrll .ap_bootstrap = exynos_platform_bootstrap,
135 1.12 skrll .ap_init_attach_args = exynos_platform_init_attach_args,
136 1.12 skrll .ap_early_putchar = exynos_platform_early_putchar,
137 1.12 skrll .ap_device_register = exynos_platform_device_register,
138 1.12 skrll .ap_reset = exynos5_platform_reset,
139 1.12 skrll .ap_delay = mct_delay,
140 1.12 skrll .ap_uart_freq = exynos_platform_uart_freq,
141 1.1 jmcneill };
142 1.1 jmcneill
143 1.1 jmcneill ARM_PLATFORM(exynos5, "samsung,exynos5", &exynos5_platform);
144