exynos_platform.c revision 1.13 1 1.13 skrll /* $NetBSD: exynos_platform.c,v 1.13 2018/08/19 07:27:33 skrll Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.11 skrll #include "opt_arm_debug.h"
30 1.1 jmcneill #include "opt_exynos.h"
31 1.1 jmcneill #include "opt_multiprocessor.h"
32 1.1 jmcneill #include "opt_fdt_arm.h"
33 1.1 jmcneill
34 1.1 jmcneill #include "ukbd.h"
35 1.1 jmcneill
36 1.1 jmcneill #include <sys/cdefs.h>
37 1.13 skrll __KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.13 2018/08/19 07:27:33 skrll Exp $");
38 1.1 jmcneill
39 1.1 jmcneill #include <sys/param.h>
40 1.1 jmcneill #include <sys/bus.h>
41 1.1 jmcneill #include <sys/cpu.h>
42 1.1 jmcneill #include <sys/device.h>
43 1.1 jmcneill #include <sys/termios.h>
44 1.1 jmcneill
45 1.1 jmcneill #include <dev/fdt/fdtvar.h>
46 1.1 jmcneill
47 1.1 jmcneill #include <uvm/uvm_extern.h>
48 1.1 jmcneill
49 1.1 jmcneill #include <machine/bootconfig.h>
50 1.1 jmcneill #include <arm/cpufunc.h>
51 1.1 jmcneill
52 1.1 jmcneill #include <arm/samsung/exynos_reg.h>
53 1.1 jmcneill #include <arm/samsung/exynos_var.h>
54 1.10 jmcneill #include <arm/samsung/mct_var.h>
55 1.13 skrll #include <arm/samsung/sscom_reg.h>
56 1.1 jmcneill
57 1.2 jmcneill #include <evbarm/exynos/platform.h>
58 1.2 jmcneill
59 1.1 jmcneill #include <arm/fdt/arm_fdtvar.h>
60 1.1 jmcneill
61 1.13 skrll void exynos_platform_early_putchar(char);
62 1.13 skrll
63 1.6 jmcneill #define EXYNOS5_SWRESET_REG 0x10040400
64 1.6 jmcneill
65 1.2 jmcneill #define EXYNOS_IOPHYSTOVIRT(a) \
66 1.2 jmcneill ((vaddr_t)(((a) - EXYNOS_CORE_PBASE) + EXYNOS_CORE_VBASE))
67 1.2 jmcneill
68 1.1 jmcneill static void
69 1.1 jmcneill exynos_platform_bootstrap(void)
70 1.1 jmcneill {
71 1.13 skrll
72 1.13 skrll exynos_bootstrap(EXYNOS_CORE_VBASE);
73 1.1 jmcneill }
74 1.1 jmcneill
75 1.1 jmcneill static void
76 1.1 jmcneill exynos_platform_init_attach_args(struct fdt_attach_args *faa)
77 1.1 jmcneill {
78 1.1 jmcneill extern struct bus_space armv7_generic_bs_tag;
79 1.1 jmcneill extern struct bus_space armv7_generic_a4x_bs_tag;
80 1.9 ryo extern struct arm32_bus_dma_tag arm_generic_dma_tag;
81 1.1 jmcneill
82 1.1 jmcneill faa->faa_bst = &armv7_generic_bs_tag;
83 1.1 jmcneill faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag;
84 1.9 ryo faa->faa_dmat = &arm_generic_dma_tag;
85 1.1 jmcneill }
86 1.1 jmcneill
87 1.13 skrll
88 1.13 skrll void
89 1.1 jmcneill exynos_platform_early_putchar(char c)
90 1.1 jmcneill {
91 1.13 skrll #ifdef CONSADDR
92 1.13 skrll #define CONSADDR_VA (CONSADDR - EXYNOS_CORE_PBASE + EXYNOS_CORE_VBASE)
93 1.2 jmcneill
94 1.13 skrll volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
95 1.13 skrll (volatile uint32_t *)CONSADDR_VA :
96 1.13 skrll (volatile uint32_t *)CONSADDR;
97 1.13 skrll
98 1.13 skrll while ((uartaddr[SSCOM_UFSTAT / 4] & UFSTAT_TXFULL) != 0)
99 1.13 skrll ;
100 1.13 skrll
101 1.13 skrll uartaddr[SSCOM_UTXH / 4] = c;
102 1.4 jmcneill #endif
103 1.1 jmcneill }
104 1.1 jmcneill
105 1.1 jmcneill static void
106 1.1 jmcneill exynos_platform_device_register(device_t self, void *aux)
107 1.1 jmcneill {
108 1.1 jmcneill exynos_device_register(self, aux);
109 1.1 jmcneill }
110 1.1 jmcneill
111 1.1 jmcneill static void
112 1.6 jmcneill exynos5_platform_reset(void)
113 1.1 jmcneill {
114 1.6 jmcneill bus_space_tag_t bst = &armv7_generic_bs_tag;
115 1.6 jmcneill bus_space_handle_t bsh;
116 1.6 jmcneill
117 1.6 jmcneill bus_space_map(bst, EXYNOS5_SWRESET_REG, 4, 0, &bsh);
118 1.6 jmcneill bus_space_write_4(bst, bsh, 0, 1);
119 1.1 jmcneill }
120 1.1 jmcneill
121 1.1 jmcneill static u_int
122 1.1 jmcneill exynos_platform_uart_freq(void)
123 1.1 jmcneill {
124 1.1 jmcneill return EXYNOS_UART_FREQ;
125 1.1 jmcneill }
126 1.1 jmcneill
127 1.13 skrll
128 1.13 skrll #if defined(SOC_EXYNOS4)
129 1.13 skrll static const struct pmap_devmap *
130 1.13 skrll exynos4_platform_devmap(void)
131 1.13 skrll {
132 1.13 skrll static const struct pmap_devmap devmap[] = {
133 1.13 skrll DEVMAP_ENTRY(EXYNOS_CORE_VBASE,
134 1.13 skrll EXYNOS_CORE_PBASE,
135 1.13 skrll EXYNOS4_CORE_SIZE),
136 1.13 skrll DEVMAP_ENTRY(EXYNOS4_AUDIOCORE_VBASE,
137 1.13 skrll EXYNOS4_AUDIOCORE_PBASE,
138 1.13 skrll EXYNOS4_AUDIOCORE_SIZE),
139 1.13 skrll DEVMAP_ENTRY_END
140 1.13 skrll };
141 1.13 skrll
142 1.13 skrll return devmap;
143 1.13 skrll }
144 1.13 skrll
145 1.13 skrll static const struct arm_platform exynos4_platform = {
146 1.13 skrll .ap_devmap = exynos4_platform_devmap,
147 1.13 skrll .ap_bootstrap = exynos_platform_bootstrap,
148 1.13 skrll .ap_init_attach_args = exynos_platform_init_attach_args,
149 1.13 skrll .ap_early_putchar = exynos_platform_early_putchar,
150 1.13 skrll .ap_device_register = exynos_platform_device_register,
151 1.13 skrll .ap_reset = exynos5_platform_reset,
152 1.13 skrll .ap_delay = mct_delay,
153 1.13 skrll .ap_uart_freq = exynos_platform_uart_freq,
154 1.13 skrll };
155 1.13 skrll
156 1.13 skrll ARM_PLATFORM(exynos4, "samsung,exynos4", &exynos4_platform);
157 1.13 skrll #endif
158 1.13 skrll
159 1.13 skrll
160 1.13 skrll #if defined(SOC_EXYNOS5)
161 1.13 skrll static const struct pmap_devmap *
162 1.13 skrll exynos5_platform_devmap(void)
163 1.13 skrll {
164 1.13 skrll static const struct pmap_devmap devmap[] = {
165 1.13 skrll DEVMAP_ENTRY(EXYNOS_CORE_VBASE,
166 1.13 skrll EXYNOS_CORE_PBASE,
167 1.13 skrll EXYNOS5_CORE_SIZE),
168 1.13 skrll DEVMAP_ENTRY(EXYNOS5_AUDIOCORE_VBASE,
169 1.13 skrll EXYNOS5_AUDIOCORE_PBASE,
170 1.13 skrll EXYNOS5_AUDIOCORE_SIZE),
171 1.13 skrll DEVMAP_ENTRY_END
172 1.13 skrll };
173 1.13 skrll
174 1.13 skrll return devmap;
175 1.13 skrll }
176 1.13 skrll
177 1.1 jmcneill static const struct arm_platform exynos5_platform = {
178 1.13 skrll .ap_devmap = exynos5_platform_devmap,
179 1.12 skrll .ap_bootstrap = exynos_platform_bootstrap,
180 1.12 skrll .ap_init_attach_args = exynos_platform_init_attach_args,
181 1.12 skrll .ap_early_putchar = exynos_platform_early_putchar,
182 1.12 skrll .ap_device_register = exynos_platform_device_register,
183 1.12 skrll .ap_reset = exynos5_platform_reset,
184 1.12 skrll .ap_delay = mct_delay,
185 1.12 skrll .ap_uart_freq = exynos_platform_uart_freq,
186 1.1 jmcneill };
187 1.1 jmcneill
188 1.1 jmcneill ARM_PLATFORM(exynos5, "samsung,exynos5", &exynos5_platform);
189 1.13 skrll #endif
190