exynos_platform.c revision 1.6 1 1.6 jmcneill /* $NetBSD: exynos_platform.c,v 1.6 2017/06/20 19:13:34 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #include "opt_exynos.h"
30 1.1 jmcneill #include "opt_multiprocessor.h"
31 1.1 jmcneill #include "opt_fdt_arm.h"
32 1.1 jmcneill
33 1.1 jmcneill #include "ukbd.h"
34 1.1 jmcneill
35 1.1 jmcneill #include <sys/cdefs.h>
36 1.6 jmcneill __KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.6 2017/06/20 19:13:34 jmcneill Exp $");
37 1.1 jmcneill
38 1.1 jmcneill #include <sys/param.h>
39 1.1 jmcneill #include <sys/bus.h>
40 1.1 jmcneill #include <sys/cpu.h>
41 1.1 jmcneill #include <sys/device.h>
42 1.1 jmcneill #include <sys/termios.h>
43 1.1 jmcneill
44 1.1 jmcneill #include <dev/fdt/fdtvar.h>
45 1.1 jmcneill
46 1.1 jmcneill #include <uvm/uvm_extern.h>
47 1.1 jmcneill
48 1.1 jmcneill #include <machine/bootconfig.h>
49 1.1 jmcneill #include <arm/cpufunc.h>
50 1.1 jmcneill
51 1.1 jmcneill #include <arm/samsung/exynos_reg.h>
52 1.1 jmcneill #include <arm/samsung/exynos_var.h>
53 1.1 jmcneill
54 1.2 jmcneill #include <evbarm/exynos/platform.h>
55 1.2 jmcneill
56 1.1 jmcneill #include <arm/cortex/gtmr_var.h>
57 1.1 jmcneill
58 1.1 jmcneill #include <arm/fdt/arm_fdtvar.h>
59 1.1 jmcneill
60 1.6 jmcneill #define EXYNOS5_SWRESET_REG 0x10040400
61 1.6 jmcneill
62 1.1 jmcneill #define DEVMAP_ALIGN(a) ((a) & ~L1_S_OFFSET)
63 1.1 jmcneill #define DEVMAP_SIZE(s) roundup2((s), L1_S_SIZE)
64 1.1 jmcneill #define DEVMAP_ENTRY(va, pa, sz) \
65 1.1 jmcneill { \
66 1.1 jmcneill .pd_va = DEVMAP_ALIGN(va), \
67 1.1 jmcneill .pd_pa = DEVMAP_ALIGN(pa), \
68 1.1 jmcneill .pd_size = DEVMAP_SIZE(sz), \
69 1.1 jmcneill .pd_prot = VM_PROT_READ|VM_PROT_WRITE, \
70 1.1 jmcneill .pd_cache = PTE_NOCACHE \
71 1.1 jmcneill }
72 1.1 jmcneill #define DEVMAP_ENTRY_END { 0 }
73 1.1 jmcneill
74 1.1 jmcneill static const struct pmap_devmap *
75 1.1 jmcneill exynos_platform_devmap(void)
76 1.1 jmcneill {
77 1.1 jmcneill static const struct pmap_devmap devmap[] = {
78 1.1 jmcneill DEVMAP_ENTRY(EXYNOS_CORE_VBASE,
79 1.1 jmcneill EXYNOS_CORE_PBASE,
80 1.2 jmcneill EXYNOS5_CORE_SIZE),
81 1.2 jmcneill DEVMAP_ENTRY(EXYNOS5_AUDIOCORE_VBASE,
82 1.2 jmcneill EXYNOS5_AUDIOCORE_PBASE,
83 1.2 jmcneill EXYNOS5_AUDIOCORE_SIZE),
84 1.1 jmcneill DEVMAP_ENTRY_END
85 1.1 jmcneill };
86 1.1 jmcneill
87 1.1 jmcneill return devmap;
88 1.1 jmcneill }
89 1.1 jmcneill
90 1.2 jmcneill #define EXYNOS_IOPHYSTOVIRT(a) \
91 1.2 jmcneill ((vaddr_t)(((a) - EXYNOS_CORE_PBASE) + EXYNOS_CORE_VBASE))
92 1.2 jmcneill
93 1.1 jmcneill static void
94 1.1 jmcneill exynos_platform_bootstrap(void)
95 1.1 jmcneill {
96 1.2 jmcneill paddr_t uart_address = armreg_tpidruro_read(); /* XXX */
97 1.2 jmcneill exynos_bootstrap(EXYNOS_CORE_VBASE, EXYNOS_IOPHYSTOVIRT(uart_address));
98 1.1 jmcneill }
99 1.1 jmcneill
100 1.1 jmcneill static void
101 1.1 jmcneill exynos_platform_init_attach_args(struct fdt_attach_args *faa)
102 1.1 jmcneill {
103 1.1 jmcneill extern struct bus_space armv7_generic_bs_tag;
104 1.1 jmcneill extern struct bus_space armv7_generic_a4x_bs_tag;
105 1.1 jmcneill extern struct arm32_bus_dma_tag armv7_generic_dma_tag;
106 1.1 jmcneill
107 1.1 jmcneill faa->faa_bst = &armv7_generic_bs_tag;
108 1.1 jmcneill faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag;
109 1.1 jmcneill faa->faa_dmat = &armv7_generic_dma_tag;
110 1.1 jmcneill }
111 1.1 jmcneill
112 1.1 jmcneill static void
113 1.1 jmcneill exynos_platform_early_putchar(char c)
114 1.1 jmcneill {
115 1.4 jmcneill #if defined(VERBOSE_INIT_ARM)
116 1.2 jmcneill extern void exynos_putchar(int); /* XXX from exynos_start.S */
117 1.2 jmcneill
118 1.2 jmcneill exynos_putchar(c);
119 1.4 jmcneill #endif
120 1.1 jmcneill }
121 1.1 jmcneill
122 1.1 jmcneill static void
123 1.1 jmcneill exynos_platform_device_register(device_t self, void *aux)
124 1.1 jmcneill {
125 1.1 jmcneill exynos_device_register(self, aux);
126 1.1 jmcneill }
127 1.1 jmcneill
128 1.1 jmcneill static void
129 1.6 jmcneill exynos5_platform_reset(void)
130 1.1 jmcneill {
131 1.6 jmcneill bus_space_tag_t bst = &armv7_generic_bs_tag;
132 1.6 jmcneill bus_space_handle_t bsh;
133 1.6 jmcneill
134 1.6 jmcneill bus_space_map(bst, EXYNOS5_SWRESET_REG, 4, 0, &bsh);
135 1.6 jmcneill bus_space_write_4(bst, bsh, 0, 1);
136 1.1 jmcneill }
137 1.1 jmcneill
138 1.1 jmcneill static void
139 1.1 jmcneill exynos_platform_delay(u_int us)
140 1.1 jmcneill {
141 1.5 jmcneill gtmr_delay(us);
142 1.1 jmcneill }
143 1.1 jmcneill
144 1.1 jmcneill static u_int
145 1.1 jmcneill exynos_platform_uart_freq(void)
146 1.1 jmcneill {
147 1.1 jmcneill return EXYNOS_UART_FREQ;
148 1.1 jmcneill }
149 1.1 jmcneill
150 1.1 jmcneill static const struct arm_platform exynos5_platform = {
151 1.1 jmcneill .devmap = exynos_platform_devmap,
152 1.1 jmcneill .bootstrap = exynos_platform_bootstrap,
153 1.1 jmcneill .init_attach_args = exynos_platform_init_attach_args,
154 1.1 jmcneill .early_putchar = exynos_platform_early_putchar,
155 1.1 jmcneill .device_register = exynos_platform_device_register,
156 1.6 jmcneill .reset = exynos5_platform_reset,
157 1.1 jmcneill .delay = exynos_platform_delay,
158 1.1 jmcneill .uart_freq = exynos_platform_uart_freq,
159 1.1 jmcneill };
160 1.1 jmcneill
161 1.1 jmcneill ARM_PLATFORM(exynos5, "samsung,exynos5", &exynos5_platform);
162