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exynos_platform.c revision 1.18 
      1 /* $NetBSD: exynos_platform.c,v 1.18 2018/10/08 08:17:00 skrll Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include "opt_arm_debug.h"
     30 #include "opt_console.h"
     31 #include "opt_exynos.h"
     32 #include "opt_multiprocessor.h"
     33 #include "opt_console.h"
     34 
     35 #include "ukbd.h"
     36 
     37 #include <sys/cdefs.h>
     38 __KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.18 2018/10/08 08:17:00 skrll Exp $");
     39 
     40 #include <sys/param.h>
     41 #include <sys/bus.h>
     42 #include <sys/cpu.h>
     43 #include <sys/device.h>
     44 #include <sys/termios.h>
     45 
     46 #include <dev/fdt/fdtvar.h>
     47 
     48 #include <uvm/uvm_extern.h>
     49 
     50 #include <machine/bootconfig.h>
     51 #include <arm/cpufunc.h>
     52 
     53 #include <arm/samsung/exynos_reg.h>
     54 #include <arm/samsung/exynos_var.h>
     55 #include <arm/samsung/mct_var.h>
     56 #include <arm/samsung/sscom_reg.h>
     57 
     58 #include <evbarm/exynos/platform.h>
     59 
     60 #include <arm/fdt/arm_fdtvar.h>
     61 
     62 void exynos_platform_early_putchar(char);
     63 
     64 #define	EXYNOS5_SWRESET_REG	0x10040400
     65 
     66 #define EXYNOS_IOPHYSTOVIRT(a) \
     67     ((vaddr_t)(((a) - EXYNOS_CORE_PBASE) + EXYNOS_CORE_VBASE))
     68 
     69 #define	EXYNOS5800_PMU_BASE		0x10040000
     70 #define	EXYNOS5800_PMU_SIZE		0x20000
     71 #define	 EXYNOS5800_PMU_CORE_CONFIG(n)	(0x2000 + 0x80 * (n))
     72 #define	 EXYNOS5800_PMU_CORE_STATUS(n)	(0x2004 + 0x80 * (n))
     73 #define	 EXYNOS5800_PMU_CORE_POWER_EN	0x3
     74 #define	EXYNOS5800_SYSRAM_BASE		0x0207301c
     75 #define	EXYNOS5800_SYSRAM_SIZE		0x4
     76 
     77 static void
     78 exynos5800_mp_bootstrap(void)
     79 {
     80 #if defined(MULTIPROCESSOR)
     81 	extern void cortex_mpstart(void);
     82 	bus_space_tag_t bst = &armv7_generic_bs_tag;
     83 	bus_space_handle_t pmu_bsh, sysram_bsh;
     84 	uint32_t val, started = 0;
     85 	int n;
     86 
     87 	arm_cpu_max = 1 + __SHIFTOUT(armreg_l2ctrl_read(), L2CTRL_NUMCPU);
     88 
     89 	bus_space_map(bst, EXYNOS5800_PMU_BASE, EXYNOS5800_PMU_SIZE, 0, &pmu_bsh);
     90 	bus_space_map(bst, EXYNOS5800_SYSRAM_BASE, EXYNOS5800_SYSRAM_SIZE, 0, &sysram_bsh);
     91 
     92 	bus_space_write_4(bst, sysram_bsh, 0, (uint32_t)cortex_mpstart);
     93 	bus_space_barrier(bst, sysram_bsh, 0, 4, BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
     94 
     95 	for (n = 1; n < arm_cpu_max; n++) {
     96 		bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_CORE_CONFIG(n),
     97 		    EXYNOS5800_PMU_CORE_POWER_EN);
     98 		for (u_int i = 0x01000000; i > 0; i--) {
     99 			val = bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_CORE_STATUS(n));
    100 			if ((val & EXYNOS5800_PMU_CORE_POWER_EN) == EXYNOS5800_PMU_CORE_POWER_EN) {
    101 				started |= __BIT(n);
    102 				break;
    103 			}
    104 		}
    105 	}
    106 
    107 	for (u_int i = 0x10000000; i > 0; i--) {
    108 		arm_dmb();
    109 		if (arm_cpu_hatched == started)
    110 			break;
    111 	}
    112 
    113 	bus_space_unmap(bst, sysram_bsh, EXYNOS5800_SYSRAM_SIZE);
    114 	bus_space_unmap(bst, pmu_bsh, EXYNOS5800_PMU_SIZE);
    115 #endif
    116 }
    117 
    118 static struct of_compat_data mp_compat_data[] = {
    119 	{ "samsung,exynos5800",		(uintptr_t)exynos5800_mp_bootstrap },
    120 	{ NULL }
    121 };
    122 
    123 static void
    124 exynos_platform_bootstrap(void)
    125 {
    126 
    127 	void (*mp_bootstrap)(void) = NULL;
    128 	const struct of_compat_data *cd = of_search_compatible(OF_finddevice("/"), mp_compat_data);
    129 	if (cd)
    130 		mp_bootstrap = (void (*)(void))cd->data;
    131 
    132 	if (mp_bootstrap)
    133 		mp_bootstrap();
    134 }
    135 
    136 static void
    137 exynos_platform_init_attach_args(struct fdt_attach_args *faa)
    138 {
    139 	extern struct bus_space armv7_generic_bs_tag;
    140 	extern struct bus_space armv7_generic_a4x_bs_tag;
    141 	extern struct arm32_bus_dma_tag arm_generic_dma_tag;
    142 
    143 	faa->faa_bst = &armv7_generic_bs_tag;
    144 	faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag;
    145 	faa->faa_dmat = &arm_generic_dma_tag;
    146 }
    147 
    148 
    149 void
    150 exynos_platform_early_putchar(char c)
    151 {
    152 #ifdef CONSADDR
    153 #define CONSADDR_VA	(CONSADDR - EXYNOS_CORE_PBASE + EXYNOS_CORE_VBASE)
    154 
    155 	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
    156 	    (volatile uint32_t *)CONSADDR_VA :
    157 	    (volatile uint32_t *)CONSADDR;
    158 
    159 	while ((uartaddr[SSCOM_UFSTAT / 4] & UFSTAT_TXFULL) != 0)
    160 		;
    161 
    162 	uartaddr[SSCOM_UTXH / 4] = c;
    163 #endif
    164 }
    165 
    166 static void
    167 exynos_platform_device_register(device_t self, void *aux)
    168 {
    169 	exynos_device_register(self, aux);
    170 }
    171 
    172 static void
    173 exynos5_platform_reset(void)
    174 {
    175 	bus_space_tag_t bst = &armv7_generic_bs_tag;
    176 	bus_space_handle_t bsh;
    177 
    178 	bus_space_map(bst, EXYNOS5_SWRESET_REG, 4, 0, &bsh);
    179 	bus_space_write_4(bst, bsh, 0, 1);
    180 }
    181 
    182 static u_int
    183 exynos_platform_uart_freq(void)
    184 {
    185 	return EXYNOS_UART_FREQ;
    186 }
    187 
    188 
    189 #if defined(SOC_EXYNOS4)
    190 static const struct pmap_devmap *
    191 exynos4_platform_devmap(void)
    192 {
    193 	static const struct pmap_devmap devmap[] = {
    194 		DEVMAP_ENTRY(EXYNOS_CORE_VBASE,
    195 			     EXYNOS_CORE_PBASE,
    196 			     EXYNOS4_CORE_SIZE),
    197 		DEVMAP_ENTRY(EXYNOS4_AUDIOCORE_VBASE,
    198 			     EXYNOS4_AUDIOCORE_PBASE,
    199 			     EXYNOS4_AUDIOCORE_SIZE),
    200 		DEVMAP_ENTRY_END
    201 	};
    202 
    203 	return devmap;
    204 }
    205 
    206 static void
    207 exynos4_platform_bootstrap(void)
    208 {
    209 
    210 	exynos_bootstrap(4);
    211 
    212 	exynos_platform_bootstrap();
    213 }
    214 
    215 static const struct arm_platform exynos4_platform = {
    216 	.ap_devmap = exynos4_platform_devmap,
    217 	.ap_bootstrap = exynos4_platform_bootstrap,
    218 	.ap_init_attach_args = exynos_platform_init_attach_args,
    219 	.ap_early_putchar = exynos_platform_early_putchar,
    220 	.ap_device_register = exynos_platform_device_register,
    221 	.ap_reset = exynos5_platform_reset,
    222 	.ap_delay = mct_delay,
    223 	.ap_uart_freq = exynos_platform_uart_freq,
    224 };
    225 
    226 ARM_PLATFORM(exynos4, "samsung,exynos4", &exynos4_platform);
    227 #endif
    228 
    229 
    230 #if defined(SOC_EXYNOS5)
    231 static const struct pmap_devmap *
    232 exynos5_platform_devmap(void)
    233 {
    234 	static const struct pmap_devmap devmap[] = {
    235 		DEVMAP_ENTRY(EXYNOS_CORE_VBASE,
    236 			     EXYNOS_CORE_PBASE,
    237 			     EXYNOS5_CORE_SIZE),
    238 		DEVMAP_ENTRY(EXYNOS5_AUDIOCORE_VBASE,
    239 			     EXYNOS5_AUDIOCORE_PBASE,
    240 			     EXYNOS5_AUDIOCORE_SIZE),
    241 		DEVMAP_ENTRY(EXYNOS5_SYSRAM_VBASE,
    242 			     EXYNOS5_SYSRAM_PBASE,
    243 			     EXYNOS5_SYSRAM_SIZE),
    244 		DEVMAP_ENTRY_END
    245 	};
    246 
    247 	return devmap;
    248 }
    249 
    250 static void
    251 exynos5_platform_bootstrap(void)
    252 {
    253 
    254 	exynos_bootstrap(5);
    255 
    256 	exynos_platform_bootstrap();
    257 }
    258 
    259 static const struct arm_platform exynos5_platform = {
    260 	.ap_devmap = exynos5_platform_devmap,
    261 	.ap_bootstrap = exynos5_platform_bootstrap,
    262 	.ap_init_attach_args = exynos_platform_init_attach_args,
    263 	.ap_early_putchar = exynos_platform_early_putchar,
    264 	.ap_device_register = exynos_platform_device_register,
    265 	.ap_reset = exynos5_platform_reset,
    266 	.ap_delay = mct_delay,
    267 	.ap_uart_freq = exynos_platform_uart_freq,
    268 };
    269 
    270 ARM_PLATFORM(exynos5, "samsung,exynos5", &exynos5_platform);
    271 #endif
    272