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exynos_platform.c revision 1.19 
      1 /* $NetBSD: exynos_platform.c,v 1.19 2018/10/18 09:01:53 skrll Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include "opt_arm_debug.h"
     30 #include "opt_console.h"
     31 #include "opt_exynos.h"
     32 #include "opt_multiprocessor.h"
     33 #include "opt_console.h"
     34 
     35 #include "ukbd.h"
     36 
     37 #include <sys/cdefs.h>
     38 __KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.19 2018/10/18 09:01:53 skrll Exp $");
     39 
     40 #include <sys/param.h>
     41 #include <sys/bus.h>
     42 #include <sys/cpu.h>
     43 #include <sys/device.h>
     44 #include <sys/termios.h>
     45 
     46 #include <dev/fdt/fdtvar.h>
     47 
     48 #include <uvm/uvm_extern.h>
     49 
     50 #include <machine/bootconfig.h>
     51 #include <arm/cpufunc.h>
     52 
     53 #include <arm/samsung/exynos_reg.h>
     54 #include <arm/samsung/exynos_var.h>
     55 #include <arm/samsung/mct_var.h>
     56 #include <arm/samsung/sscom_reg.h>
     57 
     58 #include <evbarm/exynos/platform.h>
     59 #include <evbarm/fdt/machdep.h>
     60 
     61 #include <arm/fdt/arm_fdtvar.h>
     62 
     63 void exynos_platform_early_putchar(char);
     64 
     65 #define	EXYNOS5_SWRESET_REG	0x10040400
     66 
     67 #define EXYNOS_IOPHYSTOVIRT(a) \
     68     ((vaddr_t)(((a) - EXYNOS_CORE_PBASE) + EXYNOS_CORE_VBASE))
     69 
     70 #define	EXYNOS5800_PMU_BASE		0x10040000
     71 #define	EXYNOS5800_PMU_SIZE		0x20000
     72 #define	 EXYNOS5800_PMU_CORE_CONFIG(n)	(0x2000 + 0x80 * (n))
     73 #define	 EXYNOS5800_PMU_CORE_STATUS(n)	(0x2004 + 0x80 * (n))
     74 #define	 EXYNOS5800_PMU_CORE_POWER_EN	0x3
     75 #define	EXYNOS5800_SYSRAM_BASE		0x0207301c
     76 #define	EXYNOS5800_SYSRAM_SIZE		0x4
     77 
     78 static void
     79 exynos_platform_bootstrap(void)
     80 {
     81 
     82 #if defined(MULTIPROCESSOR)
     83 	arm_cpu_max = 1 + __SHIFTOUT(armreg_l2ctrl_read(), L2CTRL_NUMCPU);
     84 #endif
     85 }
     86 
     87 static void
     88 exynos5800_mpstart(void)
     89 {
     90 #if defined(MULTIPROCESSOR)
     91 	extern void cpu_mpstart(void);
     92 	bus_space_tag_t bst = &armv7_generic_bs_tag;
     93 	bus_space_handle_t pmu_bsh, sysram_bsh;
     94 	uint32_t val, started = 0;
     95 	int n;
     96 
     97 	bus_space_map(bst, EXYNOS5800_PMU_BASE, EXYNOS5800_PMU_SIZE, 0, &pmu_bsh);
     98 	bus_space_map(bst, EXYNOS5800_SYSRAM_BASE, EXYNOS5800_SYSRAM_SIZE, 0, &sysram_bsh);
     99 
    100 	bus_space_write_4(bst, sysram_bsh, 0, KERN_VTOPHYS((vaddr_t)cpu_mpstart));
    101 	bus_space_barrier(bst, sysram_bsh, 0, 4, BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
    102 
    103 	for (n = 1; n < arm_cpu_max; n++) {
    104 		bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_CORE_CONFIG(n),
    105 		    EXYNOS5800_PMU_CORE_POWER_EN);
    106 		for (u_int i = 0x01000000; i > 0; i--) {
    107 			val = bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_CORE_STATUS(n));
    108 			if ((val & EXYNOS5800_PMU_CORE_POWER_EN) == EXYNOS5800_PMU_CORE_POWER_EN) {
    109 				started |= __BIT(n);
    110 				break;
    111 			}
    112 		}
    113 	}
    114 
    115 	for (u_int i = 0x10000000; i > 0; i--) {
    116 		arm_dmb();
    117 		if (arm_cpu_hatched == started)
    118 			break;
    119 	}
    120 
    121 	bus_space_unmap(bst, sysram_bsh, EXYNOS5800_SYSRAM_SIZE);
    122 	bus_space_unmap(bst, pmu_bsh, EXYNOS5800_PMU_SIZE);
    123 #endif
    124 }
    125 
    126 static struct of_compat_data mp_compat_data[] = {
    127 	{ "samsung,exynos5800",		(uintptr_t)exynos5800_mpstart },
    128 	{ NULL }
    129 };
    130 
    131 static void
    132 exynos_platform_mpstart(void)
    133 {
    134 
    135 	void (*mp_start)(void) = NULL;
    136 
    137 //	exynos_bootstrap();
    138 
    139 	const struct of_compat_data *cd = of_search_compatible(OF_finddevice("/"), mp_compat_data);
    140 	if (cd)
    141 		mp_start = (void (*)(void))cd->data;
    142 
    143 	if (mp_start)
    144 		mp_start();
    145 }
    146 
    147 static void
    148 exynos_platform_init_attach_args(struct fdt_attach_args *faa)
    149 {
    150 	extern struct bus_space armv7_generic_bs_tag;
    151 	extern struct bus_space armv7_generic_a4x_bs_tag;
    152 	extern struct arm32_bus_dma_tag arm_generic_dma_tag;
    153 
    154 	faa->faa_bst = &armv7_generic_bs_tag;
    155 	faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag;
    156 	faa->faa_dmat = &arm_generic_dma_tag;
    157 }
    158 
    159 void
    160 exynos_platform_early_putchar(char c)
    161 {
    162 #ifdef CONSADDR
    163 #define CONSADDR_VA	(CONSADDR - EXYNOS_CORE_PBASE + EXYNOS_CORE_VBASE)
    164 
    165 	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
    166 	    (volatile uint32_t *)CONSADDR_VA :
    167 	    (volatile uint32_t *)CONSADDR;
    168 
    169 	while ((uartaddr[SSCOM_UFSTAT / 4] & UFSTAT_TXFULL) != 0)
    170 		;
    171 
    172 	uartaddr[SSCOM_UTXH / 4] = c;
    173 #endif
    174 }
    175 
    176 static void
    177 exynos_platform_device_register(device_t self, void *aux)
    178 {
    179 	exynos_device_register(self, aux);
    180 }
    181 
    182 static void
    183 exynos5_platform_reset(void)
    184 {
    185 	bus_space_tag_t bst = &armv7_generic_bs_tag;
    186 	bus_space_handle_t bsh;
    187 
    188 	bus_space_map(bst, EXYNOS5_SWRESET_REG, 4, 0, &bsh);
    189 	bus_space_write_4(bst, bsh, 0, 1);
    190 }
    191 
    192 static u_int
    193 exynos_platform_uart_freq(void)
    194 {
    195 	return EXYNOS_UART_FREQ;
    196 }
    197 
    198 
    199 #if defined(SOC_EXYNOS4)
    200 static const struct pmap_devmap *
    201 exynos4_platform_devmap(void)
    202 {
    203 	static const struct pmap_devmap devmap[] = {
    204 		DEVMAP_ENTRY(EXYNOS_CORE_VBASE,
    205 			     EXYNOS_CORE_PBASE,
    206 			     EXYNOS4_CORE_SIZE),
    207 		DEVMAP_ENTRY(EXYNOS4_AUDIOCORE_VBASE,
    208 			     EXYNOS4_AUDIOCORE_PBASE,
    209 			     EXYNOS4_AUDIOCORE_SIZE),
    210 		DEVMAP_ENTRY_END
    211 	};
    212 
    213 	return devmap;
    214 }
    215 
    216 static void
    217 exynos4_platform_bootstrap(void)
    218 {
    219 
    220 	exynos_bootstrap(4);
    221 
    222 	exynos_platform_bootstrap();
    223 }
    224 
    225 static const struct arm_platform exynos4_platform = {
    226 	.ap_devmap = exynos4_platform_devmap,
    227 //	.ap_mpstart = exynos4_mpstart,
    228 	.ap_bootstrap = exynos4_platform_bootstrap,
    229 	.ap_init_attach_args = exynos_platform_init_attach_args,
    230 	.ap_early_putchar = exynos_platform_early_putchar,
    231 	.ap_device_register = exynos_platform_device_register,
    232 	.ap_reset = exynos5_platform_reset,
    233 	.ap_delay = mct_delay,
    234 	.ap_uart_freq = exynos_platform_uart_freq,
    235 };
    236 
    237 ARM_PLATFORM(exynos4, "samsung,exynos4", &exynos4_platform);
    238 #endif
    239 
    240 
    241 #if defined(SOC_EXYNOS5)
    242 static const struct pmap_devmap *
    243 exynos5_platform_devmap(void)
    244 {
    245 	static const struct pmap_devmap devmap[] = {
    246 		DEVMAP_ENTRY(EXYNOS_CORE_VBASE,
    247 			     EXYNOS_CORE_PBASE,
    248 			     EXYNOS5_CORE_SIZE),
    249 		DEVMAP_ENTRY(EXYNOS5_AUDIOCORE_VBASE,
    250 			     EXYNOS5_AUDIOCORE_PBASE,
    251 			     EXYNOS5_AUDIOCORE_SIZE),
    252 		DEVMAP_ENTRY(EXYNOS5_SYSRAM_VBASE,
    253 			     EXYNOS5_SYSRAM_PBASE,
    254 			     EXYNOS5_SYSRAM_SIZE),
    255 		DEVMAP_ENTRY_END
    256 	};
    257 
    258 	return devmap;
    259 }
    260 
    261 static void
    262 exynos5_platform_bootstrap(void)
    263 {
    264 
    265 	exynos_bootstrap(5);
    266 
    267 	exynos_platform_bootstrap();
    268 }
    269 
    270 static const struct arm_platform exynos5_platform = {
    271 	.ap_devmap = exynos5_platform_devmap,
    272 	.ap_bootstrap = exynos5_platform_bootstrap,
    273 	.ap_mpstart = exynos_platform_mpstart,
    274 	.ap_init_attach_args = exynos_platform_init_attach_args,
    275 	.ap_early_putchar = exynos_platform_early_putchar,
    276 	.ap_device_register = exynos_platform_device_register,
    277 	.ap_reset = exynos5_platform_reset,
    278 	.ap_delay = mct_delay,
    279 	.ap_uart_freq = exynos_platform_uart_freq,
    280 };
    281 
    282 ARM_PLATFORM(exynos5, "samsung,exynos5", &exynos5_platform);
    283 #endif
    284