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exynos_platform.c revision 1.21 
      1 /* $NetBSD: exynos_platform.c,v 1.21 2019/01/03 23:04:09 jmcneill Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include "opt_arm_debug.h"
     30 #include "opt_console.h"
     31 #include "opt_exynos.h"
     32 #include "opt_multiprocessor.h"
     33 #include "opt_console.h"
     34 
     35 #include "ukbd.h"
     36 
     37 #include <sys/cdefs.h>
     38 __KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.21 2019/01/03 23:04:09 jmcneill Exp $");
     39 
     40 #include <sys/param.h>
     41 #include <sys/bus.h>
     42 #include <sys/cpu.h>
     43 #include <sys/device.h>
     44 #include <sys/termios.h>
     45 
     46 #include <dev/fdt/fdtvar.h>
     47 
     48 #include <uvm/uvm_extern.h>
     49 
     50 #include <machine/bootconfig.h>
     51 #include <arm/cpufunc.h>
     52 
     53 #include <arm/samsung/exynos_reg.h>
     54 #include <arm/samsung/exynos_var.h>
     55 #include <arm/samsung/mct_var.h>
     56 #include <arm/samsung/sscom_reg.h>
     57 
     58 #include <evbarm/exynos/platform.h>
     59 #include <evbarm/fdt/machdep.h>
     60 
     61 #include <arm/fdt/arm_fdtvar.h>
     62 
     63 void exynos_platform_early_putchar(char);
     64 
     65 #define	EXYNOS5800_PMU_BASE		0x10040000
     66 #define	EXYNOS5800_PMU_SIZE		0x20000
     67 #define	 EXYNOS5800_PMU_SWRESET			0x0400
     68 #define	  EXYNOS5800_PMU_KFC_ETM_RESET(n)	__BIT(20 + (n))
     69 #define	  EXYNOS5800_PMU_KFC_CORE_RESET(n)	__BIT(8 + (n))
     70 #define	 EXYNOS5800_PMU_SPARE2			0x0908
     71 #define	 EXYNOS5800_PMU_SPARE3			0x090c
     72 #define	  EXYNOS5800_PMU_SWRESET_KFC_SEL	0x3
     73 #define	 EXYNOS5800_PMU_CORE_CONFIG(n)		(0x2000 + 0x80 * (n))
     74 #define	 EXYNOS5800_PMU_CORE_STATUS(n)		(0x2004 + 0x80 * (n))
     75 #define	  EXYNOS5800_PMU_CORE_POWER_EN		0x3
     76 #define	 EXYNOS5800_PMU_COMMON_CONFIG(n)	(0x2500 + 0x80 * (n))
     77 #define	  EXYNOS5800_PMU_COMMON_POWER_EN	0x3
     78 #define	 EXYNOS5800_PMU_COMMON_OPTION(n)	(0x2508 + 0x80 * (n))
     79 #define	  EXYNOS5800_PMU_USE_L2_COMMON_UP_STATE		__BIT(30)
     80 #define	  EXYNOS5800_PMU_USE_ARM_CORE_DOWN_STATE	__BIT(29)
     81 #define	  EXYNOS5800_PMU_AUTO_CORE_DOWN			__BIT(9)
     82 
     83 #define	EXYNOS5800_SYSRAM_BASE		0x02073000
     84 #define	EXYNOS5800_SYSRAM_SIZE		0x1000
     85 #define	 EXYNOS5800_SYSRAM_HOTPLUG		0x001c
     86 
     87 static void
     88 exynos5800_mpstart(void)
     89 {
     90 #if defined(MULTIPROCESSOR)
     91 	bus_space_tag_t bst = &armv7_generic_bs_tag;
     92 	bus_space_handle_t pmu_bsh, sysram_bsh;
     93 	uint64_t mpidr, bp_mpidr;
     94 	uint32_t val, started = 0;
     95 	u_int cpuindex, n;
     96 	int child;
     97 
     98 	bus_space_map(bst, EXYNOS5800_PMU_BASE, EXYNOS5800_PMU_SIZE, 0, &pmu_bsh);
     99 	bus_space_map(bst, EXYNOS5800_SYSRAM_BASE, EXYNOS5800_SYSRAM_SIZE, 0, &sysram_bsh);
    100 
    101 	const int cpus = OF_finddevice("/cpus");
    102 	if (cpus == -1) {
    103 		aprint_error("%s: no /cpus node found\n", __func__);
    104 		return;
    105 	}
    106 
    107 	/* MPIDR affinity levels of boot processor. */
    108 	bp_mpidr = cpu_mpidr_aff_read();
    109 
    110 	/* Setup KFC reset */
    111 	bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_SPARE3, EXYNOS5800_PMU_SWRESET_KFC_SEL);
    112 
    113 	const uint32_t option = EXYNOS5800_PMU_USE_L2_COMMON_UP_STATE |
    114 	    EXYNOS5800_PMU_USE_ARM_CORE_DOWN_STATE |
    115 	    EXYNOS5800_PMU_AUTO_CORE_DOWN;
    116 	val = bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_COMMON_OPTION(0));
    117 	bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_COMMON_OPTION(0), val | option);
    118 	val = bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_COMMON_OPTION(1));
    119 	bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_COMMON_OPTION(1), val | option);
    120 
    121 	bus_space_write_4(bst, sysram_bsh, EXYNOS5800_SYSRAM_HOTPLUG, KERN_VTOPHYS((vaddr_t)cpu_mpstart));
    122 	arm_dsb();
    123 
    124 	/* Power on clusters */
    125 	bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_COMMON_CONFIG(0),
    126 	    EXYNOS5800_PMU_COMMON_POWER_EN);
    127 	bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_COMMON_CONFIG(1),
    128 	    EXYNOS5800_PMU_COMMON_POWER_EN);
    129 
    130 	/* Boot APs */
    131 	cpuindex = 1;
    132 	for (child = OF_child(cpus); child; child = OF_peer(child)) {
    133 		if (fdtbus_get_reg64(child, 0, &mpidr, NULL) != 0)
    134 			continue;
    135 
    136 		if (mpidr == bp_mpidr)
    137 			continue;	/* BP already started */
    138 
    139 		const u_int cluster = __SHIFTOUT(mpidr, MPIDR_AFF1);
    140 		const u_int aff0 = __SHIFTOUT(mpidr, MPIDR_AFF0);
    141 		const u_int cpu = cluster * 4 + aff0;
    142 
    143 		val = bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_CORE_STATUS(cpu));
    144 		bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_CORE_CONFIG(cpu),
    145 		    EXYNOS5800_PMU_CORE_POWER_EN);
    146 
    147 		for (n = 0x100000; n > 0; n--) {
    148 			val = bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_CORE_STATUS(cpu));
    149 			if ((val & EXYNOS5800_PMU_CORE_POWER_EN) == EXYNOS5800_PMU_CORE_POWER_EN) {
    150 				started |= __BIT(cpuindex);
    151 				break;
    152 			}
    153 		}
    154 		if (n == 0)
    155 			aprint_error("cpu%d: WARNING: AP failed to power on\n", cpuindex);
    156 
    157 		if (cluster == 1 && __SHIFTOUT(bp_mpidr, MPIDR_AFF1) == 1) {
    158 			while (bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_SPARE2) == 0)
    159 				;
    160 			bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_SWRESET,
    161 			    EXYNOS5800_PMU_KFC_CORE_RESET(aff0) |
    162 			    EXYNOS5800_PMU_KFC_ETM_RESET(aff0));
    163 		}
    164 
    165 		/* Wait for AP to start */
    166 		for (n = 0x100000; n > 0; n--) {
    167 			membar_consumer();
    168 			if (arm_cpu_hatched & __BIT(cpuindex))
    169 				break;
    170 		}
    171 		if (n == 0)
    172 			aprint_error("cpu%d: WARNING: AP failed to start\n", cpuindex);
    173 
    174 		cpuindex++;
    175 	}
    176 
    177 	bus_space_unmap(bst, sysram_bsh, EXYNOS5800_SYSRAM_SIZE);
    178 	bus_space_unmap(bst, pmu_bsh, EXYNOS5800_PMU_SIZE);
    179 #endif
    180 }
    181 
    182 static struct of_compat_data mp_compat_data[] = {
    183 	{ "samsung,exynos5800",		(uintptr_t)exynos5800_mpstart },
    184 	{ NULL }
    185 };
    186 
    187 static void
    188 exynos_platform_mpstart(void)
    189 {
    190 
    191 	void (*mp_start)(void) = NULL;
    192 
    193 	const struct of_compat_data *cd = of_search_compatible(OF_finddevice("/"), mp_compat_data);
    194 	if (cd)
    195 		mp_start = (void (*)(void))cd->data;
    196 
    197 	if (mp_start)
    198 		mp_start();
    199 }
    200 
    201 static void
    202 exynos_platform_init_attach_args(struct fdt_attach_args *faa)
    203 {
    204 	extern struct bus_space armv7_generic_bs_tag;
    205 	extern struct bus_space armv7_generic_a4x_bs_tag;
    206 	extern struct arm32_bus_dma_tag arm_generic_dma_tag;
    207 
    208 	faa->faa_bst = &armv7_generic_bs_tag;
    209 	faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag;
    210 	faa->faa_dmat = &arm_generic_dma_tag;
    211 }
    212 
    213 void
    214 exynos_platform_early_putchar(char c)
    215 {
    216 #ifdef CONSADDR
    217 #define CONSADDR_VA	(CONSADDR - EXYNOS_CORE_PBASE + EXYNOS_CORE_VBASE)
    218 
    219 	volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ?
    220 	    (volatile uint32_t *)CONSADDR_VA :
    221 	    (volatile uint32_t *)CONSADDR;
    222 
    223 	while ((uartaddr[SSCOM_UFSTAT / 4] & UFSTAT_TXFULL) != 0)
    224 		;
    225 
    226 	uartaddr[SSCOM_UTXH / 4] = c;
    227 #endif
    228 }
    229 
    230 static void
    231 exynos_platform_device_register(device_t self, void *aux)
    232 {
    233 	exynos_device_register(self, aux);
    234 }
    235 
    236 static void
    237 exynos5_platform_reset(void)
    238 {
    239 	bus_space_tag_t bst = &armv7_generic_bs_tag;
    240 	bus_space_handle_t bsh;
    241 
    242 	bus_space_map(bst, EXYNOS5800_PMU_BASE + EXYNOS5800_PMU_SWRESET, 4, 0, &bsh);
    243 	bus_space_write_4(bst, bsh, 0, 1);
    244 }
    245 
    246 static u_int
    247 exynos_platform_uart_freq(void)
    248 {
    249 	return EXYNOS_UART_FREQ;
    250 }
    251 
    252 
    253 #if defined(SOC_EXYNOS4)
    254 static const struct pmap_devmap *
    255 exynos4_platform_devmap(void)
    256 {
    257 	static const struct pmap_devmap devmap[] = {
    258 		DEVMAP_ENTRY(EXYNOS_CORE_VBASE,
    259 			     EXYNOS_CORE_PBASE,
    260 			     EXYNOS4_CORE_SIZE),
    261 		DEVMAP_ENTRY(EXYNOS4_AUDIOCORE_VBASE,
    262 			     EXYNOS4_AUDIOCORE_PBASE,
    263 			     EXYNOS4_AUDIOCORE_SIZE),
    264 		DEVMAP_ENTRY_END
    265 	};
    266 
    267 	return devmap;
    268 }
    269 
    270 static void
    271 exynos4_platform_bootstrap(void)
    272 {
    273 
    274 	exynos_bootstrap(4);
    275 
    276 #if defined(MULTIPROCESSOR)
    277 	arm_cpu_max = 1 + __SHIFTOUT(armreg_l2ctrl_read(), L2CTRL_NUMCPU);
    278 #endif
    279 }
    280 
    281 static const struct arm_platform exynos4_platform = {
    282 	.ap_devmap = exynos4_platform_devmap,
    283 //	.ap_mpstart = exynos4_mpstart,
    284 	.ap_bootstrap = exynos4_platform_bootstrap,
    285 	.ap_init_attach_args = exynos_platform_init_attach_args,
    286 	.ap_device_register = exynos_platform_device_register,
    287 	.ap_reset = exynos5_platform_reset,
    288 	.ap_delay = mct_delay,
    289 	.ap_uart_freq = exynos_platform_uart_freq,
    290 };
    291 
    292 ARM_PLATFORM(exynos4, "samsung,exynos4", &exynos4_platform);
    293 #endif
    294 
    295 
    296 #if defined(SOC_EXYNOS5)
    297 static const struct pmap_devmap *
    298 exynos5_platform_devmap(void)
    299 {
    300 	static const struct pmap_devmap devmap[] = {
    301 		DEVMAP_ENTRY(EXYNOS_CORE_VBASE,
    302 			     EXYNOS_CORE_PBASE,
    303 			     EXYNOS5_CORE_SIZE),
    304 		DEVMAP_ENTRY(EXYNOS5_AUDIOCORE_VBASE,
    305 			     EXYNOS5_AUDIOCORE_PBASE,
    306 			     EXYNOS5_AUDIOCORE_SIZE),
    307 		DEVMAP_ENTRY(EXYNOS5_SYSRAM_VBASE,
    308 			     EXYNOS5_SYSRAM_PBASE,
    309 			     EXYNOS5_SYSRAM_SIZE),
    310 		DEVMAP_ENTRY_END
    311 	};
    312 
    313 	return devmap;
    314 }
    315 
    316 static void
    317 exynos5_platform_bootstrap(void)
    318 {
    319 
    320 	exynos_bootstrap(5);
    321 
    322 	arm_fdt_cpu_bootstrap();
    323 }
    324 
    325 static const struct arm_platform exynos5_platform = {
    326 	.ap_devmap = exynos5_platform_devmap,
    327 	.ap_bootstrap = exynos5_platform_bootstrap,
    328 	.ap_mpstart = exynos_platform_mpstart,
    329 	.ap_init_attach_args = exynos_platform_init_attach_args,
    330 	.ap_device_register = exynos_platform_device_register,
    331 	.ap_reset = exynos5_platform_reset,
    332 	.ap_delay = mct_delay,
    333 	.ap_uart_freq = exynos_platform_uart_freq,
    334 };
    335 
    336 ARM_PLATFORM(exynos5, "samsung,exynos5", &exynos5_platform);
    337 #endif
    338