exynos_platform.c revision 1.8.2.3
1 /* $NetBSD: exynos_platform.c,v 1.8.2.3 2018/09/06 06:55:27 pgoyette Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "opt_arm_debug.h" 30 #include "opt_exynos.h" 31 #include "opt_multiprocessor.h" 32 #include "opt_fdt_arm.h" 33 34 #include "ukbd.h" 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.8.2.3 2018/09/06 06:55:27 pgoyette Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/bus.h> 41 #include <sys/cpu.h> 42 #include <sys/device.h> 43 #include <sys/termios.h> 44 45 #include <dev/fdt/fdtvar.h> 46 47 #include <uvm/uvm_extern.h> 48 49 #include <machine/bootconfig.h> 50 #include <arm/cpufunc.h> 51 52 #include <arm/samsung/exynos_reg.h> 53 #include <arm/samsung/exynos_var.h> 54 #include <arm/samsung/mct_var.h> 55 #include <arm/samsung/sscom_reg.h> 56 57 #include <evbarm/exynos/platform.h> 58 59 #include <arm/fdt/arm_fdtvar.h> 60 61 void exynos_platform_early_putchar(char); 62 63 #define EXYNOS5_SWRESET_REG 0x10040400 64 65 #define EXYNOS_IOPHYSTOVIRT(a) \ 66 ((vaddr_t)(((a) - EXYNOS_CORE_PBASE) + EXYNOS_CORE_VBASE)) 67 68 static void 69 exynos_platform_bootstrap(void) 70 { 71 72 exynos_bootstrap(EXYNOS_CORE_VBASE); 73 } 74 75 static void 76 exynos_platform_init_attach_args(struct fdt_attach_args *faa) 77 { 78 extern struct bus_space armv7_generic_bs_tag; 79 extern struct bus_space armv7_generic_a4x_bs_tag; 80 extern struct arm32_bus_dma_tag arm_generic_dma_tag; 81 82 faa->faa_bst = &armv7_generic_bs_tag; 83 faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag; 84 faa->faa_dmat = &arm_generic_dma_tag; 85 } 86 87 88 void 89 exynos_platform_early_putchar(char c) 90 { 91 #ifdef CONSADDR 92 #define CONSADDR_VA (CONSADDR - EXYNOS_CORE_PBASE + EXYNOS_CORE_VBASE) 93 94 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? 95 (volatile uint32_t *)CONSADDR_VA : 96 (volatile uint32_t *)CONSADDR; 97 98 while ((uartaddr[SSCOM_UFSTAT / 4] & UFSTAT_TXFULL) != 0) 99 ; 100 101 uartaddr[SSCOM_UTXH / 4] = c; 102 #endif 103 } 104 105 static void 106 exynos_platform_device_register(device_t self, void *aux) 107 { 108 exynos_device_register(self, aux); 109 } 110 111 static void 112 exynos5_platform_reset(void) 113 { 114 bus_space_tag_t bst = &armv7_generic_bs_tag; 115 bus_space_handle_t bsh; 116 117 bus_space_map(bst, EXYNOS5_SWRESET_REG, 4, 0, &bsh); 118 bus_space_write_4(bst, bsh, 0, 1); 119 } 120 121 static u_int 122 exynos_platform_uart_freq(void) 123 { 124 return EXYNOS_UART_FREQ; 125 } 126 127 128 #if defined(SOC_EXYNOS4) 129 static const struct pmap_devmap * 130 exynos4_platform_devmap(void) 131 { 132 static const struct pmap_devmap devmap[] = { 133 DEVMAP_ENTRY(EXYNOS_CORE_VBASE, 134 EXYNOS_CORE_PBASE, 135 EXYNOS4_CORE_SIZE), 136 DEVMAP_ENTRY(EXYNOS4_AUDIOCORE_VBASE, 137 EXYNOS4_AUDIOCORE_PBASE, 138 EXYNOS4_AUDIOCORE_SIZE), 139 DEVMAP_ENTRY_END 140 }; 141 142 return devmap; 143 } 144 145 static const struct arm_platform exynos4_platform = { 146 .ap_devmap = exynos4_platform_devmap, 147 .ap_bootstrap = exynos_platform_bootstrap, 148 .ap_init_attach_args = exynos_platform_init_attach_args, 149 .ap_early_putchar = exynos_platform_early_putchar, 150 .ap_device_register = exynos_platform_device_register, 151 .ap_reset = exynos5_platform_reset, 152 .ap_delay = mct_delay, 153 .ap_uart_freq = exynos_platform_uart_freq, 154 }; 155 156 ARM_PLATFORM(exynos4, "samsung,exynos4", &exynos4_platform); 157 #endif 158 159 160 #if defined(SOC_EXYNOS5) 161 static const struct pmap_devmap * 162 exynos5_platform_devmap(void) 163 { 164 static const struct pmap_devmap devmap[] = { 165 DEVMAP_ENTRY(EXYNOS_CORE_VBASE, 166 EXYNOS_CORE_PBASE, 167 EXYNOS5_CORE_SIZE), 168 DEVMAP_ENTRY(EXYNOS5_AUDIOCORE_VBASE, 169 EXYNOS5_AUDIOCORE_PBASE, 170 EXYNOS5_AUDIOCORE_SIZE), 171 DEVMAP_ENTRY_END 172 }; 173 174 return devmap; 175 } 176 177 static const struct arm_platform exynos5_platform = { 178 .ap_devmap = exynos5_platform_devmap, 179 .ap_bootstrap = exynos_platform_bootstrap, 180 .ap_init_attach_args = exynos_platform_init_attach_args, 181 .ap_early_putchar = exynos_platform_early_putchar, 182 .ap_device_register = exynos_platform_device_register, 183 .ap_reset = exynos5_platform_reset, 184 .ap_delay = mct_delay, 185 .ap_uart_freq = exynos_platform_uart_freq, 186 }; 187 188 ARM_PLATFORM(exynos5, "samsung,exynos5", &exynos5_platform); 189 #endif 190
Indexes created Mon Oct 20 20:10:13 GMT 2025