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exynos_uart.c revision 1.1
      1  1.1  jmcneill /* $NetBSD: exynos_uart.c,v 1.1 2018/07/05 13:11:58 jmcneill Exp $ */
      2  1.1  jmcneill 
      3  1.1  jmcneill /*-
      4  1.1  jmcneill  * Copyright (c) 2013-2018 The NetBSD Foundation, Inc.
      5  1.1  jmcneill  * All rights reserved.
      6  1.1  jmcneill  *
      7  1.1  jmcneill  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  jmcneill  * by Matt Thomas of 3am Software Foundry and Jared McNeill.
      9  1.1  jmcneill  *
     10  1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
     11  1.1  jmcneill  * modification, are permitted provided that the following conditions
     12  1.1  jmcneill  * are met:
     13  1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     14  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     15  1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     18  1.1  jmcneill  *
     19  1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.1  jmcneill  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1  jmcneill  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1  jmcneill  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.1  jmcneill  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1  jmcneill  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1  jmcneill  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1  jmcneill  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1  jmcneill  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1  jmcneill  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1  jmcneill  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1  jmcneill  */
     31  1.1  jmcneill 
     32  1.1  jmcneill #include "locators.h"
     33  1.1  jmcneill 
     34  1.1  jmcneill #include <sys/cdefs.h>
     35  1.1  jmcneill 
     36  1.1  jmcneill __KERNEL_RCSID(1, "$NetBSD: exynos_uart.c,v 1.1 2018/07/05 13:11:58 jmcneill Exp $");
     37  1.1  jmcneill 
     38  1.1  jmcneill #define cn_trap()			\
     39  1.1  jmcneill 	do {				\
     40  1.1  jmcneill 		console_debugger();	\
     41  1.1  jmcneill 		cn_trapped = 1;		\
     42  1.1  jmcneill 	} while (/* CONSTCOND */ 0)
     43  1.1  jmcneill 
     44  1.1  jmcneill #include <sys/param.h>
     45  1.1  jmcneill #include <sys/bus.h>
     46  1.1  jmcneill #include <sys/device.h>
     47  1.1  jmcneill #include <sys/conf.h>
     48  1.1  jmcneill #include <sys/intr.h>
     49  1.1  jmcneill #include <sys/systm.h>
     50  1.1  jmcneill #include <sys/time.h>
     51  1.1  jmcneill #include <sys/termios.h>
     52  1.1  jmcneill #include <sys/kauth.h>
     53  1.1  jmcneill #include <sys/lwp.h>
     54  1.1  jmcneill #include <sys/tty.h>
     55  1.1  jmcneill 
     56  1.1  jmcneill #include <dev/cons.h>
     57  1.1  jmcneill 
     58  1.1  jmcneill #include <dev/fdt/fdtvar.h>
     59  1.1  jmcneill 
     60  1.1  jmcneill #include <arm/samsung/sscom_reg.h>
     61  1.1  jmcneill 
     62  1.1  jmcneill static int	exynos_uart_match(device_t, cfdata_t, void *);
     63  1.1  jmcneill static void	exynos_uart_attach(device_t, device_t, void *);
     64  1.1  jmcneill 
     65  1.1  jmcneill static int	exynos_uart_intr(void *);
     66  1.1  jmcneill 
     67  1.1  jmcneill static int	exynos_uart_cngetc(dev_t);
     68  1.1  jmcneill static void	exynos_uart_cnputc(dev_t, int);
     69  1.1  jmcneill static void	exynos_uart_cnpollc(dev_t, int);
     70  1.1  jmcneill 
     71  1.1  jmcneill static void	exynos_uart_start(struct tty *);
     72  1.1  jmcneill static int	exynos_uart_param(struct tty *, struct termios *);
     73  1.1  jmcneill 
     74  1.1  jmcneill extern struct cfdriver exuart_cd;
     75  1.1  jmcneill 
     76  1.1  jmcneill struct exynos_uart_softc {
     77  1.1  jmcneill 	device_t sc_dev;
     78  1.1  jmcneill 	bus_space_tag_t	sc_bst;
     79  1.1  jmcneill 	bus_space_handle_t sc_bsh;
     80  1.1  jmcneill 	u_int sc_freq;
     81  1.1  jmcneill 	void *sc_ih;
     82  1.1  jmcneill 
     83  1.1  jmcneill 	bool sc_console;
     84  1.1  jmcneill 	struct tty *sc_tty;
     85  1.1  jmcneill 
     86  1.1  jmcneill 	int sc_ospeed;
     87  1.1  jmcneill 	tcflag_t sc_cflag;
     88  1.1  jmcneill 
     89  1.1  jmcneill 	u_char sc_buf[1024];
     90  1.1  jmcneill };
     91  1.1  jmcneill 
     92  1.1  jmcneill #define	RD4(sc, reg)			\
     93  1.1  jmcneill 	bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
     94  1.1  jmcneill #define	WR4(sc, reg, val)		\
     95  1.1  jmcneill 	bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
     96  1.1  jmcneill 
     97  1.1  jmcneill static bus_addr_t exynos_uart_consaddr;
     98  1.1  jmcneill 
     99  1.1  jmcneill static struct exynos_uart_softc exynos_uart_cnsc;
    100  1.1  jmcneill 
    101  1.1  jmcneill static struct cnm_state exynos_uart_cnm_state;
    102  1.1  jmcneill 
    103  1.1  jmcneill struct consdev exynos_uart_consdev = {
    104  1.1  jmcneill 	.cn_getc = exynos_uart_cngetc,
    105  1.1  jmcneill 	.cn_putc = exynos_uart_cnputc,
    106  1.1  jmcneill 	.cn_pollc = exynos_uart_cnpollc,
    107  1.1  jmcneill 	.cn_dev = NODEV,
    108  1.1  jmcneill 	.cn_pri = CN_NORMAL,
    109  1.1  jmcneill };
    110  1.1  jmcneill 
    111  1.1  jmcneill static dev_type_open(exynos_uart_open);
    112  1.1  jmcneill static dev_type_open(exynos_uart_close);
    113  1.1  jmcneill static dev_type_read(exynos_uart_read);
    114  1.1  jmcneill static dev_type_write(exynos_uart_write);
    115  1.1  jmcneill static dev_type_ioctl(exynos_uart_ioctl);
    116  1.1  jmcneill static dev_type_tty(exynos_uart_tty);
    117  1.1  jmcneill static dev_type_poll(exynos_uart_poll);
    118  1.1  jmcneill static dev_type_stop(exynos_uart_stop);
    119  1.1  jmcneill 
    120  1.1  jmcneill const struct cdevsw exuart_cdevsw = {
    121  1.1  jmcneill 	.d_open = exynos_uart_open,
    122  1.1  jmcneill 	.d_close = exynos_uart_close,
    123  1.1  jmcneill 	.d_read = exynos_uart_read,
    124  1.1  jmcneill 	.d_write = exynos_uart_write,
    125  1.1  jmcneill 	.d_ioctl = exynos_uart_ioctl,
    126  1.1  jmcneill 	.d_stop = exynos_uart_stop,
    127  1.1  jmcneill 	.d_tty = exynos_uart_tty,
    128  1.1  jmcneill 	.d_poll = exynos_uart_poll,
    129  1.1  jmcneill 	.d_mmap = nommap,
    130  1.1  jmcneill 	.d_kqfilter = ttykqfilter,
    131  1.1  jmcneill 	.d_discard = nodiscard,
    132  1.1  jmcneill 	.d_flag = D_TTY
    133  1.1  jmcneill };
    134  1.1  jmcneill 
    135  1.1  jmcneill static int exynos_uart_cmajor = -1;
    136  1.1  jmcneill 
    137  1.1  jmcneill static const char * const compatible[] = {
    138  1.1  jmcneill 	"samsung,exynos4210-uart",
    139  1.1  jmcneill 	NULL
    140  1.1  jmcneill };
    141  1.1  jmcneill 
    142  1.1  jmcneill CFATTACH_DECL_NEW(exynos_uart, sizeof(struct exynos_uart_softc),
    143  1.1  jmcneill 	exynos_uart_match, exynos_uart_attach, NULL, NULL);
    144  1.1  jmcneill 
    145  1.1  jmcneill static int
    146  1.1  jmcneill exynos_uart_match(device_t parent, cfdata_t cf, void *aux)
    147  1.1  jmcneill {
    148  1.1  jmcneill 	struct fdt_attach_args * const faa = aux;
    149  1.1  jmcneill 
    150  1.1  jmcneill 	return of_match_compatible(faa->faa_phandle, compatible);
    151  1.1  jmcneill }
    152  1.1  jmcneill 
    153  1.1  jmcneill static void
    154  1.1  jmcneill exynos_uart_attach(device_t parent, device_t self, void *aux)
    155  1.1  jmcneill {
    156  1.1  jmcneill 	struct exynos_uart_softc * const sc = device_private(self);
    157  1.1  jmcneill 	struct fdt_attach_args * const faa = aux;
    158  1.1  jmcneill 	const int phandle = faa->faa_phandle;
    159  1.1  jmcneill 	char intrstr[128];
    160  1.1  jmcneill 	struct clk *clk_uart, *clk_uart_baud0;
    161  1.1  jmcneill 	struct tty *tp;
    162  1.1  jmcneill 	int major, minor;
    163  1.1  jmcneill 	bus_addr_t addr;
    164  1.1  jmcneill 	bus_size_t size;
    165  1.1  jmcneill 
    166  1.1  jmcneill 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
    167  1.1  jmcneill 		aprint_error(": couldn't get registers\n");
    168  1.1  jmcneill 		return;
    169  1.1  jmcneill 	}
    170  1.1  jmcneill 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
    171  1.1  jmcneill 		aprint_error(": failed to decode interrupt\n");
    172  1.1  jmcneill 		return;
    173  1.1  jmcneill 	}
    174  1.1  jmcneill 	clk_uart = fdtbus_clock_get(phandle, "uart");
    175  1.1  jmcneill 	if (clk_uart == NULL || clk_enable(clk_uart) != 0) {
    176  1.1  jmcneill 		aprint_error(": failed to enable uart clock\n");
    177  1.1  jmcneill 		return;
    178  1.1  jmcneill 	}
    179  1.1  jmcneill 	clk_uart_baud0 = fdtbus_clock_get(phandle, "clk_uart_baud0");
    180  1.1  jmcneill 	if (clk_uart_baud0 == NULL || clk_enable(clk_uart_baud0) != 0) {
    181  1.1  jmcneill 		aprint_error(": failed to enable clk_uart_baud0 clock\n");
    182  1.1  jmcneill 		return;
    183  1.1  jmcneill 	}
    184  1.1  jmcneill 
    185  1.1  jmcneill 	const bool is_console = exynos_uart_consaddr == addr;
    186  1.1  jmcneill 
    187  1.1  jmcneill 	sc->sc_dev = self;
    188  1.1  jmcneill 	sc->sc_bst = faa->faa_bst;
    189  1.1  jmcneill 	sc->sc_console = is_console;
    190  1.1  jmcneill 	if (is_console) {
    191  1.1  jmcneill 		sc->sc_bsh = exynos_uart_cnsc.sc_bsh;
    192  1.1  jmcneill 	} else {
    193  1.1  jmcneill 		if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
    194  1.1  jmcneill 			aprint_error(": failed to map registers\n");
    195  1.1  jmcneill 			return;
    196  1.1  jmcneill 		}
    197  1.1  jmcneill 	}
    198  1.1  jmcneill 	sc->sc_freq = clk_get_rate(clk_uart_baud0);
    199  1.1  jmcneill 
    200  1.1  jmcneill 	sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_SERIAL,
    201  1.1  jmcneill 	    0, exynos_uart_intr, sc);
    202  1.1  jmcneill 	if (sc->sc_ih == NULL) {
    203  1.1  jmcneill 		aprint_error(": failed to establish interrupt on %s\n",
    204  1.1  jmcneill 		    intrstr);
    205  1.1  jmcneill 		return;
    206  1.1  jmcneill 	}
    207  1.1  jmcneill 
    208  1.1  jmcneill 	if (exynos_uart_cmajor == -1) {
    209  1.1  jmcneill 		/* allocate a major number */
    210  1.1  jmcneill 		int bmajor = -1, cmajor = -1;
    211  1.1  jmcneill 		int error = devsw_attach("exuart", NULL, &bmajor,
    212  1.1  jmcneill 		    &exuart_cdevsw, &cmajor);
    213  1.1  jmcneill 		if (error) {
    214  1.1  jmcneill 			aprint_error(": couldn't allocate major number\n");
    215  1.1  jmcneill 			return;
    216  1.1  jmcneill 		}
    217  1.1  jmcneill 		exynos_uart_cmajor = cmajor;
    218  1.1  jmcneill 	}
    219  1.1  jmcneill 
    220  1.1  jmcneill 	major = cdevsw_lookup_major(&exuart_cdevsw);
    221  1.1  jmcneill 	minor = device_unit(self);
    222  1.1  jmcneill 
    223  1.1  jmcneill 	tp = sc->sc_tty = tty_alloc();
    224  1.1  jmcneill 	tp->t_oproc = exynos_uart_start;
    225  1.1  jmcneill 	tp->t_param = exynos_uart_param;
    226  1.1  jmcneill 	tp->t_dev = makedev(major, minor);
    227  1.1  jmcneill 	tp->t_sc = sc;
    228  1.1  jmcneill 	tty_attach(tp);
    229  1.1  jmcneill 
    230  1.1  jmcneill 	aprint_naive("\n");
    231  1.1  jmcneill 	if (is_console) {
    232  1.1  jmcneill 		cn_tab->cn_dev = tp->t_dev;
    233  1.1  jmcneill 		aprint_normal(": console");
    234  1.1  jmcneill 	}
    235  1.1  jmcneill 	aprint_normal("\n");
    236  1.1  jmcneill 
    237  1.1  jmcneill 	if (is_console)
    238  1.1  jmcneill 		delay(10000);
    239  1.1  jmcneill 
    240  1.1  jmcneill 	/* Initialize device */
    241  1.1  jmcneill 	WR4(sc, SSCOM_UFCON,
    242  1.1  jmcneill 	    __SHIFTIN(2, UFCON_TXTRIGGER) |
    243  1.1  jmcneill 	    __SHIFTIN(1, UFCON_RXTRIGGER) |
    244  1.1  jmcneill 	    UFCON_TXFIFO_RESET | UFCON_RXFIFO_RESET |
    245  1.1  jmcneill 	    UFCON_FIFO_ENABLE);
    246  1.1  jmcneill 	/* Configure PIO mode with RX timeout interrupts */
    247  1.1  jmcneill 	WR4(sc, SSCOM_UCON,
    248  1.1  jmcneill 	    __SHIFTIN(3, UCON_RXTO) |
    249  1.1  jmcneill 	    UCON_TOINT | UCON_ERRINT |
    250  1.1  jmcneill 	    UCON_TXMODE_INT | UCON_RXMODE_INT);
    251  1.1  jmcneill 
    252  1.1  jmcneill 	/* Disable interrupts */
    253  1.1  jmcneill 	WR4(sc, SSCOM_UINTM, ~0u);
    254  1.1  jmcneill 
    255  1.1  jmcneill 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
    256  1.1  jmcneill }
    257  1.1  jmcneill 
    258  1.1  jmcneill static int
    259  1.1  jmcneill exynos_uart_cngetc(dev_t dev)
    260  1.1  jmcneill {
    261  1.1  jmcneill 	struct exynos_uart_softc * const sc = &exynos_uart_cnsc;
    262  1.1  jmcneill 	uint32_t status;
    263  1.1  jmcneill 	int s, c;
    264  1.1  jmcneill 
    265  1.1  jmcneill 	s = splserial();
    266  1.1  jmcneill 
    267  1.1  jmcneill 	status = RD4(sc, SSCOM_UTRSTAT);
    268  1.1  jmcneill 	if ((status & UTRSTAT_RXREADY) == 0) {
    269  1.1  jmcneill 		splx(s);
    270  1.1  jmcneill 		return -1;
    271  1.1  jmcneill 	}
    272  1.1  jmcneill 
    273  1.1  jmcneill 	c = bus_space_read_1(sc->sc_bst, sc->sc_bsh, SSCOM_URXH);
    274  1.1  jmcneill #if defined(DDB)
    275  1.1  jmcneill 	extern int db_active;
    276  1.1  jmcneill 	if (!db_active)
    277  1.1  jmcneill #endif
    278  1.1  jmcneill 	{
    279  1.1  jmcneill 		int cn_trapped __unused = 0;
    280  1.1  jmcneill 		cn_check_magic(dev, c, exynos_uart_cnm_state);
    281  1.1  jmcneill 	}
    282  1.1  jmcneill 
    283  1.1  jmcneill 	splx(s);
    284  1.1  jmcneill 
    285  1.1  jmcneill 	return c & 0xff;
    286  1.1  jmcneill }
    287  1.1  jmcneill 
    288  1.1  jmcneill static void
    289  1.1  jmcneill exynos_uart_cnputc(dev_t dev, int c)
    290  1.1  jmcneill {
    291  1.1  jmcneill 	struct exynos_uart_softc * const sc = &exynos_uart_cnsc;
    292  1.1  jmcneill 	int s;
    293  1.1  jmcneill 
    294  1.1  jmcneill 	s = splserial();
    295  1.1  jmcneill 	while ((RD4(sc, SSCOM_UFSTAT) & UFSTAT_TXFULL) != 0)
    296  1.1  jmcneill 		;
    297  1.1  jmcneill 
    298  1.1  jmcneill 	bus_space_write_1(sc->sc_bst, sc->sc_bsh, SSCOM_UTXH, c);
    299  1.1  jmcneill 
    300  1.1  jmcneill 	splx(s);
    301  1.1  jmcneill }
    302  1.1  jmcneill 
    303  1.1  jmcneill 
    304  1.1  jmcneill static void
    305  1.1  jmcneill exynos_uart_cnpollc(dev_t dev, int on)
    306  1.1  jmcneill {
    307  1.1  jmcneill }
    308  1.1  jmcneill 
    309  1.1  jmcneill static void
    310  1.1  jmcneill exynos_uart_cnattach(bus_space_tag_t bst, bus_space_handle_t bsh,
    311  1.1  jmcneill     int ospeed, tcflag_t cflag)
    312  1.1  jmcneill {
    313  1.1  jmcneill 	struct exynos_uart_softc *sc = &exynos_uart_cnsc;
    314  1.1  jmcneill 
    315  1.1  jmcneill 	cn_tab = &exynos_uart_consdev;
    316  1.1  jmcneill 	cn_init_magic(&exynos_uart_cnm_state);
    317  1.1  jmcneill 	cn_set_magic("\047\001");
    318  1.1  jmcneill 
    319  1.1  jmcneill 	sc->sc_bst = bst;
    320  1.1  jmcneill 	sc->sc_bsh = bsh;
    321  1.1  jmcneill 	sc->sc_ospeed = ospeed;
    322  1.1  jmcneill 	sc->sc_cflag = cflag;
    323  1.1  jmcneill }
    324  1.1  jmcneill 
    325  1.1  jmcneill static int
    326  1.1  jmcneill exynos_uart_open(dev_t dev, int flag, int mode, lwp_t *l)
    327  1.1  jmcneill {
    328  1.1  jmcneill 	struct exynos_uart_softc *sc =
    329  1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    330  1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    331  1.1  jmcneill 
    332  1.1  jmcneill 	if (kauth_authorize_device_tty(l->l_cred,
    333  1.1  jmcneill 	    KAUTH_DEVICE_TTY_OPEN, tp) != 0) {
    334  1.1  jmcneill 		return EBUSY;
    335  1.1  jmcneill 	}
    336  1.1  jmcneill 
    337  1.1  jmcneill 	if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
    338  1.1  jmcneill 		tp->t_dev = dev;
    339  1.1  jmcneill 		ttychars(tp);
    340  1.1  jmcneill 		tp->t_iflag = TTYDEF_IFLAG;
    341  1.1  jmcneill 		tp->t_oflag = TTYDEF_OFLAG;
    342  1.1  jmcneill 		tp->t_lflag = TTYDEF_LFLAG;
    343  1.1  jmcneill 		if (sc->sc_console) {
    344  1.1  jmcneill 			tp->t_ispeed = tp->t_ospeed = exynos_uart_cnsc.sc_ospeed;
    345  1.1  jmcneill 			tp->t_cflag = exynos_uart_cnsc.sc_cflag;
    346  1.1  jmcneill 		} else {
    347  1.1  jmcneill 			tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
    348  1.1  jmcneill 			tp->t_cflag = TTYDEF_CFLAG;
    349  1.1  jmcneill 		}
    350  1.1  jmcneill 		ttsetwater(tp);
    351  1.1  jmcneill 	}
    352  1.1  jmcneill 	tp->t_state |= TS_CARR_ON;
    353  1.1  jmcneill 
    354  1.1  jmcneill 	/* Enable RX and error interrupts */
    355  1.1  jmcneill 	WR4(sc, SSCOM_UINTM, ~0u & ~(UINT_RXD|UINT_ERROR));
    356  1.1  jmcneill 
    357  1.1  jmcneill 	return tp->t_linesw->l_open(dev, tp);
    358  1.1  jmcneill }
    359  1.1  jmcneill 
    360  1.1  jmcneill static int
    361  1.1  jmcneill exynos_uart_close(dev_t dev, int flag, int mode, lwp_t *l)
    362  1.1  jmcneill {
    363  1.1  jmcneill 	struct exynos_uart_softc *sc =
    364  1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    365  1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    366  1.1  jmcneill 
    367  1.1  jmcneill 	tp->t_linesw->l_close(tp, flag);
    368  1.1  jmcneill 	ttyclose(tp);
    369  1.1  jmcneill 
    370  1.1  jmcneill 	/* Disable interrupts */
    371  1.1  jmcneill 	WR4(sc, SSCOM_UINTM, ~0u);
    372  1.1  jmcneill 
    373  1.1  jmcneill 	return 0;
    374  1.1  jmcneill }
    375  1.1  jmcneill 
    376  1.1  jmcneill static int
    377  1.1  jmcneill exynos_uart_read(dev_t dev, struct uio *uio, int flag)
    378  1.1  jmcneill {
    379  1.1  jmcneill 	struct exynos_uart_softc *sc =
    380  1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    381  1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    382  1.1  jmcneill 
    383  1.1  jmcneill 	return tp->t_linesw->l_read(tp, uio, flag);
    384  1.1  jmcneill }
    385  1.1  jmcneill 
    386  1.1  jmcneill static int
    387  1.1  jmcneill exynos_uart_write(dev_t dev, struct uio *uio, int flag)
    388  1.1  jmcneill {
    389  1.1  jmcneill 	struct exynos_uart_softc *sc =
    390  1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    391  1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    392  1.1  jmcneill 
    393  1.1  jmcneill 	return tp->t_linesw->l_write(tp, uio, flag);
    394  1.1  jmcneill }
    395  1.1  jmcneill 
    396  1.1  jmcneill static int
    397  1.1  jmcneill exynos_uart_poll(dev_t dev, int events, lwp_t *l)
    398  1.1  jmcneill {
    399  1.1  jmcneill 	struct exynos_uart_softc *sc =
    400  1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    401  1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    402  1.1  jmcneill 
    403  1.1  jmcneill 	return tp->t_linesw->l_poll(tp, events, l);
    404  1.1  jmcneill }
    405  1.1  jmcneill 
    406  1.1  jmcneill static int
    407  1.1  jmcneill exynos_uart_ioctl(dev_t dev, u_long cmd, void *data, int flag, lwp_t *l)
    408  1.1  jmcneill {
    409  1.1  jmcneill 	struct exynos_uart_softc *sc =
    410  1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    411  1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    412  1.1  jmcneill 	int error;
    413  1.1  jmcneill 
    414  1.1  jmcneill 	error = tp->t_linesw->l_ioctl(tp, cmd, data, flag, l);
    415  1.1  jmcneill 	if (error != EPASSTHROUGH)
    416  1.1  jmcneill 		return error;
    417  1.1  jmcneill 
    418  1.1  jmcneill 	return ttioctl(tp, cmd, data, flag, l);
    419  1.1  jmcneill }
    420  1.1  jmcneill 
    421  1.1  jmcneill static struct tty *
    422  1.1  jmcneill exynos_uart_tty(dev_t dev)
    423  1.1  jmcneill {
    424  1.1  jmcneill 	struct exynos_uart_softc *sc =
    425  1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    426  1.1  jmcneill 
    427  1.1  jmcneill 	return sc->sc_tty;
    428  1.1  jmcneill }
    429  1.1  jmcneill 
    430  1.1  jmcneill static void
    431  1.1  jmcneill exynos_uart_stop(struct tty *tp, int flag)
    432  1.1  jmcneill {
    433  1.1  jmcneill }
    434  1.1  jmcneill 
    435  1.1  jmcneill static void
    436  1.1  jmcneill exynos_uart_start(struct tty *tp)
    437  1.1  jmcneill {
    438  1.1  jmcneill 	struct exynos_uart_softc *sc = tp->t_sc;
    439  1.1  jmcneill 	u_char *p = sc->sc_buf;
    440  1.1  jmcneill 	int s, brem;
    441  1.1  jmcneill 
    442  1.1  jmcneill 	s = spltty();
    443  1.1  jmcneill 
    444  1.1  jmcneill 	if (tp->t_state & (TS_TTSTOP | TS_BUSY | TS_TIMEOUT)) {
    445  1.1  jmcneill 		splx(s);
    446  1.1  jmcneill 		return;
    447  1.1  jmcneill 	}
    448  1.1  jmcneill 	tp->t_state |= TS_BUSY;
    449  1.1  jmcneill 
    450  1.1  jmcneill 	splx(s);
    451  1.1  jmcneill 
    452  1.1  jmcneill 	for (brem = q_to_b(&tp->t_outq, sc->sc_buf, sizeof(sc->sc_buf));
    453  1.1  jmcneill 	     brem > 0;
    454  1.1  jmcneill 	     brem--, p++) {
    455  1.1  jmcneill 		while ((RD4(sc, SSCOM_UFSTAT) & UFSTAT_TXFULL) != 0)
    456  1.1  jmcneill 			;
    457  1.1  jmcneill 
    458  1.1  jmcneill 		bus_space_write_1(sc->sc_bst, sc->sc_bsh,
    459  1.1  jmcneill 		    SSCOM_UTXH, *p);
    460  1.1  jmcneill 	}
    461  1.1  jmcneill 
    462  1.1  jmcneill 	s = spltty();
    463  1.1  jmcneill 	tp->t_state &= ~TS_BUSY;
    464  1.1  jmcneill 	if (ttypull(tp)) {
    465  1.1  jmcneill 		tp->t_state |= TS_TIMEOUT;
    466  1.1  jmcneill 		callout_schedule(&tp->t_rstrt_ch, 1);
    467  1.1  jmcneill 	}
    468  1.1  jmcneill 	splx(s);
    469  1.1  jmcneill }
    470  1.1  jmcneill 
    471  1.1  jmcneill static int
    472  1.1  jmcneill exynos_uart_param(struct tty *tp, struct termios *t)
    473  1.1  jmcneill {
    474  1.1  jmcneill 	struct exynos_uart_softc *sc = tp->t_sc;
    475  1.1  jmcneill 
    476  1.1  jmcneill 	if (tp->t_ospeed == t->c_ospeed &&
    477  1.1  jmcneill 	    tp->t_cflag == t->c_cflag)
    478  1.1  jmcneill 		return 0;
    479  1.1  jmcneill 
    480  1.1  jmcneill 	uint32_t ulcon = 0, ubrdiv;
    481  1.1  jmcneill 	switch (ISSET(t->c_cflag, CSIZE)) {
    482  1.1  jmcneill 	case CS5:
    483  1.1  jmcneill 		ulcon |= ULCON_LENGTH_5;
    484  1.1  jmcneill 		break;
    485  1.1  jmcneill 	case CS6:
    486  1.1  jmcneill 		ulcon |= ULCON_LENGTH_6;
    487  1.1  jmcneill 		break;
    488  1.1  jmcneill 	case CS7:
    489  1.1  jmcneill 		ulcon |= ULCON_LENGTH_7;
    490  1.1  jmcneill 		break;
    491  1.1  jmcneill 	case CS8:
    492  1.1  jmcneill 		ulcon |= ULCON_LENGTH_8;
    493  1.1  jmcneill 		break;
    494  1.1  jmcneill 	}
    495  1.1  jmcneill 	switch (ISSET(t->c_cflag, PARENB|PARODD)) {
    496  1.1  jmcneill 	case PARENB|PARODD:
    497  1.1  jmcneill 		ulcon |= ULCON_PARITY_ODD;
    498  1.1  jmcneill 		break;
    499  1.1  jmcneill 	case PARENB:
    500  1.1  jmcneill 		ulcon |= ULCON_PARITY_EVEN;
    501  1.1  jmcneill 		break;
    502  1.1  jmcneill 	default:
    503  1.1  jmcneill 		ulcon |= ULCON_PARITY_NONE;
    504  1.1  jmcneill 		break;
    505  1.1  jmcneill 	}
    506  1.1  jmcneill 	if (ISSET(t->c_cflag, CSTOPB))
    507  1.1  jmcneill 		ulcon |= ULCON_STOP;
    508  1.1  jmcneill 	WR4(sc, SSCOM_ULCON, ulcon);
    509  1.1  jmcneill 
    510  1.1  jmcneill 	ubrdiv = (sc->sc_freq / 16) / t->c_ospeed - 1;
    511  1.1  jmcneill 	WR4(sc, SSCOM_UBRDIV, ubrdiv);
    512  1.1  jmcneill 
    513  1.1  jmcneill 	tp->t_ispeed = t->c_ispeed;
    514  1.1  jmcneill 	tp->t_ospeed = t->c_ospeed;
    515  1.1  jmcneill 	tp->t_cflag = t->c_cflag;
    516  1.1  jmcneill 
    517  1.1  jmcneill 	return 0;
    518  1.1  jmcneill }
    519  1.1  jmcneill 
    520  1.1  jmcneill static int
    521  1.1  jmcneill exynos_uart_intr(void *priv)
    522  1.1  jmcneill {
    523  1.1  jmcneill 	struct exynos_uart_softc *sc = priv;
    524  1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    525  1.1  jmcneill 	uint32_t uintp, uerstat, ufstat, c;
    526  1.1  jmcneill 
    527  1.1  jmcneill 	uintp = RD4(sc, SSCOM_UINTP);
    528  1.1  jmcneill 
    529  1.1  jmcneill 	for (;;) {
    530  1.1  jmcneill 		int cn_trapped = 0;
    531  1.1  jmcneill 
    532  1.1  jmcneill 		uerstat = RD4(sc, SSCOM_UERSTAT);
    533  1.1  jmcneill 		if (uerstat & UERSTAT_BREAK) {
    534  1.1  jmcneill 			cn_check_magic(tp->t_dev, CNC_BREAK,
    535  1.1  jmcneill 			    exynos_uart_cnm_state);
    536  1.1  jmcneill 			if (cn_trapped)
    537  1.1  jmcneill 				continue;
    538  1.1  jmcneill 		}
    539  1.1  jmcneill 
    540  1.1  jmcneill 		ufstat = RD4(sc, SSCOM_UFSTAT);
    541  1.1  jmcneill 		if (__SHIFTOUT(ufstat, UFSTAT_RXCOUNT) == 0) {
    542  1.1  jmcneill 			break;
    543  1.1  jmcneill 		}
    544  1.1  jmcneill 
    545  1.1  jmcneill 		c = bus_space_read_1(sc->sc_bst, sc->sc_bsh, SSCOM_URXH);
    546  1.1  jmcneill 		cn_check_magic(tp->t_dev, c & 0xff, exynos_uart_cnm_state);
    547  1.1  jmcneill 		if (cn_trapped)
    548  1.1  jmcneill 			continue;
    549  1.1  jmcneill 		tp->t_linesw->l_rint(c & 0xff, tp);
    550  1.1  jmcneill 	}
    551  1.1  jmcneill 
    552  1.1  jmcneill 	WR4(sc, SSCOM_UINTP, uintp);
    553  1.1  jmcneill 
    554  1.1  jmcneill 	return 1;
    555  1.1  jmcneill }
    556  1.1  jmcneill 
    557  1.1  jmcneill /*
    558  1.1  jmcneill  * Console support
    559  1.1  jmcneill  */
    560  1.1  jmcneill 
    561  1.1  jmcneill static int
    562  1.1  jmcneill exynos_uart_console_match(int phandle)
    563  1.1  jmcneill {
    564  1.1  jmcneill 	return of_match_compatible(phandle, compatible);
    565  1.1  jmcneill }
    566  1.1  jmcneill 
    567  1.1  jmcneill static void
    568  1.1  jmcneill exynos_uart_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
    569  1.1  jmcneill {
    570  1.1  jmcneill 	const int phandle = faa->faa_phandle;
    571  1.1  jmcneill 	bus_space_tag_t bst = faa->faa_bst;
    572  1.1  jmcneill 	bus_space_handle_t bsh;
    573  1.1  jmcneill 	bus_addr_t addr;
    574  1.1  jmcneill 	bus_size_t size;
    575  1.1  jmcneill 	tcflag_t flags;
    576  1.1  jmcneill 	int speed;
    577  1.1  jmcneill 
    578  1.1  jmcneill 	speed = fdtbus_get_stdout_speed();
    579  1.1  jmcneill 	if (speed < 0)
    580  1.1  jmcneill 		speed = 115200; /* default */
    581  1.1  jmcneill 	flags = fdtbus_get_stdout_flags();
    582  1.1  jmcneill 
    583  1.1  jmcneill 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0)
    584  1.1  jmcneill 		panic("exynos_uart: couldn't get registers");
    585  1.1  jmcneill 	if (bus_space_map(bst, addr, size, 0, &bsh) != 0)
    586  1.1  jmcneill 		panic("exynos_uart: couldn't map registers");
    587  1.1  jmcneill 
    588  1.1  jmcneill 	exynos_uart_consaddr = addr;
    589  1.1  jmcneill 
    590  1.1  jmcneill 	exynos_uart_cnattach(bst, bsh, speed, flags);
    591  1.1  jmcneill }
    592  1.1  jmcneill 
    593  1.1  jmcneill static const struct fdt_console exynos_uart_console = {
    594  1.1  jmcneill 	.match = exynos_uart_console_match,
    595  1.1  jmcneill 	.consinit = exynos_uart_console_consinit,
    596  1.1  jmcneill };
    597  1.1  jmcneill 
    598  1.1  jmcneill FDT_CONSOLE(exynos_uart, &exynos_uart_console);
    599