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exynos_uart.c revision 1.3.4.1
      1  1.3.4.1   thorpej /* $NetBSD: exynos_uart.c,v 1.3.4.1 2021/04/03 22:28:18 thorpej Exp $ */
      2      1.1  jmcneill 
      3      1.1  jmcneill /*-
      4      1.1  jmcneill  * Copyright (c) 2013-2018 The NetBSD Foundation, Inc.
      5      1.1  jmcneill  * All rights reserved.
      6      1.1  jmcneill  *
      7      1.1  jmcneill  * This code is derived from software contributed to The NetBSD Foundation
      8      1.1  jmcneill  * by Matt Thomas of 3am Software Foundry and Jared McNeill.
      9      1.1  jmcneill  *
     10      1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
     11      1.1  jmcneill  * modification, are permitted provided that the following conditions
     12      1.1  jmcneill  * are met:
     13      1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     14      1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     15      1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     16      1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     17      1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     18      1.1  jmcneill  *
     19      1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20      1.1  jmcneill  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21      1.1  jmcneill  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22      1.1  jmcneill  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23      1.1  jmcneill  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24      1.1  jmcneill  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25      1.1  jmcneill  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26      1.1  jmcneill  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27      1.1  jmcneill  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28      1.1  jmcneill  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29      1.1  jmcneill  * POSSIBILITY OF SUCH DAMAGE.
     30      1.1  jmcneill  */
     31      1.1  jmcneill 
     32      1.1  jmcneill #include "locators.h"
     33      1.1  jmcneill 
     34      1.1  jmcneill #include <sys/cdefs.h>
     35      1.1  jmcneill 
     36  1.3.4.1   thorpej __KERNEL_RCSID(1, "$NetBSD: exynos_uart.c,v 1.3.4.1 2021/04/03 22:28:18 thorpej Exp $");
     37      1.1  jmcneill 
     38      1.1  jmcneill #define cn_trap()			\
     39      1.1  jmcneill 	do {				\
     40      1.1  jmcneill 		console_debugger();	\
     41      1.1  jmcneill 		cn_trapped = 1;		\
     42      1.1  jmcneill 	} while (/* CONSTCOND */ 0)
     43      1.1  jmcneill 
     44      1.1  jmcneill #include <sys/param.h>
     45      1.1  jmcneill #include <sys/bus.h>
     46      1.1  jmcneill #include <sys/device.h>
     47      1.1  jmcneill #include <sys/conf.h>
     48      1.1  jmcneill #include <sys/intr.h>
     49      1.1  jmcneill #include <sys/systm.h>
     50      1.1  jmcneill #include <sys/time.h>
     51      1.1  jmcneill #include <sys/termios.h>
     52      1.1  jmcneill #include <sys/kauth.h>
     53      1.1  jmcneill #include <sys/lwp.h>
     54      1.1  jmcneill #include <sys/tty.h>
     55      1.1  jmcneill 
     56      1.1  jmcneill #include <dev/cons.h>
     57      1.1  jmcneill 
     58      1.1  jmcneill #include <dev/fdt/fdtvar.h>
     59      1.1  jmcneill 
     60      1.1  jmcneill #include <arm/samsung/sscom_reg.h>
     61      1.1  jmcneill 
     62      1.1  jmcneill static int	exynos_uart_match(device_t, cfdata_t, void *);
     63      1.1  jmcneill static void	exynos_uart_attach(device_t, device_t, void *);
     64      1.1  jmcneill 
     65      1.1  jmcneill static int	exynos_uart_intr(void *);
     66      1.1  jmcneill 
     67      1.1  jmcneill static int	exynos_uart_cngetc(dev_t);
     68      1.1  jmcneill static void	exynos_uart_cnputc(dev_t, int);
     69      1.1  jmcneill static void	exynos_uart_cnpollc(dev_t, int);
     70      1.1  jmcneill 
     71      1.1  jmcneill static void	exynos_uart_start(struct tty *);
     72      1.1  jmcneill static int	exynos_uart_param(struct tty *, struct termios *);
     73      1.1  jmcneill 
     74      1.1  jmcneill extern struct cfdriver exuart_cd;
     75      1.1  jmcneill 
     76      1.1  jmcneill struct exynos_uart_softc {
     77      1.1  jmcneill 	device_t sc_dev;
     78      1.1  jmcneill 	bus_space_tag_t	sc_bst;
     79      1.1  jmcneill 	bus_space_handle_t sc_bsh;
     80      1.2  jmcneill 	kmutex_t sc_lock;
     81      1.1  jmcneill 	u_int sc_freq;
     82      1.1  jmcneill 	void *sc_ih;
     83      1.1  jmcneill 
     84      1.1  jmcneill 	bool sc_console;
     85      1.1  jmcneill 	struct tty *sc_tty;
     86      1.1  jmcneill 
     87      1.1  jmcneill 	int sc_ospeed;
     88      1.1  jmcneill 	tcflag_t sc_cflag;
     89      1.1  jmcneill 
     90      1.1  jmcneill 	u_char sc_buf[1024];
     91      1.1  jmcneill };
     92      1.1  jmcneill 
     93      1.1  jmcneill #define	RD4(sc, reg)			\
     94      1.1  jmcneill 	bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
     95      1.1  jmcneill #define	WR4(sc, reg, val)		\
     96      1.1  jmcneill 	bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
     97      1.1  jmcneill 
     98      1.1  jmcneill static bus_addr_t exynos_uart_consaddr;
     99      1.1  jmcneill 
    100      1.1  jmcneill static struct exynos_uart_softc exynos_uart_cnsc;
    101      1.1  jmcneill 
    102      1.1  jmcneill static struct cnm_state exynos_uart_cnm_state;
    103      1.1  jmcneill 
    104      1.1  jmcneill struct consdev exynos_uart_consdev = {
    105      1.1  jmcneill 	.cn_getc = exynos_uart_cngetc,
    106      1.1  jmcneill 	.cn_putc = exynos_uart_cnputc,
    107      1.1  jmcneill 	.cn_pollc = exynos_uart_cnpollc,
    108      1.1  jmcneill 	.cn_dev = NODEV,
    109      1.1  jmcneill 	.cn_pri = CN_NORMAL,
    110      1.1  jmcneill };
    111      1.1  jmcneill 
    112      1.1  jmcneill static dev_type_open(exynos_uart_open);
    113      1.1  jmcneill static dev_type_open(exynos_uart_close);
    114      1.1  jmcneill static dev_type_read(exynos_uart_read);
    115      1.1  jmcneill static dev_type_write(exynos_uart_write);
    116      1.1  jmcneill static dev_type_ioctl(exynos_uart_ioctl);
    117      1.1  jmcneill static dev_type_tty(exynos_uart_tty);
    118      1.1  jmcneill static dev_type_poll(exynos_uart_poll);
    119      1.1  jmcneill static dev_type_stop(exynos_uart_stop);
    120      1.1  jmcneill 
    121      1.1  jmcneill const struct cdevsw exuart_cdevsw = {
    122      1.1  jmcneill 	.d_open = exynos_uart_open,
    123      1.1  jmcneill 	.d_close = exynos_uart_close,
    124      1.1  jmcneill 	.d_read = exynos_uart_read,
    125      1.1  jmcneill 	.d_write = exynos_uart_write,
    126      1.1  jmcneill 	.d_ioctl = exynos_uart_ioctl,
    127      1.1  jmcneill 	.d_stop = exynos_uart_stop,
    128      1.1  jmcneill 	.d_tty = exynos_uart_tty,
    129      1.1  jmcneill 	.d_poll = exynos_uart_poll,
    130      1.1  jmcneill 	.d_mmap = nommap,
    131      1.1  jmcneill 	.d_kqfilter = ttykqfilter,
    132      1.1  jmcneill 	.d_discard = nodiscard,
    133      1.1  jmcneill 	.d_flag = D_TTY
    134      1.1  jmcneill };
    135      1.1  jmcneill 
    136      1.1  jmcneill static int exynos_uart_cmajor = -1;
    137      1.1  jmcneill 
    138  1.3.4.1   thorpej static const struct device_compatible_entry compat_data[] = {
    139  1.3.4.1   thorpej 	{ .compat = "samsung,exynos4210-uart" },
    140  1.3.4.1   thorpej 	DEVICE_COMPAT_EOL
    141      1.1  jmcneill };
    142      1.1  jmcneill 
    143      1.1  jmcneill CFATTACH_DECL_NEW(exynos_uart, sizeof(struct exynos_uart_softc),
    144      1.1  jmcneill 	exynos_uart_match, exynos_uart_attach, NULL, NULL);
    145      1.1  jmcneill 
    146      1.1  jmcneill static int
    147      1.1  jmcneill exynos_uart_match(device_t parent, cfdata_t cf, void *aux)
    148      1.1  jmcneill {
    149      1.1  jmcneill 	struct fdt_attach_args * const faa = aux;
    150      1.1  jmcneill 
    151  1.3.4.1   thorpej 	return of_compatible_match(faa->faa_phandle, compat_data);
    152      1.1  jmcneill }
    153      1.1  jmcneill 
    154      1.1  jmcneill static void
    155      1.1  jmcneill exynos_uart_attach(device_t parent, device_t self, void *aux)
    156      1.1  jmcneill {
    157      1.1  jmcneill 	struct exynos_uart_softc * const sc = device_private(self);
    158      1.1  jmcneill 	struct fdt_attach_args * const faa = aux;
    159      1.1  jmcneill 	const int phandle = faa->faa_phandle;
    160      1.1  jmcneill 	char intrstr[128];
    161      1.1  jmcneill 	struct clk *clk_uart, *clk_uart_baud0;
    162      1.1  jmcneill 	struct tty *tp;
    163      1.1  jmcneill 	int major, minor;
    164      1.1  jmcneill 	bus_addr_t addr;
    165      1.1  jmcneill 	bus_size_t size;
    166      1.1  jmcneill 
    167      1.1  jmcneill 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
    168      1.1  jmcneill 		aprint_error(": couldn't get registers\n");
    169      1.1  jmcneill 		return;
    170      1.1  jmcneill 	}
    171      1.1  jmcneill 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
    172      1.1  jmcneill 		aprint_error(": failed to decode interrupt\n");
    173      1.1  jmcneill 		return;
    174      1.1  jmcneill 	}
    175      1.1  jmcneill 	clk_uart = fdtbus_clock_get(phandle, "uart");
    176      1.1  jmcneill 	if (clk_uart == NULL || clk_enable(clk_uart) != 0) {
    177      1.1  jmcneill 		aprint_error(": failed to enable uart clock\n");
    178      1.1  jmcneill 		return;
    179      1.1  jmcneill 	}
    180      1.1  jmcneill 	clk_uart_baud0 = fdtbus_clock_get(phandle, "clk_uart_baud0");
    181      1.1  jmcneill 	if (clk_uart_baud0 == NULL || clk_enable(clk_uart_baud0) != 0) {
    182      1.1  jmcneill 		aprint_error(": failed to enable clk_uart_baud0 clock\n");
    183      1.1  jmcneill 		return;
    184      1.1  jmcneill 	}
    185      1.1  jmcneill 
    186      1.1  jmcneill 	const bool is_console = exynos_uart_consaddr == addr;
    187      1.1  jmcneill 
    188      1.1  jmcneill 	sc->sc_dev = self;
    189      1.1  jmcneill 	sc->sc_bst = faa->faa_bst;
    190      1.2  jmcneill 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH);
    191      1.1  jmcneill 	sc->sc_console = is_console;
    192      1.1  jmcneill 	if (is_console) {
    193      1.1  jmcneill 		sc->sc_bsh = exynos_uart_cnsc.sc_bsh;
    194      1.1  jmcneill 	} else {
    195      1.1  jmcneill 		if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
    196      1.1  jmcneill 			aprint_error(": failed to map registers\n");
    197      1.1  jmcneill 			return;
    198      1.1  jmcneill 		}
    199      1.1  jmcneill 	}
    200      1.1  jmcneill 	sc->sc_freq = clk_get_rate(clk_uart_baud0);
    201      1.1  jmcneill 
    202  1.3.4.1   thorpej 	sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SERIAL,
    203  1.3.4.1   thorpej 	    0, exynos_uart_intr, sc, device_xname(self));
    204      1.1  jmcneill 	if (sc->sc_ih == NULL) {
    205      1.1  jmcneill 		aprint_error(": failed to establish interrupt on %s\n",
    206      1.1  jmcneill 		    intrstr);
    207      1.1  jmcneill 		return;
    208      1.1  jmcneill 	}
    209      1.1  jmcneill 
    210      1.1  jmcneill 	if (exynos_uart_cmajor == -1) {
    211      1.1  jmcneill 		/* allocate a major number */
    212      1.1  jmcneill 		int bmajor = -1, cmajor = -1;
    213      1.1  jmcneill 		int error = devsw_attach("exuart", NULL, &bmajor,
    214      1.1  jmcneill 		    &exuart_cdevsw, &cmajor);
    215      1.1  jmcneill 		if (error) {
    216      1.1  jmcneill 			aprint_error(": couldn't allocate major number\n");
    217      1.1  jmcneill 			return;
    218      1.1  jmcneill 		}
    219      1.1  jmcneill 		exynos_uart_cmajor = cmajor;
    220      1.1  jmcneill 	}
    221      1.1  jmcneill 
    222      1.1  jmcneill 	major = cdevsw_lookup_major(&exuart_cdevsw);
    223      1.1  jmcneill 	minor = device_unit(self);
    224      1.1  jmcneill 
    225      1.1  jmcneill 	tp = sc->sc_tty = tty_alloc();
    226      1.1  jmcneill 	tp->t_oproc = exynos_uart_start;
    227      1.1  jmcneill 	tp->t_param = exynos_uart_param;
    228      1.1  jmcneill 	tp->t_dev = makedev(major, minor);
    229      1.1  jmcneill 	tp->t_sc = sc;
    230      1.1  jmcneill 	tty_attach(tp);
    231      1.1  jmcneill 
    232      1.1  jmcneill 	aprint_naive("\n");
    233      1.1  jmcneill 	if (is_console) {
    234      1.1  jmcneill 		cn_tab->cn_dev = tp->t_dev;
    235      1.1  jmcneill 		aprint_normal(": console");
    236      1.1  jmcneill 	}
    237      1.1  jmcneill 	aprint_normal("\n");
    238      1.1  jmcneill 
    239      1.1  jmcneill 	if (is_console)
    240      1.1  jmcneill 		delay(10000);
    241      1.1  jmcneill 
    242      1.1  jmcneill 	/* Initialize device */
    243      1.1  jmcneill 	WR4(sc, SSCOM_UFCON,
    244      1.1  jmcneill 	    __SHIFTIN(2, UFCON_TXTRIGGER) |
    245      1.1  jmcneill 	    __SHIFTIN(1, UFCON_RXTRIGGER) |
    246      1.1  jmcneill 	    UFCON_TXFIFO_RESET | UFCON_RXFIFO_RESET |
    247      1.1  jmcneill 	    UFCON_FIFO_ENABLE);
    248      1.1  jmcneill 	/* Configure PIO mode with RX timeout interrupts */
    249      1.1  jmcneill 	WR4(sc, SSCOM_UCON,
    250      1.1  jmcneill 	    __SHIFTIN(3, UCON_RXTO) |
    251      1.1  jmcneill 	    UCON_TOINT | UCON_ERRINT |
    252      1.1  jmcneill 	    UCON_TXMODE_INT | UCON_RXMODE_INT);
    253      1.1  jmcneill 
    254      1.1  jmcneill 	/* Disable interrupts */
    255      1.1  jmcneill 	WR4(sc, SSCOM_UINTM, ~0u);
    256      1.1  jmcneill 
    257      1.1  jmcneill 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
    258      1.1  jmcneill }
    259      1.1  jmcneill 
    260      1.1  jmcneill static int
    261      1.1  jmcneill exynos_uart_cngetc(dev_t dev)
    262      1.1  jmcneill {
    263      1.1  jmcneill 	struct exynos_uart_softc * const sc = &exynos_uart_cnsc;
    264      1.2  jmcneill 	uint32_t ufstat;
    265      1.1  jmcneill 	int s, c;
    266      1.1  jmcneill 
    267      1.1  jmcneill 	s = splserial();
    268      1.1  jmcneill 
    269      1.2  jmcneill 	ufstat = RD4(sc, SSCOM_UFSTAT);
    270      1.2  jmcneill 	if (__SHIFTOUT(ufstat, UFSTAT_RXCOUNT) == 0) {
    271      1.1  jmcneill 		splx(s);
    272      1.1  jmcneill 		return -1;
    273      1.1  jmcneill 	}
    274      1.1  jmcneill 
    275      1.1  jmcneill 	c = bus_space_read_1(sc->sc_bst, sc->sc_bsh, SSCOM_URXH);
    276      1.1  jmcneill #if defined(DDB)
    277      1.1  jmcneill 	extern int db_active;
    278      1.1  jmcneill 	if (!db_active)
    279      1.1  jmcneill #endif
    280      1.1  jmcneill 	{
    281      1.1  jmcneill 		int cn_trapped __unused = 0;
    282      1.1  jmcneill 		cn_check_magic(dev, c, exynos_uart_cnm_state);
    283      1.1  jmcneill 	}
    284      1.1  jmcneill 
    285      1.1  jmcneill 	splx(s);
    286      1.1  jmcneill 
    287      1.1  jmcneill 	return c & 0xff;
    288      1.1  jmcneill }
    289      1.1  jmcneill 
    290      1.1  jmcneill static void
    291      1.1  jmcneill exynos_uart_cnputc(dev_t dev, int c)
    292      1.1  jmcneill {
    293      1.1  jmcneill 	struct exynos_uart_softc * const sc = &exynos_uart_cnsc;
    294      1.1  jmcneill 	int s;
    295      1.1  jmcneill 
    296      1.1  jmcneill 	s = splserial();
    297      1.1  jmcneill 	while ((RD4(sc, SSCOM_UFSTAT) & UFSTAT_TXFULL) != 0)
    298      1.1  jmcneill 		;
    299      1.1  jmcneill 
    300      1.1  jmcneill 	bus_space_write_1(sc->sc_bst, sc->sc_bsh, SSCOM_UTXH, c);
    301      1.1  jmcneill 
    302      1.1  jmcneill 	splx(s);
    303      1.1  jmcneill }
    304      1.3     skrll 
    305      1.1  jmcneill 
    306      1.1  jmcneill static void
    307      1.1  jmcneill exynos_uart_cnpollc(dev_t dev, int on)
    308      1.1  jmcneill {
    309      1.1  jmcneill }
    310      1.1  jmcneill 
    311      1.1  jmcneill static void
    312      1.1  jmcneill exynos_uart_cnattach(bus_space_tag_t bst, bus_space_handle_t bsh,
    313      1.1  jmcneill     int ospeed, tcflag_t cflag)
    314      1.1  jmcneill {
    315      1.1  jmcneill 	struct exynos_uart_softc *sc = &exynos_uart_cnsc;
    316      1.1  jmcneill 
    317      1.1  jmcneill 	cn_tab = &exynos_uart_consdev;
    318      1.1  jmcneill 	cn_init_magic(&exynos_uart_cnm_state);
    319      1.1  jmcneill 	cn_set_magic("\047\001");
    320      1.1  jmcneill 
    321      1.1  jmcneill 	sc->sc_bst = bst;
    322      1.1  jmcneill 	sc->sc_bsh = bsh;
    323      1.1  jmcneill 	sc->sc_ospeed = ospeed;
    324      1.1  jmcneill 	sc->sc_cflag = cflag;
    325      1.1  jmcneill }
    326      1.1  jmcneill 
    327      1.1  jmcneill static int
    328      1.1  jmcneill exynos_uart_open(dev_t dev, int flag, int mode, lwp_t *l)
    329      1.1  jmcneill {
    330      1.1  jmcneill 	struct exynos_uart_softc *sc =
    331      1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    332      1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    333      1.1  jmcneill 
    334      1.1  jmcneill 	if (kauth_authorize_device_tty(l->l_cred,
    335      1.1  jmcneill 	    KAUTH_DEVICE_TTY_OPEN, tp) != 0) {
    336      1.1  jmcneill 		return EBUSY;
    337      1.1  jmcneill 	}
    338      1.1  jmcneill 
    339      1.2  jmcneill 	mutex_enter(&sc->sc_lock);
    340      1.2  jmcneill 
    341      1.1  jmcneill 	if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
    342      1.1  jmcneill 		tp->t_dev = dev;
    343      1.1  jmcneill 		ttychars(tp);
    344      1.1  jmcneill 		tp->t_iflag = TTYDEF_IFLAG;
    345      1.1  jmcneill 		tp->t_oflag = TTYDEF_OFLAG;
    346      1.1  jmcneill 		tp->t_lflag = TTYDEF_LFLAG;
    347      1.1  jmcneill 		if (sc->sc_console) {
    348      1.1  jmcneill 			tp->t_ispeed = tp->t_ospeed = exynos_uart_cnsc.sc_ospeed;
    349      1.1  jmcneill 			tp->t_cflag = exynos_uart_cnsc.sc_cflag;
    350      1.1  jmcneill 		} else {
    351      1.1  jmcneill 			tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
    352      1.1  jmcneill 			tp->t_cflag = TTYDEF_CFLAG;
    353      1.1  jmcneill 		}
    354      1.1  jmcneill 		ttsetwater(tp);
    355      1.1  jmcneill 	}
    356      1.1  jmcneill 	tp->t_state |= TS_CARR_ON;
    357      1.1  jmcneill 
    358      1.1  jmcneill 	/* Enable RX and error interrupts */
    359      1.1  jmcneill 	WR4(sc, SSCOM_UINTM, ~0u & ~(UINT_RXD|UINT_ERROR));
    360      1.1  jmcneill 
    361      1.2  jmcneill 	mutex_exit(&sc->sc_lock);
    362      1.2  jmcneill 
    363      1.1  jmcneill 	return tp->t_linesw->l_open(dev, tp);
    364      1.1  jmcneill }
    365      1.1  jmcneill 
    366      1.1  jmcneill static int
    367      1.1  jmcneill exynos_uart_close(dev_t dev, int flag, int mode, lwp_t *l)
    368      1.1  jmcneill {
    369      1.1  jmcneill 	struct exynos_uart_softc *sc =
    370      1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    371      1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    372      1.1  jmcneill 
    373      1.2  jmcneill 	mutex_enter(&sc->sc_lock);
    374      1.2  jmcneill 
    375      1.1  jmcneill 	tp->t_linesw->l_close(tp, flag);
    376      1.1  jmcneill 	ttyclose(tp);
    377      1.1  jmcneill 
    378      1.1  jmcneill 	/* Disable interrupts */
    379      1.1  jmcneill 	WR4(sc, SSCOM_UINTM, ~0u);
    380      1.1  jmcneill 
    381      1.2  jmcneill 	mutex_exit(&sc->sc_lock);
    382      1.2  jmcneill 
    383      1.1  jmcneill 	return 0;
    384      1.1  jmcneill }
    385      1.1  jmcneill 
    386      1.1  jmcneill static int
    387      1.1  jmcneill exynos_uart_read(dev_t dev, struct uio *uio, int flag)
    388      1.1  jmcneill {
    389      1.1  jmcneill 	struct exynos_uart_softc *sc =
    390      1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    391      1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    392      1.1  jmcneill 
    393      1.1  jmcneill 	return tp->t_linesw->l_read(tp, uio, flag);
    394      1.1  jmcneill }
    395      1.1  jmcneill 
    396      1.1  jmcneill static int
    397      1.1  jmcneill exynos_uart_write(dev_t dev, struct uio *uio, int flag)
    398      1.1  jmcneill {
    399      1.1  jmcneill 	struct exynos_uart_softc *sc =
    400      1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    401      1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    402      1.1  jmcneill 
    403      1.1  jmcneill 	return tp->t_linesw->l_write(tp, uio, flag);
    404      1.1  jmcneill }
    405      1.1  jmcneill 
    406      1.1  jmcneill static int
    407      1.1  jmcneill exynos_uart_poll(dev_t dev, int events, lwp_t *l)
    408      1.1  jmcneill {
    409      1.1  jmcneill 	struct exynos_uart_softc *sc =
    410      1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    411      1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    412      1.1  jmcneill 
    413      1.1  jmcneill 	return tp->t_linesw->l_poll(tp, events, l);
    414      1.1  jmcneill }
    415      1.1  jmcneill 
    416      1.1  jmcneill static int
    417      1.1  jmcneill exynos_uart_ioctl(dev_t dev, u_long cmd, void *data, int flag, lwp_t *l)
    418      1.1  jmcneill {
    419      1.1  jmcneill 	struct exynos_uart_softc *sc =
    420      1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    421      1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    422      1.1  jmcneill 	int error;
    423      1.1  jmcneill 
    424      1.1  jmcneill 	error = tp->t_linesw->l_ioctl(tp, cmd, data, flag, l);
    425      1.1  jmcneill 	if (error != EPASSTHROUGH)
    426      1.1  jmcneill 		return error;
    427      1.1  jmcneill 
    428      1.1  jmcneill 	return ttioctl(tp, cmd, data, flag, l);
    429      1.1  jmcneill }
    430      1.1  jmcneill 
    431      1.1  jmcneill static struct tty *
    432      1.1  jmcneill exynos_uart_tty(dev_t dev)
    433      1.1  jmcneill {
    434      1.1  jmcneill 	struct exynos_uart_softc *sc =
    435      1.1  jmcneill 	    device_lookup_private(&exuart_cd, minor(dev));
    436      1.1  jmcneill 
    437      1.1  jmcneill 	return sc->sc_tty;
    438      1.1  jmcneill }
    439      1.1  jmcneill 
    440      1.1  jmcneill static void
    441      1.1  jmcneill exynos_uart_stop(struct tty *tp, int flag)
    442      1.1  jmcneill {
    443      1.1  jmcneill }
    444      1.1  jmcneill 
    445      1.1  jmcneill static void
    446      1.1  jmcneill exynos_uart_start(struct tty *tp)
    447      1.1  jmcneill {
    448      1.1  jmcneill 	struct exynos_uart_softc *sc = tp->t_sc;
    449      1.1  jmcneill 	u_char *p = sc->sc_buf;
    450      1.1  jmcneill 	int s, brem;
    451      1.1  jmcneill 
    452      1.1  jmcneill 	s = spltty();
    453      1.1  jmcneill 
    454      1.1  jmcneill 	if (tp->t_state & (TS_TTSTOP | TS_BUSY | TS_TIMEOUT)) {
    455      1.1  jmcneill 		splx(s);
    456      1.1  jmcneill 		return;
    457      1.1  jmcneill 	}
    458      1.1  jmcneill 	tp->t_state |= TS_BUSY;
    459      1.1  jmcneill 
    460      1.1  jmcneill 	for (brem = q_to_b(&tp->t_outq, sc->sc_buf, sizeof(sc->sc_buf));
    461      1.1  jmcneill 	     brem > 0;
    462      1.1  jmcneill 	     brem--, p++) {
    463      1.1  jmcneill 		while ((RD4(sc, SSCOM_UFSTAT) & UFSTAT_TXFULL) != 0)
    464      1.1  jmcneill 			;
    465      1.1  jmcneill 
    466      1.1  jmcneill 		bus_space_write_1(sc->sc_bst, sc->sc_bsh,
    467      1.1  jmcneill 		    SSCOM_UTXH, *p);
    468      1.1  jmcneill 	}
    469      1.1  jmcneill 
    470      1.1  jmcneill 	tp->t_state &= ~TS_BUSY;
    471      1.1  jmcneill 	if (ttypull(tp)) {
    472      1.1  jmcneill 		tp->t_state |= TS_TIMEOUT;
    473      1.1  jmcneill 		callout_schedule(&tp->t_rstrt_ch, 1);
    474      1.1  jmcneill 	}
    475      1.1  jmcneill 	splx(s);
    476      1.1  jmcneill }
    477      1.1  jmcneill 
    478      1.1  jmcneill static int
    479      1.1  jmcneill exynos_uart_param(struct tty *tp, struct termios *t)
    480      1.1  jmcneill {
    481      1.1  jmcneill 	struct exynos_uart_softc *sc = tp->t_sc;
    482      1.1  jmcneill 
    483      1.2  jmcneill 	mutex_enter(&sc->sc_lock);
    484      1.2  jmcneill 
    485      1.2  jmcneill 	if (tp->t_cflag != t->c_cflag) {
    486      1.2  jmcneill 		uint32_t ulcon = 0;
    487      1.2  jmcneill 		switch (ISSET(t->c_cflag, CSIZE)) {
    488      1.2  jmcneill 		case CS5:
    489      1.2  jmcneill 			ulcon |= ULCON_LENGTH_5;
    490      1.2  jmcneill 			break;
    491      1.2  jmcneill 		case CS6:
    492      1.2  jmcneill 			ulcon |= ULCON_LENGTH_6;
    493      1.2  jmcneill 			break;
    494      1.2  jmcneill 		case CS7:
    495      1.2  jmcneill 			ulcon |= ULCON_LENGTH_7;
    496      1.2  jmcneill 			break;
    497      1.2  jmcneill 		case CS8:
    498      1.2  jmcneill 			ulcon |= ULCON_LENGTH_8;
    499      1.2  jmcneill 			break;
    500      1.2  jmcneill 		}
    501      1.2  jmcneill 		switch (ISSET(t->c_cflag, PARENB|PARODD)) {
    502      1.2  jmcneill 		case PARENB|PARODD:
    503      1.2  jmcneill 			ulcon |= ULCON_PARITY_ODD;
    504      1.2  jmcneill 			break;
    505      1.2  jmcneill 		case PARENB:
    506      1.2  jmcneill 			ulcon |= ULCON_PARITY_EVEN;
    507      1.2  jmcneill 			break;
    508      1.2  jmcneill 		default:
    509      1.2  jmcneill 			ulcon |= ULCON_PARITY_NONE;
    510      1.2  jmcneill 			break;
    511      1.2  jmcneill 		}
    512      1.2  jmcneill 		if (ISSET(t->c_cflag, CSTOPB))
    513      1.2  jmcneill 			ulcon |= ULCON_STOP;
    514      1.2  jmcneill 		WR4(sc, SSCOM_ULCON, ulcon);
    515      1.2  jmcneill 	}
    516      1.1  jmcneill 
    517      1.2  jmcneill 	if (tp->t_ospeed != t->c_ospeed) {
    518      1.2  jmcneill 		const uint32_t ubrdiv = (sc->sc_freq / 16) / t->c_ospeed - 1;
    519      1.2  jmcneill 		WR4(sc, SSCOM_UBRDIV, ubrdiv);
    520      1.2  jmcneill 	}
    521      1.1  jmcneill 
    522      1.1  jmcneill 	tp->t_ispeed = t->c_ispeed;
    523      1.1  jmcneill 	tp->t_ospeed = t->c_ospeed;
    524      1.1  jmcneill 	tp->t_cflag = t->c_cflag;
    525      1.1  jmcneill 
    526      1.2  jmcneill 	mutex_exit(&sc->sc_lock);
    527      1.2  jmcneill 
    528      1.1  jmcneill 	return 0;
    529      1.1  jmcneill }
    530      1.1  jmcneill 
    531      1.1  jmcneill static int
    532      1.1  jmcneill exynos_uart_intr(void *priv)
    533      1.1  jmcneill {
    534      1.1  jmcneill 	struct exynos_uart_softc *sc = priv;
    535      1.1  jmcneill 	struct tty *tp = sc->sc_tty;
    536      1.1  jmcneill 	uint32_t uintp, uerstat, ufstat, c;
    537      1.1  jmcneill 
    538      1.2  jmcneill 	mutex_enter(&sc->sc_lock);
    539      1.2  jmcneill 
    540      1.1  jmcneill 	uintp = RD4(sc, SSCOM_UINTP);
    541      1.1  jmcneill 
    542      1.1  jmcneill 	for (;;) {
    543      1.1  jmcneill 		int cn_trapped = 0;
    544      1.1  jmcneill 
    545      1.1  jmcneill 		uerstat = RD4(sc, SSCOM_UERSTAT);
    546      1.1  jmcneill 		if (uerstat & UERSTAT_BREAK) {
    547      1.1  jmcneill 			cn_check_magic(tp->t_dev, CNC_BREAK,
    548      1.1  jmcneill 			    exynos_uart_cnm_state);
    549      1.1  jmcneill 			if (cn_trapped)
    550      1.1  jmcneill 				continue;
    551      1.1  jmcneill 		}
    552      1.1  jmcneill 
    553      1.1  jmcneill 		ufstat = RD4(sc, SSCOM_UFSTAT);
    554      1.1  jmcneill 		if (__SHIFTOUT(ufstat, UFSTAT_RXCOUNT) == 0) {
    555      1.1  jmcneill 			break;
    556      1.1  jmcneill 		}
    557      1.1  jmcneill 
    558      1.1  jmcneill 		c = bus_space_read_1(sc->sc_bst, sc->sc_bsh, SSCOM_URXH);
    559      1.1  jmcneill 		cn_check_magic(tp->t_dev, c & 0xff, exynos_uart_cnm_state);
    560      1.1  jmcneill 		if (cn_trapped)
    561      1.1  jmcneill 			continue;
    562      1.1  jmcneill 		tp->t_linesw->l_rint(c & 0xff, tp);
    563      1.1  jmcneill 	}
    564      1.1  jmcneill 
    565      1.1  jmcneill 	WR4(sc, SSCOM_UINTP, uintp);
    566      1.1  jmcneill 
    567      1.2  jmcneill 	mutex_exit(&sc->sc_lock);
    568      1.2  jmcneill 
    569      1.1  jmcneill 	return 1;
    570      1.1  jmcneill }
    571      1.1  jmcneill 
    572      1.1  jmcneill /*
    573      1.1  jmcneill  * Console support
    574      1.1  jmcneill  */
    575      1.1  jmcneill 
    576      1.1  jmcneill static int
    577      1.1  jmcneill exynos_uart_console_match(int phandle)
    578      1.1  jmcneill {
    579  1.3.4.1   thorpej 	return of_compatible_match(phandle, compat_data);
    580      1.1  jmcneill }
    581      1.1  jmcneill 
    582      1.1  jmcneill static void
    583      1.1  jmcneill exynos_uart_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
    584      1.1  jmcneill {
    585      1.1  jmcneill 	const int phandle = faa->faa_phandle;
    586      1.1  jmcneill 	bus_space_tag_t bst = faa->faa_bst;
    587      1.1  jmcneill 	bus_space_handle_t bsh;
    588      1.1  jmcneill 	bus_addr_t addr;
    589      1.1  jmcneill 	bus_size_t size;
    590      1.1  jmcneill 	tcflag_t flags;
    591      1.1  jmcneill 	int speed;
    592      1.1  jmcneill 
    593      1.1  jmcneill 	speed = fdtbus_get_stdout_speed();
    594      1.1  jmcneill 	if (speed < 0)
    595      1.1  jmcneill 		speed = 115200; /* default */
    596      1.1  jmcneill 	flags = fdtbus_get_stdout_flags();
    597      1.1  jmcneill 
    598      1.1  jmcneill 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0)
    599      1.1  jmcneill 		panic("exynos_uart: couldn't get registers");
    600      1.1  jmcneill 	if (bus_space_map(bst, addr, size, 0, &bsh) != 0)
    601      1.1  jmcneill 		panic("exynos_uart: couldn't map registers");
    602      1.1  jmcneill 
    603      1.1  jmcneill 	exynos_uart_consaddr = addr;
    604      1.1  jmcneill 
    605      1.1  jmcneill 	exynos_uart_cnattach(bst, bsh, speed, flags);
    606      1.1  jmcneill }
    607      1.1  jmcneill 
    608      1.1  jmcneill static const struct fdt_console exynos_uart_console = {
    609      1.1  jmcneill 	.match = exynos_uart_console_match,
    610      1.1  jmcneill 	.consinit = exynos_uart_console_consinit,
    611      1.1  jmcneill };
    612      1.1  jmcneill 
    613      1.1  jmcneill FDT_CONSOLE(exynos_uart, &exynos_uart_console);
    614