exynos_var.h revision 1.12.6.2
1 /* $NetBSD: exynos_var.h,v 1.12.6.2 2014/08/20 00:02:47 tls Exp $ */ 2 /*- 3 * Copyright (c) 2013, 2014 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas of 3am Software Foundry. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Reinoud Zandijk. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef _ARM_SAMSUNG_EXYNOS_VAR_H_ 35 #define _ARM_SAMSUNG_EXYNOS_VAR_H_ 36 37 #include <sys/types.h> 38 #include <sys/bus.h> 39 #include <sys/gpio.h> 40 #include <dev/gpio/gpiovar.h> 41 #include <arm/samsung/exynos_reg.h> 42 43 extern uint32_t exynos_soc_id; 44 extern uint32_t exynos_pop_id; 45 46 #define EXYNOS_PRODUCT_FAMILY(soc) __SHIFTOUT((soc), __BITS(24,31)) 47 #define EXYNOS4_PRODUCT_FAMILY 0xe4 48 #define EXYNOS5_PRODUCT_FAMILY 0xe5 49 #define EXYNOS_PRODUCT_ID(soc) __SHIFTOUT((soc), __BITS(12,31)) 50 #define EXYNOS_PRODUCT_PACKAGE(soc) __SHIFTOUT((soc), __BITS(8,11)) 51 #define EXYNOS_PRODUCT_REV(soc) __SHIFTOUT((soc), __BITS(4,7)) 52 #define EXYNOS_PRODUCT_SUBREV(soc) __SHIFTOUT((soc), __BITS(0,3)) 53 54 55 #define IS_EXYNOS4410_P() (EXYNOS_PRODUCT_ID(exynos_soc_id) == 0xe4410) 56 #define IS_EXYNOS4412_P() (EXYNOS_PRODUCT_ID(exynos_soc_id) == 0xe4412) 57 #define IS_EXYNOS4412_R0_P() \ 58 ((EXYNOS_PRODUCT_ID(exynos_soc_id) == 0xe4412) && \ 59 (EXYNOS_PRODUCT_REV(exynos_soc_id) == 0)) 60 #define IS_EXYNOS4X12_P() ((EXYNOS_PRODUCT_ID(exynos_soc_id) & 0xff0ff) \ 61 == 0xe4012) 62 63 #define IS_EXYNOS4_P() (EXYNOS_PRODUCT_FAMILY(exynos_soc_id) == EXYNOS4_PRODUCT_FAMILY) 64 65 #define IS_EXYNOS5410_P() (EXYNOS_PRODUCT_ID(exynos_soc_id) == 0xe5410) 66 #define IS_EXYNOS5440_P() (EXYNOS_PRODUCT_ID(exynos_soc_id) == 0xe5440) 67 68 #define IS_EXYNOS5_P() (EXYNOS_PRODUCT_FAMILY(exynos_soc_id) == EXYNOS5_PRODUCT_FAMILY) 69 70 struct exyo_locators { 71 const char *loc_name; 72 bus_size_t loc_offset; 73 bus_size_t loc_size; 74 int loc_port; 75 int loc_intr; 76 int loc_flags; 77 78 /* for i2c: */ 79 const char *loc_gpio_bus; 80 uint8_t loc_sda, loc_slc, loc_func; 81 }; 82 83 84 struct exyo_attach_args { 85 struct exyo_locators exyo_loc; 86 bus_space_tag_t exyo_core_bst; 87 bus_space_tag_t exyo_core_a4x_bst; 88 bus_space_handle_t exyo_core_bsh; 89 bus_dma_tag_t exyo_dmat; 90 bus_dma_tag_t exyo_coherent_dmat; 91 }; 92 93 struct exynos_gpio_pinset { 94 char pinset_group[10]; 95 uint8_t pinset_func; 96 uint8_t pinset_mask; 97 }; 98 99 struct exynos_gpio_pindata { 100 gpio_chipset_tag_t pd_gc; 101 int pd_pin; 102 }; 103 104 105 #define EXYNOS_MAX_IIC_BUSSES 9 106 struct i2c_controller; 107 extern struct i2c_controller *exynos_i2cbus[EXYNOS_MAX_IIC_BUSSES]; 108 109 110 extern struct bus_space exynos_bs_tag; 111 extern struct bus_space exynos_a4x_bs_tag; 112 extern struct arm32_bus_dma_tag exynos_bus_dma_tag; 113 extern struct arm32_bus_dma_tag exynos_coherent_bus_dma_tag; 114 115 extern bus_space_handle_t exynos_core_bsh; 116 117 extern void exynos_bootstrap(vaddr_t, vaddr_t); 118 extern void exynos_dma_bootstrap(psize_t memsize); 119 extern void exynos_gpio_bootstrap(void); 120 121 extern void exynos_device_register(device_t self, void *aux); 122 extern void exynos_device_register_post_config(device_t self, void *aux); 123 extern void exyo_device_register(device_t self, void *aux); 124 extern void exyo_device_register_post_config(device_t self, void *aux); 125 extern void exynos_wdt_reset(void); 126 127 extern bool exynos_gpio_pinset_available(const struct exynos_gpio_pinset *); 128 extern void exynos_gpio_pinset_acquire(const struct exynos_gpio_pinset *); 129 extern void exynos_gpio_pinset_release(const struct exynos_gpio_pinset *); 130 extern void exynos_gpio_pinset_to_pindata(const struct exynos_gpio_pinset *, 131 int pinnr, struct exynos_gpio_pindata *); 132 extern bool exynos_gpio_pin_reserve(const char *, struct exynos_gpio_pindata *); 133 134 static inline void 135 exynos_gpio_pindata_write(const struct exynos_gpio_pindata *pd, int value) 136 { 137 gpiobus_pin_write(pd->pd_gc, pd->pd_pin, value); 138 } 139 140 static inline int 141 exynos_gpio_pindata_read(const struct exynos_gpio_pindata *pd) 142 { 143 return gpiobus_pin_read(pd->pd_gc, pd->pd_pin); 144 } 145 146 static inline void 147 exynos_gpio_pindata_ctl(const struct exynos_gpio_pindata *pd, int flags) 148 { 149 gpiobus_pin_ctl(pd->pd_gc, pd->pd_pin, flags); 150 } 151 152 153 #ifdef ARM_TRUSTZONE_FIRMWARE 154 /* trustzone calls */ 155 extern int exynos_do_idle(void); 156 extern int exynos_set_cpu_boot_addr(int cpu, vaddr_t boot_addr); 157 extern int exynos_cpu_boot(int cpu); 158 extern int exynos_l2cc_init(void); 159 #endif 160 161 #endif /* _ARM_SAMSUNG_EXYNOS_VAR_H_ */ 162
Indexes created Sat Oct 25 16:10:12 GMT 2025