exynos_var.h revision 1.15 1 /* $NetBSD: exynos_var.h,v 1.15 2014/09/05 08:01:05 skrll Exp $ */
2
3 /*-
4 * Copyright (c) 2013, 2014 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry.
9 *
10 * This code is derived from software contributed to The NetBSD Foundation
11 * by Reinoud Zandijk.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 #ifndef _ARM_SAMSUNG_EXYNOS_VAR_H_
36 #define _ARM_SAMSUNG_EXYNOS_VAR_H_
37
38 #include <sys/types.h>
39 #include <sys/bus.h>
40 #include <sys/gpio.h>
41 #include <dev/gpio/gpiovar.h>
42 #include <arm/samsung/exynos_reg.h>
43
44 extern uint32_t exynos_soc_id;
45 extern uint32_t exynos_pop_id;
46
47 #define EXYNOS_PRODUCT_FAMILY(soc) __SHIFTOUT((soc), __BITS(24,31))
48 #define EXYNOS4_PRODUCT_FAMILY 0xe4
49 #define EXYNOS5_PRODUCT_FAMILY 0xe5
50 #define EXYNOS_PRODUCT_ID(soc) __SHIFTOUT((soc), __BITS(12,31))
51 #define EXYNOS_PRODUCT_PACKAGE(soc) __SHIFTOUT((soc), __BITS(8,11))
52 #define EXYNOS_PRODUCT_REV(soc) __SHIFTOUT((soc), __BITS(4,7))
53 #define EXYNOS_PRODUCT_SUBREV(soc) __SHIFTOUT((soc), __BITS(0,3))
54
55
56 #define IS_EXYNOS4410_P() (EXYNOS_PRODUCT_ID(exynos_soc_id) == 0xe4410)
57 #define IS_EXYNOS4412_P() (EXYNOS_PRODUCT_ID(exynos_soc_id) == 0xe4412)
58 #define IS_EXYNOS4412_R0_P() \
59 ((EXYNOS_PRODUCT_ID(exynos_soc_id) == 0xe4412) && \
60 (EXYNOS_PRODUCT_REV(exynos_soc_id) == 0))
61 #define IS_EXYNOS4X12_P() ((EXYNOS_PRODUCT_ID(exynos_soc_id) & 0xff0ff) \
62 == 0xe4012)
63
64 #define IS_EXYNOS4_P() (EXYNOS_PRODUCT_FAMILY(exynos_soc_id) == EXYNOS4_PRODUCT_FAMILY)
65
66 #define IS_EXYNOS5410_P() (EXYNOS_PRODUCT_ID(exynos_soc_id) == 0xe5410)
67 #define IS_EXYNOS5422_P() (EXYNOS_PRODUCT_ID(exynos_soc_id) == 0xe5422)
68 #define IS_EXYNOS5440_P() (EXYNOS_PRODUCT_ID(exynos_soc_id) == 0xe5440)
69
70 #define IS_EXYNOS5_P() (EXYNOS_PRODUCT_FAMILY(exynos_soc_id) == EXYNOS5_PRODUCT_FAMILY)
71
72 struct exyo_locators {
73 const char *loc_name;
74 bus_size_t loc_offset;
75 bus_size_t loc_size;
76 int loc_port;
77 int loc_intr;
78 int loc_flags;
79
80 /* for i2c: */
81 const char *loc_gpio_bus;
82 uint8_t loc_sda, loc_slc, loc_func;
83 };
84
85
86 struct exyo_attach_args {
87 struct exyo_locators exyo_loc;
88 bus_space_tag_t exyo_core_bst;
89 bus_space_tag_t exyo_core_a4x_bst;
90 bus_space_handle_t exyo_core_bsh;
91 bus_dma_tag_t exyo_dmat;
92 bus_dma_tag_t exyo_coherent_dmat;
93 };
94
95 struct exynos_gpio_pinset {
96 char pinset_group[10];
97 uint8_t pinset_func;
98 uint8_t pinset_mask;
99 };
100
101 struct exynos_gpio_pindata {
102 gpio_chipset_tag_t pd_gc;
103 int pd_pin;
104 };
105
106
107 #define EXYNOS_MAX_IIC_BUSSES 9
108 struct i2c_controller;
109 extern struct i2c_controller *exynos_i2cbus[EXYNOS_MAX_IIC_BUSSES];
110
111
112 extern struct bus_space exynos_bs_tag;
113 extern struct bus_space exynos_a4x_bs_tag;
114 extern struct arm32_bus_dma_tag exynos_bus_dma_tag;
115 extern struct arm32_bus_dma_tag exynos_coherent_bus_dma_tag;
116
117 extern bus_space_handle_t exynos_core_bsh;
118
119 extern void exynos_bootstrap(vaddr_t, vaddr_t);
120 extern void exynos_dma_bootstrap(psize_t memsize);
121 extern void exynos_gpio_bootstrap(void);
122
123 extern void exynos_clocks_bootstrap(void);
124 extern void exynos_sysctl_cpufreq_init(void);
125 extern uint64_t exynos_get_cpufreq(void);
126
127 extern void exynos_device_register(device_t self, void *aux);
128 extern void exynos_device_register_post_config(device_t self, void *aux);
129 extern void exyo_device_register(device_t self, void *aux);
130 extern void exyo_device_register_post_config(device_t self, void *aux);
131 extern void exynos_wdt_reset(void);
132
133 extern bool exynos_gpio_pinset_available(const struct exynos_gpio_pinset *);
134 extern void exynos_gpio_pinset_acquire(const struct exynos_gpio_pinset *);
135 extern void exynos_gpio_pinset_release(const struct exynos_gpio_pinset *);
136 extern void exynos_gpio_pinset_to_pindata(const struct exynos_gpio_pinset *,
137 int pinnr, struct exynos_gpio_pindata *);
138 extern bool exynos_gpio_pin_reserve(const char *, struct exynos_gpio_pindata *);
139
140 static inline void
141 exynos_gpio_pindata_write(const struct exynos_gpio_pindata *pd, int value)
142 {
143 gpiobus_pin_write(pd->pd_gc, pd->pd_pin, value);
144 }
145
146 static inline int
147 exynos_gpio_pindata_read(const struct exynos_gpio_pindata *pd)
148 {
149 return gpiobus_pin_read(pd->pd_gc, pd->pd_pin);
150 }
151
152 static inline void
153 exynos_gpio_pindata_ctl(const struct exynos_gpio_pindata *pd, int flags)
154 {
155 gpiobus_pin_ctl(pd->pd_gc, pd->pd_pin, flags);
156 }
157
158
159 #ifdef ARM_TRUSTZONE_FIRMWARE
160 /* trustzone calls */
161 extern int exynos_do_idle(void);
162 extern int exynos_set_cpu_boot_addr(int cpu, vaddr_t boot_addr);
163 extern int exynos_cpu_boot(int cpu);
164 extern int exynos_l2cc_init(void);
165 #endif
166
167 #endif /* _ARM_SAMSUNG_EXYNOS_VAR_H_ */
168