mct_reg.h revision 1.1.10.3
1 1.1.10.3 jdolecek /* $NetBSD: mct_reg.h,v 1.1.10.3 2017/12/03 11:35:56 jdolecek Exp $ */ 2 1.1.10.3 jdolecek 3 1.1.10.2 tls /*- 4 1.1.10.2 tls * Copyright (c) 2014 The NetBSD Foundation, Inc. 5 1.1.10.2 tls * All rights reserved. 6 1.1.10.2 tls * 7 1.1.10.2 tls * This code is derived from software contributed to The NetBSD Foundation 8 1.1.10.2 tls * by Reinoud Zandijk. 9 1.1.10.2 tls * 10 1.1.10.2 tls * Redistribution and use in source and binary forms, with or without 11 1.1.10.2 tls * modification, are permitted provided that the following conditions 12 1.1.10.2 tls * are met: 13 1.1.10.2 tls * 1. Redistributions of source code must retain the above copyright 14 1.1.10.2 tls * notice, this list of conditions and the following disclaimer. 15 1.1.10.2 tls * 2. Redistributions in binary form must reproduce the above copyright 16 1.1.10.2 tls * notice, this list of conditions and the following disclaimer in the 17 1.1.10.2 tls * documentation and/or other materials provided with the distribution. 18 1.1.10.2 tls * 19 1.1.10.2 tls * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1.10.2 tls * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1.10.2 tls * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1.10.2 tls * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1.10.2 tls * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1.10.2 tls * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1.10.2 tls * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1.10.2 tls * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1.10.2 tls * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1.10.2 tls * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1.10.2 tls * POSSIBILITY OF SUCH DAMAGE. 30 1.1.10.2 tls */ 31 1.1.10.2 tls 32 1.1.10.2 tls #ifndef _ARM_SAMSUNG_MCT_REG_H_ 33 1.1.10.2 tls #define _ARM_SAMSUNG_MCT_REG_H_ 34 1.1.10.2 tls 35 1.1.10.2 tls /* global timer register offsets */ 36 1.1.10.2 tls #define MCT_G_CNT_L 0x100 /* lower bits */ 37 1.1.10.2 tls #define MCT_G_CNT_U 0x104 /* higher bits */ 38 1.1.10.2 tls #define MCT_G_CNT_WSTAT 0x110 /* wait for write OK cntr */ 39 1.1.10.2 tls #define G_CNT_WSTAT_L __BIT(0) 40 1.1.10.2 tls #define G_CNT_WSTAT_U __BIT(1) 41 1.1.10.2 tls 42 1.1.10.2 tls #define MCT_G_COMP0_L 0x200 /* compare0 lower bits */ 43 1.1.10.2 tls #define MCT_G_COMP0_U 0x204 /* compare0 higher bits */ 44 1.1.10.2 tls #define MCT_G_COMP0_ADD_INCR 0x208 /* compare0 auto add value */ 45 1.1.10.2 tls #define MCT_G_TCON 0x240 /* configuration register */ 46 1.1.10.2 tls #define G_TCON_COMP0_ENABLE __BIT(0) 47 1.1.10.2 tls #define G_TCON_COMP0_AUTOINC __BIT(1) 48 1.1.10.2 tls #define G_TCON_START __BIT(8) 49 1.1.10.2 tls #define MCT_G_INT_CSTAT 0x244 /* clear interrupt */ 50 1.1.10.2 tls #define G_INT_CSTAT_CLEAR __BIT(0) 51 1.1.10.2 tls #define MCT_G_INT_ENB 0x248 /* enable interrupts */ 52 1.1.10.2 tls #define G_INT_ENB_ENABLE __BIT(0) 53 1.1.10.2 tls #define MCT_G_WSTAT 0x24C /* wait for write OK */ 54 1.1.10.2 tls #define G_WSTAT_COMP0_L __BIT(0) 55 1.1.10.2 tls #define G_WSTAT_COMP0_U __BIT(1) 56 1.1.10.2 tls #define G_WSTAT_ADD_INCR __BIT(2) 57 1.1.10.2 tls #define G_WSTAT_TCON __BIT(16) 58 1.1.10.2 tls 59 1.1.10.2 tls /* local cpu-bound timers */ 60 1.1.10.2 tls #define MCT_L_OFFSET(x) (0x300 + (0x100 * x)) 61 1.1.10.2 tls #define MCT_L_MASK 0xffffff00 62 1.1.10.2 tls 63 1.1.10.2 tls #define MCT_L_TCNTB 0x00 /* TODO: what */ 64 1.1.10.2 tls #define MCT_L_ICNTB 0x08 /* interrupt count buffer */ 65 1.1.10.2 tls #define L_INCTB_UPDATE(x) (__BIT(31) | (x)) 66 1.1.10.2 tls #define MCT_L_TCON 0x20 /* configuration register */ 67 1.1.10.2 tls #define L_TCON_TIMER_START __BIT(0) 68 1.1.10.2 tls #define L_TCON_INT_START __BIT(1) 69 1.1.10.2 tls #define L_TCON_INTERVAL_MODE __BIT(2) 70 1.1.10.2 tls #define MCT_L_INC_CSTAT 0x30 71 1.1.10.2 tls #define L_INC_CSTAT_CLEAR __BIT(0) 72 1.1.10.2 tls #define MCT_L_INT_ENB 0x34 73 1.1.10.2 tls #define L_INT_ENB_ENABLE __BIT(0) 74 1.1.10.2 tls #define MCT_L_WSTAT 0x40 75 1.1.10.2 tls #define L_WSTAT_L_TCNTB __BIT(0) 76 1.1.10.2 tls #define L_WSTAT_L_ICNTB __BIT(1) 77 1.1.10.2 tls #define L_WSTAT_L_TCON __BIT(3) 78 1.1.10.2 tls 79 1.1.10.2 tls #endif /* _ARM_SAMSUNG_MCT_REG_H_ */ 80 1.1.10.2 tls 81
Indexes created Thu Oct 30 16:09:53 GMT 2025