Home | History | Annotate | Line # | Download | only in sunxi
sun4i_a10_gpio.c revision 1.2.4.1
      1  1.2.4.1  pgoyette /* $NetBSD: sun4i_a10_gpio.c,v 1.2.4.1 2018/04/07 04:12:12 pgoyette Exp $ */
      2      1.1  jmcneill 
      3      1.1  jmcneill /*-
      4      1.1  jmcneill  * Copyright (c) 2016 Emmanuel Vadot <manu (at) freebsd.org>
      5      1.1  jmcneill  * All rights reserved.
      6      1.1  jmcneill  *
      7      1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8      1.1  jmcneill  * modification, are permitted provided that the following conditions
      9      1.1  jmcneill  * are met:
     10      1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11      1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12      1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13      1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14      1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15      1.1  jmcneill  *
     16      1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     17      1.1  jmcneill  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     18      1.1  jmcneill  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     19      1.1  jmcneill  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     20      1.1  jmcneill  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21      1.1  jmcneill  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     22      1.1  jmcneill  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23      1.1  jmcneill  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     24      1.1  jmcneill  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25      1.1  jmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26      1.1  jmcneill  * SUCH DAMAGE.
     27      1.1  jmcneill  *
     28      1.1  jmcneill  */
     29      1.1  jmcneill 
     30      1.1  jmcneill #include <sys/cdefs.h>
     31  1.2.4.1  pgoyette __KERNEL_RCSID(0, "$NetBSD: sun4i_a10_gpio.c,v 1.2.4.1 2018/04/07 04:12:12 pgoyette Exp $");
     32      1.1  jmcneill 
     33      1.1  jmcneill #include <sys/param.h>
     34      1.1  jmcneill #include <sys/systm.h>
     35      1.1  jmcneill #include <sys/kernel.h>
     36      1.1  jmcneill #include <sys/types.h>
     37      1.1  jmcneill 
     38      1.1  jmcneill #include <arm/sunxi/sunxi_gpio.h>
     39      1.1  jmcneill 
     40      1.1  jmcneill static const struct sunxi_gpio_pins a10_pins[] = {
     41      1.1  jmcneill 	{"PA0",  0, 0,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", NULL, NULL, NULL}},
     42      1.1  jmcneill 	{"PA1",  0, 1,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", NULL, NULL, NULL}},
     43      1.1  jmcneill 	{"PA2",  0, 2,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", NULL, NULL, NULL}},
     44      1.1  jmcneill 	{"PA3",  0, 3,  {"gpio_in", "gpio_out", "emac", "spi1", "uart2", NULL, NULL, NULL}},
     45      1.1  jmcneill 	{"PA4",  0, 4,  {"gpio_in", "gpio_out", "emac", "spi1", NULL, NULL, NULL, NULL}},
     46      1.1  jmcneill 	{"PA5",  0, 5,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, NULL, NULL, NULL}},
     47      1.1  jmcneill 	{"PA6",  0, 6,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, NULL, NULL, NULL}},
     48      1.1  jmcneill 	{"PA7",  0, 7,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, NULL, NULL, NULL}},
     49      1.1  jmcneill 	{"PA8",  0, 8,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, NULL, NULL, NULL}},
     50      1.1  jmcneill 	{"PA9",  0, 9,  {"gpio_in", "gpio_out", "emac", "spi3", NULL, NULL, NULL, NULL}},
     51      1.1  jmcneill 	{"PA10", 0, 10, {"gpio_in", "gpio_out", "emac", NULL, "uart1", NULL, NULL, NULL}},
     52      1.1  jmcneill 	{"PA11", 0, 11, {"gpio_in", "gpio_out", "emac", NULL, "uart1", NULL, NULL, NULL}},
     53      1.1  jmcneill 	{"PA12", 0, 12, {"gpio_in", "gpio_out", "emac", "uart6", "uart1", NULL, NULL, NULL}},
     54      1.1  jmcneill 	{"PA13", 0, 13, {"gpio_in", "gpio_out", "emac", "uart6", "uart1", NULL, NULL, NULL}},
     55      1.1  jmcneill 	{"PA14", 0, 14, {"gpio_in", "gpio_out", "emac", "uart7", "uart1", NULL, NULL, NULL}},
     56      1.1  jmcneill 	{"PA15", 0, 15, {"gpio_in", "gpio_out", "emac", "uart7", "uart1", NULL, NULL, NULL}},
     57      1.2  jmcneill 	{"PA16", 0, 16, {"gpio_in", "gpio_out", "emac", "can", "uart1", NULL, NULL, NULL}},
     58      1.2  jmcneill 	{"PA17", 0, 17, {"gpio_in", "gpio_out", "emac", "can", "uart1", NULL, NULL, NULL}},
     59      1.1  jmcneill 
     60      1.1  jmcneill 	{"PB0",  1, 0,  {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}},
     61      1.1  jmcneill 	{"PB1",  1, 1,  {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}},
     62      1.1  jmcneill 	{"PB2",  1, 2,  {"gpio_in", "gpio_out", "pwm", NULL, NULL, NULL, NULL, NULL}},
     63      1.1  jmcneill 	{"PB3",  1, 3,  {"gpio_in", "gpio_out", "ir0", NULL, NULL, NULL, NULL, NULL}},
     64      1.1  jmcneill 	{"PB4",  1, 4,  {"gpio_in", "gpio_out", "ir0", NULL, NULL, NULL, NULL, NULL}},
     65      1.1  jmcneill 	{"PB5",  1, 5,  {"gpio_in", "gpio_out", "i2s", "ac97", NULL, NULL, NULL, NULL}},
     66      1.1  jmcneill 	{"PB6",  1, 6,  {"gpio_in", "gpio_out", "i2s", "ac97", NULL, NULL, NULL, NULL}},
     67      1.1  jmcneill 	{"PB7",  1, 7,  {"gpio_in", "gpio_out", "i2s", "ac97", NULL, NULL, NULL, NULL}},
     68      1.1  jmcneill 	{"PB8",  1, 8,  {"gpio_in", "gpio_out", "i2s", "ac97", NULL, NULL, NULL, NULL}},
     69      1.1  jmcneill 	{"PB9",  1, 9,  {"gpio_in", "gpio_out", "i2s", NULL, NULL, NULL, NULL, NULL}},
     70      1.1  jmcneill 	{"PB10", 1, 10, {"gpio_in", "gpio_out", "i2s", NULL, NULL, NULL, NULL, NULL}},
     71      1.1  jmcneill 	{"PB11", 1, 11, {"gpio_in", "gpio_out", "i2s", NULL, NULL, NULL, NULL, NULL}},
     72      1.1  jmcneill 	{"PB12", 1, 12, {"gpio_in", "gpio_out", "i2s", "ac97", NULL, NULL, NULL, NULL}},
     73      1.1  jmcneill 	{"PB13", 1, 13, {"gpio_in", "gpio_out", "spi2", NULL, NULL, NULL, NULL, NULL}},
     74      1.1  jmcneill 	{"PB14", 1, 14, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
     75      1.1  jmcneill 	{"PB15", 1, 15, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
     76      1.1  jmcneill 	{"PB16", 1, 16, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
     77      1.1  jmcneill 	{"PB17", 1, 17, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
     78      1.1  jmcneill 	{"PB18", 1, 18, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
     79      1.1  jmcneill 	{"PB19", 1, 19, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
     80      1.1  jmcneill 	{"PB20", 1, 20, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
     81      1.1  jmcneill 	{"PB21", 1, 21, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
     82      1.1  jmcneill 	{"PB22", 1, 22, {"gpio_in", "gpio_out", "uart0", "ir1", NULL, NULL, NULL, NULL}},
     83      1.1  jmcneill 	{"PB23", 1, 23, {"gpio_in", "gpio_out", "uart0", "ir1", NULL, NULL, NULL, NULL}},
     84      1.1  jmcneill 
     85      1.1  jmcneill 	{"PC0",  2,  0, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
     86      1.1  jmcneill 	{"PC1",  2,  1, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
     87      1.1  jmcneill 	{"PC2",  2,  2, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}},
     88      1.1  jmcneill 	{"PC3",  2,  3, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
     89      1.1  jmcneill 	{"PC4",  2,  4, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
     90      1.1  jmcneill 	{"PC5",  2,  5, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
     91      1.1  jmcneill 	{"PC6",  2,  6, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
     92      1.1  jmcneill 	{"PC7",  2,  7, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
     93      1.1  jmcneill 	{"PC8",  2,  8, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
     94      1.1  jmcneill 	{"PC9",  2,  9, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
     95      1.1  jmcneill 	{"PC10", 2, 10, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
     96      1.1  jmcneill 	{"PC11", 2, 11, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}},
     97      1.1  jmcneill 	{"PC12", 2, 12, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
     98      1.1  jmcneill 	{"PC13", 2, 13, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
     99      1.1  jmcneill 	{"PC14", 2, 14, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
    100      1.1  jmcneill 	{"PC15", 2, 15, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
    101      1.1  jmcneill 	{"PC16", 2, 16, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
    102      1.1  jmcneill 	{"PC17", 2, 17, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
    103      1.1  jmcneill 	{"PC18", 2, 18, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
    104      1.1  jmcneill 	{"PC19", 2, 19, {"gpio_in", "gpio_out", "nand", "spi2", NULL, NULL, NULL, NULL}},
    105      1.1  jmcneill 	{"PC20", 2, 20, {"gpio_in", "gpio_out", "nand", "spi2", NULL, NULL, NULL, NULL}},
    106      1.1  jmcneill 	{"PC21", 2, 21, {"gpio_in", "gpio_out", "nand", "spi2", NULL, NULL, NULL, NULL}},
    107      1.1  jmcneill 	{"PC22", 2, 22, {"gpio_in", "gpio_out", "nand", "spi2", NULL, NULL, NULL, NULL}},
    108      1.1  jmcneill 	{"PC23", 2, 23, {"gpio_in", "gpio_out", "spi0", NULL, NULL, NULL, NULL, NULL}},
    109      1.1  jmcneill 	{"PC24", 2, 24, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}},
    110      1.1  jmcneill 
    111      1.1  jmcneill 	{"PD0",  3,  0, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
    112      1.1  jmcneill 	{"PD1",  3,  1, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
    113      1.1  jmcneill 	{"PD2",  3,  2, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
    114      1.1  jmcneill 	{"PD3",  3,  3, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
    115      1.1  jmcneill 	{"PD4",  3,  4, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
    116      1.1  jmcneill 	{"PD5",  3,  5, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
    117      1.1  jmcneill 	{"PD6",  3,  6, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
    118      1.1  jmcneill 	{"PD7",  3,  7, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
    119      1.1  jmcneill 	{"PD8",  3,  8, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
    120      1.1  jmcneill 	{"PD9",  3,  9, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}},
    121      1.1  jmcneill 	{"PD10", 3, 10, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
    122      1.1  jmcneill 	{"PD11", 3, 11, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
    123      1.1  jmcneill 	{"PD12", 3, 12, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
    124      1.1  jmcneill 	{"PD13", 3, 13, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
    125      1.1  jmcneill 	{"PD14", 3, 14, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
    126      1.1  jmcneill 	{"PD15", 3, 15, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
    127      1.1  jmcneill 	{"PD16", 3, 16, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
    128      1.1  jmcneill 	{"PD17", 3, 17, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
    129      1.1  jmcneill 	{"PD18", 3, 18, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
    130      1.1  jmcneill 	{"PD19", 3, 19, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}},
    131      1.1  jmcneill 	{"PD20", 3, 20, {"gpio_in", "gpio_out", "lcd0", "csi1", NULL, NULL, NULL, NULL}},
    132      1.1  jmcneill 	{"PD21", 3, 21, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
    133      1.1  jmcneill 	{"PD22", 3, 22, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
    134      1.1  jmcneill 	{"PD23", 3, 23, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
    135      1.1  jmcneill 	{"PD24", 3, 24, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
    136      1.1  jmcneill 	{"PD25", 3, 25, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
    137      1.1  jmcneill 	{"PD26", 3, 26, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
    138      1.1  jmcneill 	{"PD27", 3, 27, {"gpio_in", "gpio_out", "lcd0", "sim", NULL, NULL, NULL, NULL}},
    139      1.1  jmcneill 
    140      1.1  jmcneill 	{"PE0",  4,  0, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
    141      1.1  jmcneill 	{"PE1",  4,  1, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
    142      1.1  jmcneill 	{"PE2",  4,  2, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
    143      1.1  jmcneill 	{"PE3",  4,  3, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
    144      1.1  jmcneill 	{"PE4",  4,  4, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
    145      1.1  jmcneill 	{"PE5",  4,  5, {"gpio_in", "gpio_out", "ts0", "csi0", "sim", NULL, NULL, NULL}},
    146      1.1  jmcneill 	{"PE6",  4,  6, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
    147      1.1  jmcneill 	{"PE7",  4,  7, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
    148      1.1  jmcneill 	{"PE8",  4,  8, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
    149      1.1  jmcneill 	{"PE9",  4,  9, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
    150      1.1  jmcneill 	{"PE10", 4, 10, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
    151      1.1  jmcneill 	{"PE11", 4, 11, {"gpio_in", "gpio_out", "ts0", "csi0", NULL, NULL, NULL, NULL}},
    152      1.1  jmcneill 
    153      1.1  jmcneill 	{"PF0",  5,  0, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
    154      1.1  jmcneill 	{"PF1",  5,  1, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
    155      1.1  jmcneill 	{"PF2",  5,  2, {"gpio_in", "gpio_out", "mmc0", NULL, "uart0", NULL, NULL, NULL}},
    156      1.1  jmcneill 	{"PF3",  5,  3, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
    157      1.1  jmcneill 	{"PF4",  5,  4, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
    158      1.1  jmcneill 	{"PF5",  5,  5, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}},
    159      1.1  jmcneill 
    160      1.1  jmcneill 	{"PG0",  6,  0, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
    161      1.1  jmcneill 	{"PG1",  6,  1, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
    162      1.1  jmcneill 	{"PG2",  6,  2, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
    163      1.1  jmcneill 	{"PG3",  6,  3, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", NULL, NULL, NULL}},
    164      1.1  jmcneill 	{"PG4",  6,  4, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", "csi0", NULL, NULL}},
    165      1.1  jmcneill 	{"PG5",  6,  5, {"gpio_in", "gpio_out", "ts1", "csi1", "mmc1", "csi0", NULL, NULL}},
    166      1.1  jmcneill 	{"PG6",  6,  6, {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
    167      1.1  jmcneill 	{"PG7",  6,  7, {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
    168      1.1  jmcneill 	{"PG8",  6,  8, {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
    169      1.1  jmcneill 	{"PG9",  6,  9, {"gpio_in", "gpio_out", "ts1", "csi1", "uart3", "csi0", NULL, NULL}},
    170      1.1  jmcneill 	{"PG10", 6, 10, {"gpio_in", "gpio_out", "ts1", "csi1", "uart4", "csi0", NULL, NULL}},
    171      1.1  jmcneill 	{"PG11", 6, 11, {"gpio_in", "gpio_out", "ts1", "csi1", "uart4", "csi0", NULL, NULL}},
    172      1.1  jmcneill 
    173  1.2.4.1  pgoyette 	{"PH0",  7,  0, {"gpio_in", "gpio_out", "lcd1", "pata", "uart3", NULL, "irq", "csi1"}, 6, 0},
    174  1.2.4.1  pgoyette 	{"PH1",  7,  1, {"gpio_in", "gpio_out", "lcd1", "pata", "uart3", NULL, "irq", "csi1"}, 6, 1},
    175  1.2.4.1  pgoyette 	{"PH2",  7,  2, {"gpio_in", "gpio_out", "lcd1", "pata", "uart3", NULL, "irq", "csi1"}, 6, 2},
    176  1.2.4.1  pgoyette 	{"PH3",  7,  3, {"gpio_in", "gpio_out", "lcd1", "pata", "uart3", NULL, "irq", "csi1"}, 6, 3},
    177  1.2.4.1  pgoyette 	{"PH4",  7,  4, {"gpio_in", "gpio_out", "lcd1", "pata", "uart4", NULL, "irq", "csi1"}, 6, 4},
    178  1.2.4.1  pgoyette 	{"PH5",  7,  5, {"gpio_in", "gpio_out", "lcd1", "pata", "uart4", NULL, "irq", "csi1"}, 6, 5},
    179  1.2.4.1  pgoyette 	{"PH6",  7,  6, {"gpio_in", "gpio_out", "lcd1", "pata", "uart5", "ms", "irq", "csi1"}, 6, 6},
    180  1.2.4.1  pgoyette 	{"PH7",  7,  7, {"gpio_in", "gpio_out", "lcd1", "pata", "uart5", "ms", "irq", "csi1"}, 6, 7},
    181  1.2.4.1  pgoyette 	{"PH8",  7,  8, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "ms", "irq", "csi1"}, 6, 8},
    182  1.2.4.1  pgoyette 	{"PH9",  7,  9, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "ms", "irq", "csi1"}, 6, 9},
    183  1.2.4.1  pgoyette 	{"PH10", 7, 10, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "ms", "irq", "csi1"}, 6, 10},
    184  1.2.4.1  pgoyette 	{"PH11", 7, 11, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "ms", "irq", "csi1"}, 6, 11},
    185  1.2.4.1  pgoyette 	{"PH12", 7, 12, {"gpio_in", "gpio_out", "lcd1", "pata", "ps2", NULL, "irq", "csi1"}, 6, 12},
    186  1.2.4.1  pgoyette 	{"PH13", 7, 13, {"gpio_in", "gpio_out", "lcd1", "pata", "ps2", "sim", "irq", "csi1"}, 6, 13},
    187  1.2.4.1  pgoyette 	{"PH14", 7, 14, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "sim", "irq", "csi1"}, 6, 14},
    188  1.2.4.1  pgoyette 	{"PH15", 7, 15, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "sim", "irq", "csi1"}, 6, 15},
    189  1.2.4.1  pgoyette 	{"PH16", 7, 16, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", NULL, "irq", "csi1"}, 6, 16},
    190  1.2.4.1  pgoyette 	{"PH17", 7, 17, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "sim", "irq", "csi1"}, 6, 17},
    191  1.2.4.1  pgoyette 	{"PH18", 7, 18, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "sim", "irq", "csi1"}, 6, 18},
    192  1.2.4.1  pgoyette 	{"PH19", 7, 19, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "sim", "irq", "csi1"}, 6, 19},
    193  1.2.4.1  pgoyette 	{"PH20", 7, 20, {"gpio_in", "gpio_out", "lcd1", "pata", "can", NULL, "irq", "csi1"}, 6, 20},
    194  1.2.4.1  pgoyette 	{"PH21", 7, 21, {"gpio_in", "gpio_out", "lcd1", "pata", "can", NULL, "irq", "csi1"}, 6, 21},
    195      1.1  jmcneill 	{"PH22", 7, 22, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
    196      1.1  jmcneill 	{"PH23", 7, 23, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
    197      1.1  jmcneill 	{"PH24", 7, 24, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
    198      1.1  jmcneill 	{"PH25", 7, 25, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
    199      1.1  jmcneill 	{"PH26", 7, 26, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
    200      1.1  jmcneill 	{"PH27", 7, 27, {"gpio_in", "gpio_out", "lcd1", "pata", "keypad", "mmc1", NULL, "csi1"}},
    201      1.1  jmcneill 
    202      1.1  jmcneill 	{"PI0",  8,  0, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}},
    203      1.1  jmcneill 	{"PI1",  8,  1, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}},
    204      1.1  jmcneill 	{"PI2",  8,  2, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}},
    205      1.1  jmcneill 	{"PI3",  8,  3, {"gpio_in", "gpio_out", "pwm", NULL, NULL, NULL, NULL, NULL}},
    206      1.1  jmcneill 	{"PI4",  8,  4, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
    207      1.1  jmcneill 	{"PI5",  8,  5, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
    208      1.1  jmcneill 	{"PI6",  8,  6, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
    209      1.1  jmcneill 	{"PI7",  8,  7, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
    210      1.1  jmcneill 	{"PI8",  8,  8, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
    211      1.1  jmcneill 	{"PI9",  8,  9, {"gpio_in", "gpio_out", "mmc3", NULL, NULL, NULL, NULL, NULL}},
    212  1.2.4.1  pgoyette 	{"PI10", 8, 10, {"gpio_in", "gpio_out", "spi0", "uart5", NULL, NULL, "irq", NULL}, 6, 22},
    213  1.2.4.1  pgoyette 	{"PI11", 8, 11, {"gpio_in", "gpio_out", "spi0", "uart5", NULL, NULL, "irq", NULL}, 6, 23},
    214  1.2.4.1  pgoyette 	{"PI12", 8, 12, {"gpio_in", "gpio_out", "spi0", "uart6", NULL, NULL, "irq", NULL}, 6, 24},
    215  1.2.4.1  pgoyette 	{"PI13", 8, 13, {"gpio_in", "gpio_out", "spi0", "uart6", NULL, NULL, "irq", NULL}, 6, 25},
    216  1.2.4.1  pgoyette 	{"PI14", 8, 14, {"gpio_in", "gpio_out", "spi0", "ps2", "timer4", NULL, "irq", NULL}, 6, 26},
    217  1.2.4.1  pgoyette 	{"PI15", 8, 15, {"gpio_in", "gpio_out", "spi1", "ps2", "timer5", NULL, "irq", NULL}, 6, 27},
    218  1.2.4.1  pgoyette 	{"PI16", 8, 16, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "irq", NULL}, 6, 28},
    219  1.2.4.1  pgoyette 	{"PI17", 8, 17, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "irq", NULL}, 6, 29},
    220  1.2.4.1  pgoyette 	{"PI18", 8, 18, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "irq", NULL}, 6, 30},
    221  1.2.4.1  pgoyette 	{"PI19", 8, 19, {"gpio_in", "gpio_out", "spi1", "uart2", NULL, NULL, "irq", NULL}, 6, 31},
    222      1.1  jmcneill 	{"PI20", 8, 20, {"gpio_in", "gpio_out", "ps2", "uart7", "hdmi", NULL, NULL, NULL}},
    223      1.1  jmcneill 	{"PI21", 8, 21, {"gpio_in", "gpio_out", "ps2", "uart7", "hdmi", NULL, NULL, NULL}},
    224      1.1  jmcneill };
    225      1.1  jmcneill 
    226      1.1  jmcneill const struct sunxi_gpio_padconf sun4i_a10_padconf = {
    227      1.1  jmcneill 	.npins = __arraycount(a10_pins),
    228      1.1  jmcneill 	.pins = a10_pins,
    229      1.1  jmcneill };
    230