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      1  1.1  jmcneill /* $NetBSD: sun50i_a64_ccu.h,v 1.1 2017/09/07 01:07:04 jmcneill Exp $ */
      2  1.1  jmcneill 
      3  1.1  jmcneill /*-
      4  1.1  jmcneill  * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
      5  1.1  jmcneill  * All rights reserved.
      6  1.1  jmcneill  *
      7  1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8  1.1  jmcneill  * modification, are permitted provided that the following conditions
      9  1.1  jmcneill  * are met:
     10  1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12  1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15  1.1  jmcneill  *
     16  1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  1.1  jmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  1.1  jmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  1.1  jmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  1.1  jmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  1.1  jmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  1.1  jmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  1.1  jmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  1.1  jmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  1.1  jmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  1.1  jmcneill  * SUCH DAMAGE.
     27  1.1  jmcneill  */
     28  1.1  jmcneill 
     29  1.1  jmcneill #ifndef _SUN50I_A64_CCU_H
     30  1.1  jmcneill #define _SUN50I_A64_CCU_H
     31  1.1  jmcneill 
     32  1.1  jmcneill #define	A64_RST_USB_PHY0		0
     33  1.1  jmcneill #define	A64_RST_USB_PHY1		1
     34  1.1  jmcneill #define	A64_RST_USB_HSIC		2
     35  1.1  jmcneill #define	A64_RST_DRAM			3
     36  1.1  jmcneill #define	A64_RST_MBUS			4
     37  1.1  jmcneill #define	A64_RST_BUS_MIPI_DSI		5
     38  1.1  jmcneill #define	A64_RST_BUS_CE			6
     39  1.1  jmcneill #define	A64_RST_BUS_DMA			7
     40  1.1  jmcneill #define	A64_RST_BUS_MMC0		8
     41  1.1  jmcneill #define	A64_RST_BUS_MMC1		9
     42  1.1  jmcneill #define	A64_RST_BUS_MMC2		10
     43  1.1  jmcneill #define	A64_RST_BUS_NAND		11
     44  1.1  jmcneill #define	A64_RST_BUS_DRAM		12
     45  1.1  jmcneill #define	A64_RST_BUS_EMAC		13
     46  1.1  jmcneill #define	A64_RST_BUS_TS			14
     47  1.1  jmcneill #define	A64_RST_BUS_HSTIMER		15
     48  1.1  jmcneill #define	A64_RST_BUS_SPI0		16
     49  1.1  jmcneill #define	A64_RST_BUS_SPI1		17
     50  1.1  jmcneill #define	A64_RST_BUS_OTG			18
     51  1.1  jmcneill #define	A64_RST_BUS_EHCI0		19
     52  1.1  jmcneill #define	A64_RST_BUS_EHCI1		20
     53  1.1  jmcneill #define	A64_RST_BUS_OHCI0		21
     54  1.1  jmcneill #define	A64_RST_BUS_OHCI1		22
     55  1.1  jmcneill #define	A64_RST_BUS_VE			23
     56  1.1  jmcneill #define	A64_RST_BUS_TCON0		24
     57  1.1  jmcneill #define	A64_RST_BUS_TCON1		25
     58  1.1  jmcneill #define	A64_RST_BUS_DEINTERLACE		26
     59  1.1  jmcneill #define	A64_RST_BUS_CSI			27
     60  1.1  jmcneill #define	A64_RST_BUS_HDMI0		28
     61  1.1  jmcneill #define	A64_RST_BUS_HDMI1		29
     62  1.1  jmcneill #define	A64_RST_BUS_DE			30
     63  1.1  jmcneill #define	A64_RST_BUS_GPU			31
     64  1.1  jmcneill #define	A64_RST_BUS_MSGBOX		32
     65  1.1  jmcneill #define	A64_RST_BUS_SPINLOCK		33
     66  1.1  jmcneill #define	A64_RST_BUS_DBG			34
     67  1.1  jmcneill #define	A64_RST_BUS_LVDS		35
     68  1.1  jmcneill #define	A64_RST_BUS_CODEC		36
     69  1.1  jmcneill #define	A64_RST_BUS_SPDIF		37
     70  1.1  jmcneill #define	A64_RST_BUS_THS			38
     71  1.1  jmcneill #define	A64_RST_BUS_I2S0		39
     72  1.1  jmcneill #define	A64_RST_BUS_I2S1		40
     73  1.1  jmcneill #define	A64_RST_BUS_I2S2		41
     74  1.1  jmcneill #define	A64_RST_BUS_I2C0		42
     75  1.1  jmcneill #define	A64_RST_BUS_I2C1		43
     76  1.1  jmcneill #define	A64_RST_BUS_I2C2		44
     77  1.1  jmcneill #define	A64_RST_BUS_SCR			45
     78  1.1  jmcneill #define	A64_RST_BUS_UART0		46
     79  1.1  jmcneill #define	A64_RST_BUS_UART1		47
     80  1.1  jmcneill #define	A64_RST_BUS_UART2		48
     81  1.1  jmcneill #define	A64_RST_BUS_UART3		49
     82  1.1  jmcneill #define	A64_RST_BUS_UART4		50
     83  1.1  jmcneill 
     84  1.1  jmcneill #define	A64_CLK_OSC_12M			0
     85  1.1  jmcneill #define	A64_CLK_PLL_CPUX		1
     86  1.1  jmcneill #define	A64_CLK_PLL_AUDIO_BASE		2
     87  1.1  jmcneill #define	A64_CLK_PLL_AUDIO		3
     88  1.1  jmcneill #define	A64_CLK_PLL_AUDIO_2X		4
     89  1.1  jmcneill #define	A64_CLK_PLL_AUDIO_4X		5
     90  1.1  jmcneill #define	A64_CLK_PLL_AUDIO_8X		6
     91  1.1  jmcneill #define	A64_CLK_PLL_VIDEO0		7
     92  1.1  jmcneill #define	A64_CLK_PLL_VIDEO0_2X		8
     93  1.1  jmcneill #define	A64_CLK_PLL_VE			9
     94  1.1  jmcneill #define	A64_CLK_PLL_DDR0		10
     95  1.1  jmcneill #define	A64_CLK_PLL_PERIPH0		11
     96  1.1  jmcneill #define	A64_CLK_PLL_PERIPH0_2X		12
     97  1.1  jmcneill #define	A64_CLK_PLL_PERIPH1		13
     98  1.1  jmcneill #define	A64_CLK_PLL_PERIPH1_2X		14
     99  1.1  jmcneill #define	A64_CLK_PLL_VIDEO1		15
    100  1.1  jmcneill #define	A64_CLK_PLL_GPU			16
    101  1.1  jmcneill #define	A64_CLK_PLL_MIPI		17
    102  1.1  jmcneill #define	A64_CLK_PLL_HSIC		18
    103  1.1  jmcneill #define	A64_CLK_PLL_DE			19
    104  1.1  jmcneill #define	A64_CLK_PLL_DDR1		20
    105  1.1  jmcneill #define	A64_CLK_CPUX			21
    106  1.1  jmcneill #define	A64_CLK_AXI			22
    107  1.1  jmcneill #define	A64_CLK_APB			23
    108  1.1  jmcneill #define	A64_CLK_AHB1			24
    109  1.1  jmcneill #define	A64_CLK_APB1			25
    110  1.1  jmcneill #define	A64_CLK_APB2			26
    111  1.1  jmcneill #define	A64_CLK_AHB2			27
    112  1.1  jmcneill #define	A64_CLK_BUS_MIPI_DSI		28
    113  1.1  jmcneill #define	A64_CLK_BUS_CE			29
    114  1.1  jmcneill #define	A64_CLK_BUS_DMA			30
    115  1.1  jmcneill #define	A64_CLK_BUS_MMC0		31
    116  1.1  jmcneill #define	A64_CLK_BUS_MMC1		32
    117  1.1  jmcneill #define	A64_CLK_BUS_MMC2		33
    118  1.1  jmcneill #define	A64_CLK_BUS_NAND		34
    119  1.1  jmcneill #define	A64_CLK_BUS_DRAM		35
    120  1.1  jmcneill #define	A64_CLK_BUS_EMAC		36
    121  1.1  jmcneill #define	A64_CLK_BUS_TS			37
    122  1.1  jmcneill #define	A64_CLK_BUS_HSTIMER		38
    123  1.1  jmcneill #define	A64_CLK_BUS_SPI0		39
    124  1.1  jmcneill #define	A64_CLK_BUS_SPI1		40
    125  1.1  jmcneill #define	A64_CLK_BUS_OTG			41
    126  1.1  jmcneill #define	A64_CLK_BUS_EHCI0		42
    127  1.1  jmcneill #define	A64_CLK_BUS_EHCI1		43
    128  1.1  jmcneill #define	A64_CLK_BUS_OHCI0		44
    129  1.1  jmcneill #define	A64_CLK_BUS_OHCI1		45
    130  1.1  jmcneill #define	A64_CLK_BUS_VE			46
    131  1.1  jmcneill #define	A64_CLK_BUS_TCON0		47
    132  1.1  jmcneill #define	A64_CLK_BUS_TCON1		48
    133  1.1  jmcneill #define	A64_CLK_BUS_DEINTERLACE		49
    134  1.1  jmcneill #define	A64_CLK_BUS_CSI			50
    135  1.1  jmcneill #define	A64_CLK_BUS_HDMI		51
    136  1.1  jmcneill #define	A64_CLK_BUS_DE			52
    137  1.1  jmcneill #define	A64_CLK_BUS_GPU			53
    138  1.1  jmcneill #define	A64_CLK_BUS_MSGBOX		54
    139  1.1  jmcneill #define	A64_CLK_BUS_SPINLOCK		55
    140  1.1  jmcneill #define	A64_CLK_BUS_CODEC		56
    141  1.1  jmcneill #define	A64_CLK_BUS_SPDIF		57
    142  1.1  jmcneill #define	A64_CLK_BUS_PIO			58
    143  1.1  jmcneill #define	A64_CLK_BUS_THS			59
    144  1.1  jmcneill #define	A64_CLK_BUS_I2S0		60
    145  1.1  jmcneill #define	A64_CLK_BUS_I2S1		61
    146  1.1  jmcneill #define	A64_CLK_BUS_I2S2		62
    147  1.1  jmcneill #define	A64_CLK_BUS_I2C0		63
    148  1.1  jmcneill #define	A64_CLK_BUS_I2C1		64
    149  1.1  jmcneill #define	A64_CLK_BUS_I2C2		65
    150  1.1  jmcneill #define	A64_CLK_BUS_SCR			66
    151  1.1  jmcneill #define	A64_CLK_BUS_UART0		67
    152  1.1  jmcneill #define	A64_CLK_BUS_UART1		68
    153  1.1  jmcneill #define	A64_CLK_BUS_UART2		69
    154  1.1  jmcneill #define	A64_CLK_BUS_UART3		70
    155  1.1  jmcneill #define	A64_CLK_BUS_UART4		71
    156  1.1  jmcneill #define	A64_CLK_BUS_DBG			72
    157  1.1  jmcneill #define	A64_CLK_THS			73
    158  1.1  jmcneill #define	A64_CLK_NAND			74
    159  1.1  jmcneill #define	A64_CLK_MMC0			75
    160  1.1  jmcneill #define	A64_CLK_MMC1			76
    161  1.1  jmcneill #define	A64_CLK_MMC2			77
    162  1.1  jmcneill #define	A64_CLK_TS			78
    163  1.1  jmcneill #define	A64_CLK_CE			79
    164  1.1  jmcneill #define	A64_CLK_SPI0			80
    165  1.1  jmcneill #define	A64_CLK_SPI1			81
    166  1.1  jmcneill #define	A64_CLK_I2S0			82
    167  1.1  jmcneill #define	A64_CLK_I2S1			83
    168  1.1  jmcneill #define	A64_CLK_I2S2			84
    169  1.1  jmcneill #define	A64_CLK_SPDIF			85
    170  1.1  jmcneill #define	A64_CLK_USB_PHY0		86
    171  1.1  jmcneill #define	A64_CLK_USB_PHY1		87
    172  1.1  jmcneill #define	A64_CLK_USB_HSIC		88
    173  1.1  jmcneill #define	A64_CLK_USB_HSIC_12M		89
    174  1.1  jmcneill #define	A64_CLK_USB_OHCI0_12M		90
    175  1.1  jmcneill #define	A64_CLK_USB_OHCI0		91
    176  1.1  jmcneill #define	A64_CLK_USB_OHCI1_12M		92
    177  1.1  jmcneill #define	A64_CLK_USB_OHCI1		93
    178  1.1  jmcneill #define	A64_CLK_DRAM			94
    179  1.1  jmcneill #define	A64_CLK_DRAM_VE			95
    180  1.1  jmcneill #define	A64_CLK_DRAM_CSI		96
    181  1.1  jmcneill #define	A64_CLK_DRAM_DEINTERLACE	97
    182  1.1  jmcneill #define	A64_CLK_DRAM_TS			98
    183  1.1  jmcneill #define	A64_CLK_DE			99
    184  1.1  jmcneill #define	A64_CLK_TCON0			100
    185  1.1  jmcneill #define	A64_CLK_TCON1			101
    186  1.1  jmcneill #define	A64_CLK_DEINTERLACE		102
    187  1.1  jmcneill #define	A64_CLK_CSI_MISC		103
    188  1.1  jmcneill #define	A64_CLK_CSI_SCLK		104
    189  1.1  jmcneill #define	A64_CLK_CSI_MCLK		105
    190  1.1  jmcneill #define	A64_CLK_VE			106
    191  1.1  jmcneill #define	A64_CLK_AC_DIG			107
    192  1.1  jmcneill #define	A64_CLK_AC_DIG_4X		108
    193  1.1  jmcneill #define	A64_CLK_AVS			109
    194  1.1  jmcneill #define	A64_CLK_HDMI			110
    195  1.1  jmcneill #define	A64_CLK_HDMI_DDC		111
    196  1.1  jmcneill #define	A64_CLK_MBUS			112
    197  1.1  jmcneill #define	A64_CLK_DSI_DPHY		113
    198  1.1  jmcneill #define	A64_CLK_GPU			114
    199  1.1  jmcneill 
    200  1.1  jmcneill #endif /* !_SUN50I_A64_CCU_H */
    201