sun5i_a13_gpio.c revision 1.2.2.2
1 1.2.2.2 skrll /* $NetBSD: sun5i_a13_gpio.c,v 1.2.2.2 2017/08/28 17:51:32 skrll Exp $ */ 2 1.2.2.2 skrll 3 1.2.2.2 skrll /*- 4 1.2.2.2 skrll * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 1.2.2.2 skrll * All rights reserved. 6 1.2.2.2 skrll * 7 1.2.2.2 skrll * Redistribution and use in source and binary forms, with or without 8 1.2.2.2 skrll * modification, are permitted provided that the following conditions 9 1.2.2.2 skrll * are met: 10 1.2.2.2 skrll * 1. Redistributions of source code must retain the above copyright 11 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer. 12 1.2.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer in the 14 1.2.2.2 skrll * documentation and/or other materials provided with the distribution. 15 1.2.2.2 skrll * 16 1.2.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.2.2.2 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.2.2.2 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.2.2.2 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.2.2.2 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.2.2.2 skrll * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.2.2.2 skrll * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.2.2.2 skrll * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.2.2.2 skrll * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.2.2.2 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.2.2.2 skrll * SUCH DAMAGE. 27 1.2.2.2 skrll * 28 1.2.2.2 skrll * $FreeBSD$ 29 1.2.2.2 skrll */ 30 1.2.2.2 skrll 31 1.2.2.2 skrll #include <sys/cdefs.h> 32 1.2.2.2 skrll __KERNEL_RCSID(0, "$NetBSD: sun5i_a13_gpio.c,v 1.2.2.2 2017/08/28 17:51:32 skrll Exp $"); 33 1.2.2.2 skrll 34 1.2.2.2 skrll #include <sys/param.h> 35 1.2.2.2 skrll #include <sys/systm.h> 36 1.2.2.2 skrll #include <sys/kernel.h> 37 1.2.2.2 skrll #include <sys/types.h> 38 1.2.2.2 skrll 39 1.2.2.2 skrll #include <arm/sunxi/sunxi_gpio.h> 40 1.2.2.2 skrll 41 1.2.2.2 skrll static const struct sunxi_gpio_pins a13_pins[] = { 42 1.2.2.2 skrll { "PB0", 1, 0, { "gpio_in", "gpio_out", "i2c0" } }, 43 1.2.2.2 skrll { "PB1", 1, 1, { "gpio_in", "gpio_out", "i2c0" } }, 44 1.2.2.2 skrll { "PB2", 1, 2, { "gpio_in", "gpio_out", "pwm", NULL, NULL, NULL, "eint" } }, 45 1.2.2.2 skrll { "PB3", 1, 3, { "gpio_in", "gpio_out", "ir0", NULL, NULL, NULL, "eint" } }, 46 1.2.2.2 skrll { "PB4", 1, 4, { "gpio_in", "gpio_out", "ir0", NULL, NULL, NULL, "eint" } }, 47 1.2.2.2 skrll { "PB10", 1, 10, { "gpio_in", "gpio_out", "spi2", NULL, NULL, NULL, "eint" } }, 48 1.2.2.2 skrll { "PB15", 1, 15, { "gpio_in", "gpio_out", "i2c1" } }, 49 1.2.2.2 skrll { "PB16", 1, 16, { "gpio_in", "gpio_out", "i2c1" } }, 50 1.2.2.2 skrll { "PB17", 1, 17, { "gpio_in", "gpio_out", "i2c2" } }, 51 1.2.2.2 skrll { "PB18", 1, 18, { "gpio_in", "gpio_out", "i2c2" } }, 52 1.2.2.2 skrll 53 1.2.2.2 skrll { "PC0", 2, 0, { "gpio_in", "gpio_out", "nand0", "spi0" } }, 54 1.2.2.2 skrll { "PC1", 2, 1, { "gpio_in", "gpio_out", "nand0", "spi0" } }, 55 1.2.2.2 skrll { "PC2", 2, 2, { "gpio_in", "gpio_out", "nand0", "spi0" } }, 56 1.2.2.2 skrll { "PC3", 2, 3, { "gpio_in", "gpio_out", "nand0", "spi0" } }, 57 1.2.2.2 skrll { "PC4", 2, 4, { "gpio_in", "gpio_out", "nand0" } }, 58 1.2.2.2 skrll { "PC5", 2, 5, { "gpio_in", "gpio_out", "nand0" } }, 59 1.2.2.2 skrll { "PC6", 2, 6, { "gpio_in", "gpio_out", "nand0", "mmc2" } }, 60 1.2.2.2 skrll { "PC7", 2, 7, { "gpio_in", "gpio_out", "nand0", "mmc2" } }, 61 1.2.2.2 skrll { "PC8", 2, 8, { "gpio_in", "gpio_out", "nand0", "mmc2" } }, 62 1.2.2.2 skrll { "PC9", 2, 9, { "gpio_in", "gpio_out", "nand0", "mmc2" } }, 63 1.2.2.2 skrll { "PC10", 2, 10, { "gpio_in", "gpio_out", "nand0", "mmc2" } }, 64 1.2.2.2 skrll { "PC11", 2, 11, { "gpio_in", "gpio_out", "nand0", "mmc2" } }, 65 1.2.2.2 skrll { "PC12", 2, 12, { "gpio_in", "gpio_out", "nand0", "mmc2" } }, 66 1.2.2.2 skrll { "PC13", 2, 13, { "gpio_in", "gpio_out", "nand0", "mmc2" } }, 67 1.2.2.2 skrll { "PC14", 2, 14, { "gpio_in", "gpio_out", "nand0", "mmc2" } }, 68 1.2.2.2 skrll { "PC15", 2, 15, { "gpio_in", "gpio_out", "nand0", "mmc2" } }, 69 1.2.2.2 skrll { "PC19", 2, 19, { "gpio_in", "gpio_out", "nand0" } }, 70 1.2.2.2 skrll 71 1.2.2.2 skrll { "PD2", 3, 2, { "gpio_in", "gpio_out", "lcd0", "uart2" } }, 72 1.2.2.2 skrll { "PD3", 3, 3, { "gpio_in", "gpio_out", "lcd0", "uart2" } }, 73 1.2.2.2 skrll { "PD4", 3, 4, { "gpio_in", "gpio_out", "lcd0", "uart2" } }, 74 1.2.2.2 skrll { "PD5", 3, 5, { "gpio_in", "gpio_out", "lcd0", "uart2" } }, 75 1.2.2.2 skrll { "PD6", 3, 6, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 76 1.2.2.2 skrll { "PD7", 3, 7, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 77 1.2.2.2 skrll { "PD10", 3, 10, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 78 1.2.2.2 skrll { "PD11", 3, 11, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 79 1.2.2.2 skrll { "PD12", 3, 12, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 80 1.2.2.2 skrll { "PD13", 3, 13, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 81 1.2.2.2 skrll { "PD14", 3, 14, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 82 1.2.2.2 skrll { "PD15", 3, 15, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 83 1.2.2.2 skrll { "PD18", 3, 18, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 84 1.2.2.2 skrll { "PD19", 3, 19, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 85 1.2.2.2 skrll { "PD20", 3, 20, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 86 1.2.2.2 skrll { "PD21", 3, 21, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 87 1.2.2.2 skrll { "PD22", 3, 22, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 88 1.2.2.2 skrll { "PD23", 3, 23, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 89 1.2.2.2 skrll { "PD24", 3, 24, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 90 1.2.2.2 skrll { "PD25", 3, 25, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 91 1.2.2.2 skrll { "PD26", 3, 26, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 92 1.2.2.2 skrll { "PD27", 3, 27, { "gpio_in", "gpio_out", "lcd0", "emac" } }, 93 1.2.2.2 skrll 94 1.2.2.2 skrll { "PE0", 4, 0, { "gpio_in", NULL, "ts0", "csi0", "spi2", NULL, "eint" } }, 95 1.2.2.2 skrll { "PE1", 4, 1, { "gpio_in", NULL, "ts0", "csi0", "spi2", NULL, "eint" } }, 96 1.2.2.2 skrll { "PE2", 4, 2, { "gpio_in", NULL, "ts0", "csi0", "spi2" } }, 97 1.2.2.2 skrll { "PE3", 4, 3, { "gpio_in", "gpio_out", "ts0", "csi0", "spi2" } }, 98 1.2.2.2 skrll { "PE4", 4, 4, { "gpio_in", "gpio_out", "ts0", "csi0", "mmc2" } }, 99 1.2.2.2 skrll { "PE5", 4, 5, { "gpio_in", "gpio_out", "ts0", "csi0", "mmc2" } }, 100 1.2.2.2 skrll { "PE6", 4, 6, { "gpio_in", "gpio_out", "ts0", "csi0", "mmc2" } }, 101 1.2.2.2 skrll { "PE7", 4, 7, { "gpio_in", "gpio_out", "ts0", "csi0", "mmc2" } }, 102 1.2.2.2 skrll { "PE8", 4, 8, { "gpio_in", "gpio_out", "ts0", "csi0", "mmc2" } }, 103 1.2.2.2 skrll { "PE9", 4, 9, { "gpio_in", "gpio_out", "ts0", "csi0", "mmc2" } }, 104 1.2.2.2 skrll { "PE10", 4, 10, { "gpio_in", "gpio_out", "ts0", "csi0", "uart1" } }, 105 1.2.2.2 skrll { "PE11", 4, 11, { "gpio_in", "gpio_out", "ts0", "csi0", "uart1" } }, 106 1.2.2.2 skrll 107 1.2.2.2 skrll { "PF0", 5, 0, { "gpio_in", "gpio_out", "mmc0", "jtag" } }, 108 1.2.2.2 skrll { "PF1", 5, 1, { "gpio_in", "gpio_out", "mmc0", "jtag" } }, 109 1.2.2.2 skrll { "PF2", 5, 2, { "gpio_in", "gpio_out", "mmc0", "uart0" } }, 110 1.2.2.2 skrll { "PF3", 5, 3, { "gpio_in", "gpio_out", "mmc0", "jtag" } }, 111 1.2.2.2 skrll { "PF4", 5, 4, { "gpio_in", "gpio_out", "mmc0", "uart0" } }, 112 1.2.2.2 skrll { "PF5", 5, 5, { "gpio_in", "gpio_out", "mmc0", "jtag" } }, 113 1.2.2.2 skrll 114 1.2.2.2 skrll { "PG0", 6, 0, { "gpio_in", NULL, "gps", NULL, NULL, NULL, "eint" } }, 115 1.2.2.2 skrll { "PG1", 6, 1, { "gpio_in", NULL, "gps", NULL, NULL, NULL, "eint" } }, 116 1.2.2.2 skrll { "PG2", 6, 2, { "gpio_in", NULL, "gps", NULL, NULL, NULL, "eint" } }, 117 1.2.2.2 skrll { "PG3", 6, 3, { "gpio_in", "gpio_out", NULL, NULL, "uart1", NULL, "eint" } }, 118 1.2.2.2 skrll { "PG4", 6, 4, { "gpio_in", "gpio_out", NULL, NULL, "uart1", NULL, "eint" } }, 119 1.2.2.2 skrll { "PG9", 6, 9, { "gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint" } }, 120 1.2.2.2 skrll { "PG10", 6, 10, { "gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint" } }, 121 1.2.2.2 skrll { "PG11", 6, 11, { "gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint" } }, 122 1.2.2.2 skrll { "PG12", 6, 12, { "gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "eint" } }, 123 1.2.2.2 skrll }; 124 1.2.2.2 skrll 125 1.2.2.2 skrll const struct sunxi_gpio_padconf sun5i_a13_padconf = { 126 1.2.2.2 skrll .npins = __arraycount(a13_pins), 127 1.2.2.2 skrll .pins = a13_pins, 128 1.2.2.2 skrll }; 129
Indexes created Sun Oct 19 02:09:48 GMT 2025