1 1.3 bouyer /* $NetBSD: sun6i_a31_gpio.c,v 1.3 2018/04/03 16:01:25 bouyer Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /*- 4 1.1 jmcneill * Copyright (c) 2016 Emmanuel Vadot <manu (at) freebsd.org> 5 1.1 jmcneill * All rights reserved. 6 1.1 jmcneill * 7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without 8 1.1 jmcneill * modification, are permitted provided that the following conditions 9 1.1 jmcneill * are met: 10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright 11 1.1 jmcneill * notice, this list of conditions and the following disclaimer. 12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the 14 1.1 jmcneill * documentation and/or other materials provided with the distribution. 15 1.1 jmcneill * 16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 1.1 jmcneill * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 1.1 jmcneill * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 1.1 jmcneill * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 1.1 jmcneill * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 1.1 jmcneill * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 1.1 jmcneill * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 1.1 jmcneill * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 1.1 jmcneill * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 jmcneill * SUCH DAMAGE. 27 1.1 jmcneill * 28 1.1 jmcneill */ 29 1.1 jmcneill 30 1.1 jmcneill #include <sys/cdefs.h> 31 1.3 bouyer __KERNEL_RCSID(0, "$NetBSD: sun6i_a31_gpio.c,v 1.3 2018/04/03 16:01:25 bouyer Exp $"); 32 1.1 jmcneill 33 1.1 jmcneill #include <sys/param.h> 34 1.1 jmcneill #include <sys/systm.h> 35 1.1 jmcneill #include <sys/kernel.h> 36 1.1 jmcneill #include <sys/types.h> 37 1.1 jmcneill 38 1.1 jmcneill #include <arm/sunxi/sunxi_gpio.h> 39 1.1 jmcneill 40 1.1 jmcneill static const struct sunxi_gpio_pins a31_pins[] = { 41 1.3 bouyer {"PA0", 0, 0, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 0}, 42 1.3 bouyer {"PA1", 0, 1, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 1}, 43 1.3 bouyer {"PA2", 0, 2, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 2}, 44 1.3 bouyer {"PA3", 0, 3, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 3}, 45 1.3 bouyer {"PA4", 0, 4, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 4}, 46 1.3 bouyer {"PA5", 0, 5, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 5}, 47 1.3 bouyer {"PA6", 0, 6, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 6}, 48 1.3 bouyer {"PA7", 0, 7, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 7}, 49 1.3 bouyer {"PA8", 0, 8, {"gpio_in", "gpio_out", "gmac", "lcd1", NULL, NULL, "irq", NULL}, 6, 8}, 50 1.3 bouyer {"PA9", 0, 9, {"gpio_in", "gpio_out", "gmac", "lcd1", NULL, "mmc2", "irq", NULL}, 6, 9}, 51 1.3 bouyer {"PA10", 0, 10, {"gpio_in", "gpio_out", "gmac", "lcd1", "mmc3", "mmc2", "irq", NULL}, 6, 10}, 52 1.3 bouyer {"PA11", 0, 11, {"gpio_in", "gpio_out", "gmac", "lcd1", "mmc3", "mmc2", "irq", NULL}, 6, 11}, 53 1.3 bouyer {"PA12", 0, 12, {"gpio_in", "gpio_out", "gmac", "lcd1", "mmc3", "mmc2", "irq", NULL}, 6, 12}, 54 1.3 bouyer {"PA13", 0, 13, {"gpio_in", "gpio_out", "gmac", "lcd1", "mmc3", "mmc2", "irq", NULL}, 6, 13}, 55 1.3 bouyer {"PA14", 0, 14, {"gpio_in", "gpio_out", "gmac", "lcd1", "mmc3", "mmc2", "irq", NULL}, 6, 14}, 56 1.3 bouyer {"PA15", 0, 15, {"gpio_in", "gpio_out", "gmac", "lcd1", "clk_out_a", NULL, "irq", NULL}, 6, 15}, 57 1.3 bouyer {"PA16", 0, 16, {"gpio_in", "gpio_out", "gmac", "lcd1", "dmic", NULL, "irq", NULL}, 6, 16}, 58 1.3 bouyer {"PA17", 0, 17, {"gpio_in", "gpio_out", "gmac", "lcd1", "dmic", NULL, "irq", NULL}, 6, 17}, 59 1.3 bouyer {"PA18", 0, 18, {"gpio_in", "gpio_out", "gmac", "lcd1", "clk_out_b", NULL, "irq", NULL}, 6, 18}, 60 1.3 bouyer {"PA19", 0, 19, {"gpio_in", "gpio_out", "gmac", "lcd1", "pwm3", NULL, "irq", NULL}, 6, 19}, 61 1.3 bouyer {"PA20", 0, 20, {"gpio_in", "gpio_out", "gmac", "lcd1", "pwm3", NULL, "irq", NULL}, 6, 20}, 62 1.3 bouyer {"PA21", 0, 21, {"gpio_in", "gpio_out", "gmac", "lcd1", "spi3", NULL, "irq", NULL}, 6, 21}, 63 1.3 bouyer {"PA22", 0, 22, {"gpio_in", "gpio_out", "gmac", "lcd1", "spi3", NULL, "irq", NULL}, 6, 22}, 64 1.3 bouyer {"PA23", 0, 23, {"gpio_in", "gpio_out", "gmac", "lcd1", "spi3", NULL, "irq", NULL}, 6, 23}, 65 1.3 bouyer {"PA24", 0, 24, {"gpio_in", "gpio_out", "gmac", "lcd1", "spi3", NULL, "irq", NULL}, 6, 24}, 66 1.3 bouyer {"PA25", 0, 25, {"gpio_in", "gpio_out", "gmac", "lcd1", "spi3", NULL, "irq", NULL}, 6, 25}, 67 1.3 bouyer {"PA26", 0, 26, {"gpio_in", "gpio_out", "gmac", "lcd1", "clk_out_c", NULL, "irq", NULL}, 6, 26}, 68 1.3 bouyer {"PA27", 0, 27, {"gpio_in", "gpio_out", "gmac", "lcd1", NULL, NULL, "irq", NULL}, 6, 27}, 69 1.3 bouyer 70 1.3 bouyer {"PB0", 1, 0, {"gpio_in", "gpio_out", "i2s0", "uart3", "csi", NULL, "irq", NULL}, 6, 0}, 71 1.3 bouyer {"PB1", 1, 1, {"gpio_in", "gpio_out", "i2s0", NULL, NULL, NULL, "irq", NULL}, 6, 1}, 72 1.3 bouyer {"PB2", 1, 2, {"gpio_in", "gpio_out", "i2s0", NULL, NULL, NULL, "irq", NULL}, 6, 2}, 73 1.3 bouyer {"PB3", 1, 3, {"gpio_in", "gpio_out", "i2s0", NULL, NULL, NULL, "irq", NULL}, 6, 3}, 74 1.3 bouyer {"PB4", 1, 4, {"gpio_in", "gpio_out", "i2s0", "uart3", NULL, NULL, "irq", NULL}, 6, 4}, 75 1.3 bouyer {"PB5", 1, 5, {"gpio_in", "gpio_out", "i2s0", "uart3", "i2c3", NULL, "irq", NULL}, 6, 5}, 76 1.3 bouyer {"PB6", 1, 6, {"gpio_in", "gpio_out", "i2s0", "uart3", "i2c3", NULL, "irq", NULL}, 6, 6}, 77 1.3 bouyer {"PB7", 1, 7, {"gpio_in", "gpio_out", "i2s0", NULL, NULL, NULL, "irq", NULL}, 6, 7}, 78 1.1 jmcneill 79 1.1 jmcneill {"PC0", 2, 0, {"gpio_in", "gpio_out", "nand0", "spi0", NULL, NULL, NULL, NULL}}, 80 1.1 jmcneill {"PC1", 2, 1, {"gpio_in", "gpio_out", "nand0", "spi0", NULL, NULL, NULL, NULL}}, 81 1.1 jmcneill {"PC2", 2, 2, {"gpio_in", "gpio_out", "nand0", "spi0", NULL, NULL, NULL, NULL}}, 82 1.1 jmcneill {"PC3", 2, 3, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}}, 83 1.1 jmcneill {"PC4", 2, 4, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}}, 84 1.1 jmcneill {"PC5", 2, 5, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}}, 85 1.1 jmcneill {"PC6", 2, 6, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 86 1.1 jmcneill {"PC7", 2, 7, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 87 1.1 jmcneill {"PC8", 2, 8, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 88 1.1 jmcneill {"PC9", 2, 9, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 89 1.1 jmcneill {"PC10", 2, 10, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 90 1.1 jmcneill {"PC11", 2, 11, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 91 1.1 jmcneill {"PC12", 2, 12, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 92 1.1 jmcneill {"PC13", 2, 13, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 93 1.1 jmcneill {"PC14", 2, 14, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 94 1.1 jmcneill {"PC15", 2, 15, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 95 1.1 jmcneill {"PC16", 2, 16, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 96 1.1 jmcneill {"PC17", 2, 17, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 97 1.1 jmcneill {"PC18", 2, 18, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 98 1.1 jmcneill {"PC19", 2, 19, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 99 1.1 jmcneill {"PC20", 2, 20, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 100 1.1 jmcneill {"PC21", 2, 21, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 101 1.1 jmcneill {"PC22", 2, 22, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 102 1.1 jmcneill {"PC23", 2, 23, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 103 1.1 jmcneill {"PC24", 2, 24, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 104 1.1 jmcneill {"PC25", 2, 25, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}}, 105 1.1 jmcneill {"PC26", 2, 26, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}}, 106 1.1 jmcneill {"PC27", 2, 27, {"gpio_in", "gpio_out", NULL, "spi0",NULL, NULL, NULL, NULL}}, 107 1.1 jmcneill 108 1.1 jmcneill {"PD0", 3, 0, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 109 1.1 jmcneill {"PD1", 3, 1, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 110 1.1 jmcneill {"PD2", 3, 2, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 111 1.1 jmcneill {"PD3", 3, 3, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 112 1.1 jmcneill {"PD4", 3, 4, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 113 1.1 jmcneill {"PD5", 3, 5, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 114 1.1 jmcneill {"PD6", 3, 6, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 115 1.1 jmcneill {"PD7", 3, 7, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 116 1.1 jmcneill {"PD8", 3, 8, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 117 1.1 jmcneill {"PD9", 3, 9, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 118 1.1 jmcneill {"PD10", 3, 10, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 119 1.1 jmcneill {"PD11", 3, 11, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 120 1.1 jmcneill {"PD12", 3, 12, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 121 1.1 jmcneill {"PD13", 3, 13, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 122 1.1 jmcneill {"PD14", 3, 14, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 123 1.1 jmcneill {"PD15", 3, 15, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 124 1.1 jmcneill {"PD16", 3, 16, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 125 1.1 jmcneill {"PD17", 3, 17, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 126 1.1 jmcneill {"PD18", 3, 18, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 127 1.1 jmcneill {"PD19", 3, 19, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 128 1.1 jmcneill {"PD20", 3, 20, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 129 1.1 jmcneill {"PD21", 3, 21, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 130 1.1 jmcneill {"PD22", 3, 22, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 131 1.1 jmcneill {"PD23", 3, 23, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 132 1.1 jmcneill {"PD24", 3, 24, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 133 1.1 jmcneill {"PD25", 3, 25, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 134 1.1 jmcneill {"PD26", 3, 26, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 135 1.1 jmcneill {"PD27", 3, 27, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 136 1.1 jmcneill 137 1.3 bouyer {"PE0", 4, 0, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 0}, 138 1.3 bouyer {"PE1", 4, 1, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 1}, 139 1.3 bouyer {"PE2", 4, 2, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 2}, 140 1.3 bouyer {"PE3", 4, 3, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 3}, 141 1.3 bouyer {"PE4", 4, 4, {"gpio_in", "gpio_out", "csi", "uart5", NULL, NULL, "irq", NULL}, 6, 4}, 142 1.3 bouyer {"PE5", 4, 5, {"gpio_in", "gpio_out", "csi", "uart5", NULL, NULL, "irq", NULL}, 6, 5}, 143 1.3 bouyer {"PE6", 4, 6, {"gpio_in", "gpio_out", "csi", "uart5", NULL, NULL, "irq", NULL}, 6, 6}, 144 1.3 bouyer {"PE7", 4, 7, {"gpio_in", "gpio_out", "csi", "uart5", NULL, NULL, "irq", NULL}, 6, 7}, 145 1.3 bouyer {"PE8", 4, 8, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 8}, 146 1.3 bouyer {"PE9", 4, 9, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 9}, 147 1.3 bouyer {"PE10", 4, 10, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 10}, 148 1.3 bouyer {"PE11", 4, 11, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 11}, 149 1.3 bouyer {"PE12", 4, 12, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 12}, 150 1.3 bouyer {"PE13", 4, 13, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 13}, 151 1.3 bouyer {"PE14", 4, 14, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 14}, 152 1.3 bouyer {"PE15", 4, 15, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 15}, 153 1.3 bouyer {"PE16", 4, 16, {"gpio_in", "gpio_out", "csi", NULL, NULL, NULL, "irq", NULL}, 6, 16}, 154 1.1 jmcneill 155 1.1 jmcneill {"PF0", 5, 0, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}}, 156 1.1 jmcneill {"PF1", 5, 1, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}}, 157 1.1 jmcneill {"PF2", 5, 2, {"gpio_in", "gpio_out", "mmc0", NULL, "uart0", NULL, NULL, NULL}}, 158 1.1 jmcneill {"PF3", 5, 3, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}}, 159 1.1 jmcneill {"PF4", 5, 4, {"gpio_in", "gpio_out", "mmc0", NULL, "uart0", NULL, NULL, NULL}}, 160 1.1 jmcneill {"PF5", 5, 5, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}}, 161 1.1 jmcneill 162 1.3 bouyer {"PG0", 6, 0, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 0}, 163 1.3 bouyer {"PG1", 6, 1, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 1}, 164 1.3 bouyer {"PG2", 6, 2, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 2}, 165 1.3 bouyer {"PG3", 6, 3, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 3}, 166 1.3 bouyer {"PG4", 6, 4, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 4}, 167 1.3 bouyer {"PG5", 6, 5, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 5}, 168 1.3 bouyer {"PG6", 6, 6, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 6}, 169 1.3 bouyer {"PG7", 6, 7, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 7}, 170 1.3 bouyer {"PG8", 6, 8, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 8}, 171 1.3 bouyer {"PG9", 6, 9, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 9}, 172 1.3 bouyer {"PG10", 6, 10, {"gpio_in", "gpio_out", "i2c3", "usb", NULL, NULL, "irq", NULL}, 6, 10}, 173 1.3 bouyer {"PG11", 6, 11, {"gpio_in", "gpio_out", "i2c3", "usb", NULL, NULL, "irq", NULL}, 6, 11}, 174 1.3 bouyer {"PG12", 6, 12, {"gpio_in", "gpio_out", "spi1", "i2s1", NULL, NULL, "irq", NULL}, 6, 12}, 175 1.3 bouyer {"PG13", 6, 13, {"gpio_in", "gpio_out", "spi1", "i2s1", NULL, NULL, "irq", NULL}, 6, 13}, 176 1.3 bouyer {"PG14", 6, 14, {"gpio_in", "gpio_out", "spi1", "i2s1", NULL, NULL, "irq", NULL}, 6, 14}, 177 1.3 bouyer {"PG15", 6, 15, {"gpio_in", "gpio_out", "spi1", "i2s1", NULL, NULL, "irq", NULL}, 6, 15}, 178 1.3 bouyer {"PG16", 6, 16, {"gpio_in", "gpio_out", "spi1", "i2s1", NULL, NULL, "irq", NULL}, 6, 16}, 179 1.3 bouyer {"PG17", 6, 17, {"gpio_in", "gpio_out", "uart4", NULL, NULL, NULL, "irq", NULL}, 6, 17}, 180 1.3 bouyer {"PG18", 6, 18, {"gpio_in", "gpio_out", "uart4", NULL, NULL, NULL, "irq", NULL}, 6, 18}, 181 1.1 jmcneill 182 1.1 jmcneill {"PH0", 7, 0, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 183 1.1 jmcneill {"PH1", 7, 1, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 184 1.1 jmcneill {"PH2", 7, 2, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 185 1.1 jmcneill {"PH3", 7, 3, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 186 1.1 jmcneill {"PH4", 7, 4, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 187 1.1 jmcneill {"PH5", 7, 5, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 188 1.1 jmcneill {"PH6", 7, 6, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 189 1.1 jmcneill {"PH7", 7, 7, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 190 1.1 jmcneill {"PH8", 7, 8, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 191 1.1 jmcneill {"PH9", 7, 9, {"gpio_in", "gpio_out", "spi2", "jtag", "pwm1", NULL, NULL, NULL}}, 192 1.1 jmcneill {"PH10", 7, 10, {"gpio_in", "gpio_out", "spi2", "jtag", "pwm1", NULL, NULL, NULL}}, 193 1.1 jmcneill {"PH11", 7, 11, {"gpio_in", "gpio_out", "spi2", "jtag", "pwm2", NULL, NULL, NULL}}, 194 1.1 jmcneill {"PH12", 7, 12, {"gpio_in", "gpio_out", "spi2", "jtag", "pwm2", NULL, NULL, NULL}}, 195 1.1 jmcneill {"PH13", 7, 13, {"gpio_in", "gpio_out", "pwm0", NULL, NULL, NULL, NULL, NULL}}, 196 1.1 jmcneill {"PH14", 7, 14, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}}, 197 1.1 jmcneill {"PH15", 7, 15, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}}, 198 1.1 jmcneill {"PH16", 7, 16, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}}, 199 1.1 jmcneill {"PH17", 7, 17, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}}, 200 1.1 jmcneill {"PH18", 7, 18, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}}, 201 1.1 jmcneill {"PH19", 7, 19, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}}, 202 1.1 jmcneill {"PH20", 7, 20, {"gpio_in", "gpio_out", "uart0", NULL, NULL, NULL, NULL, NULL}}, 203 1.1 jmcneill {"PH21", 7, 21, {"gpio_in", "gpio_out", "uart0", NULL, NULL, NULL, NULL, NULL}}, 204 1.1 jmcneill {"PH22", 7, 22, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 205 1.1 jmcneill {"PH23", 7, 23, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 206 1.1 jmcneill {"PH24", 7, 24, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 207 1.1 jmcneill {"PH25", 7, 25, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 208 1.1 jmcneill {"PH26", 7, 26, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 209 1.1 jmcneill {"PH27", 7, 27, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 210 1.1 jmcneill {"PH28", 7, 28, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 211 1.1 jmcneill {"PH29", 7, 29, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 212 1.1 jmcneill {"PH30", 7, 30, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 213 1.1 jmcneill }; 214 1.1 jmcneill 215 1.2 jmcneill static const struct sunxi_gpio_pins a31_r_pins[] = { 216 1.2 jmcneill {"PL0", 0, 0, {"gpio_in", "gpio_out", "s_twi", "s_p2wi", NULL, NULL, NULL, NULL}}, 217 1.2 jmcneill {"PL1", 0, 1, {"gpio_in", "gpio_out", "s_twi", "s_p2wi", NULL, NULL, NULL, NULL}}, 218 1.2 jmcneill {"PL2", 0, 2, {"gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, NULL, NULL}}, 219 1.2 jmcneill {"PL3", 0, 3, {"gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, NULL, NULL}}, 220 1.2 jmcneill {"PL4", 0, 4, {"gpio_in", "gpio_out", "s_ir", NULL, NULL, NULL, NULL, NULL}}, 221 1.3 bouyer {"PL5", 0, 5, {"gpio_in", "gpio_out", "irq", "s_jtag", NULL, NULL, NULL, NULL}, 2, 0}, 222 1.3 bouyer {"PL6", 0, 6, {"gpio_in", "gpio_out", "irq", "s_jtag", NULL, NULL, NULL, NULL}, 2, 1}, 223 1.3 bouyer {"PL7", 0, 7, {"gpio_in", "gpio_out", "irq", "s_jtag", NULL, NULL, NULL, NULL}, 2, 2}, 224 1.3 bouyer {"PL8", 0, 8, {"gpio_in", "gpio_out", "irq", "s_jtag", NULL, NULL, NULL, NULL}, 2, 3}, 225 1.3 bouyer 226 1.3 bouyer {"PM0", 1, 0, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 0}, 227 1.3 bouyer {"PM1", 1, 1, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 1}, 228 1.3 bouyer {"PM2", 1, 2, {"gpio_in", "gpio_out", "irq", "1wire", NULL, NULL, NULL, NULL}, 2, 2}, 229 1.3 bouyer {"PM3", 1, 3, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 3}, 230 1.3 bouyer {"PM4", 1, 4, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 4}, 231 1.3 bouyer {"PM5", 1, 5, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 5}, 232 1.3 bouyer {"PM6", 1, 6, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 6}, 233 1.3 bouyer {"PM7", 1, 7, {"gpio_in", "gpio_out", "irq", "rtc", NULL, NULL, NULL, NULL}, 2, 7}, 234 1.2 jmcneill }; 235 1.2 jmcneill 236 1.1 jmcneill const struct sunxi_gpio_padconf sun6i_a31_padconf = { 237 1.1 jmcneill .npins = __arraycount(a31_pins), 238 1.1 jmcneill .pins = a31_pins, 239 1.1 jmcneill }; 240 1.2 jmcneill 241 1.2 jmcneill const struct sunxi_gpio_padconf sun6i_a31_r_padconf = { 242 1.2 jmcneill .npins = __arraycount(a31_r_pins), 243 1.2 jmcneill .pins = a31_r_pins, 244 1.2 jmcneill }; 245
Indexes created Tue Sep 30 20:09:53 GMT 2025