sun6i_a31_gpio.c revision 1.3
1 /* $NetBSD: sun6i_a31_gpio.c,v 1.3 2018/04/03 16:01:25 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 2016 Emmanuel Vadot <manu (at) freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: sun6i_a31_gpio.c,v 1.3 2018/04/03 16:01:25 bouyer Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/types.h> 37 38 #include <arm/sunxi/sunxi_gpio.h> 39 40 static const struct sunxi_gpio_pins a31_pins[] = { 41 {"PA0", 0, 0, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 0}, 42 {"PA1", 0, 1, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 1}, 43 {"PA2", 0, 2, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 2}, 44 {"PA3", 0, 3, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 3}, 45 {"PA4", 0, 4, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 4}, 46 {"PA5", 0, 5, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 5}, 47 {"PA6", 0, 6, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 6}, 48 {"PA7", 0, 7, {"gpio_in", "gpio_out", "gmac", "lcd1", "uart1", NULL, "irq", NULL}, 6, 7}, 49 {"PA8", 0, 8, {"gpio_in", "gpio_out", "gmac", "lcd1", NULL, NULL, "irq", NULL}, 6, 8}, 50 {"PA9", 0, 9, {"gpio_in", "gpio_out", "gmac", "lcd1", NULL, "mmc2", "irq", NULL}, 6, 9}, 51 {"PA10", 0, 10, {"gpio_in", "gpio_out", "gmac", "lcd1", "mmc3", "mmc2", "irq", NULL}, 6, 10}, 52 {"PA11", 0, 11, {"gpio_in", "gpio_out", "gmac", "lcd1", "mmc3", "mmc2", "irq", NULL}, 6, 11}, 53 {"PA12", 0, 12, {"gpio_in", "gpio_out", "gmac", "lcd1", "mmc3", "mmc2", "irq", NULL}, 6, 12}, 54 {"PA13", 0, 13, {"gpio_in", "gpio_out", "gmac", "lcd1", "mmc3", "mmc2", "irq", NULL}, 6, 13}, 55 {"PA14", 0, 14, {"gpio_in", "gpio_out", "gmac", "lcd1", "mmc3", "mmc2", "irq", NULL}, 6, 14}, 56 {"PA15", 0, 15, {"gpio_in", "gpio_out", "gmac", "lcd1", "clk_out_a", NULL, "irq", NULL}, 6, 15}, 57 {"PA16", 0, 16, {"gpio_in", "gpio_out", "gmac", "lcd1", "dmic", NULL, "irq", NULL}, 6, 16}, 58 {"PA17", 0, 17, {"gpio_in", "gpio_out", "gmac", "lcd1", "dmic", NULL, "irq", NULL}, 6, 17}, 59 {"PA18", 0, 18, {"gpio_in", "gpio_out", "gmac", "lcd1", "clk_out_b", NULL, "irq", NULL}, 6, 18}, 60 {"PA19", 0, 19, {"gpio_in", "gpio_out", "gmac", "lcd1", "pwm3", NULL, "irq", NULL}, 6, 19}, 61 {"PA20", 0, 20, {"gpio_in", "gpio_out", "gmac", "lcd1", "pwm3", NULL, "irq", NULL}, 6, 20}, 62 {"PA21", 0, 21, {"gpio_in", "gpio_out", "gmac", "lcd1", "spi3", NULL, "irq", NULL}, 6, 21}, 63 {"PA22", 0, 22, {"gpio_in", "gpio_out", "gmac", "lcd1", "spi3", NULL, "irq", NULL}, 6, 22}, 64 {"PA23", 0, 23, {"gpio_in", "gpio_out", "gmac", "lcd1", "spi3", NULL, "irq", NULL}, 6, 23}, 65 {"PA24", 0, 24, {"gpio_in", "gpio_out", "gmac", "lcd1", "spi3", NULL, "irq", NULL}, 6, 24}, 66 {"PA25", 0, 25, {"gpio_in", "gpio_out", "gmac", "lcd1", "spi3", NULL, "irq", NULL}, 6, 25}, 67 {"PA26", 0, 26, {"gpio_in", "gpio_out", "gmac", "lcd1", "clk_out_c", NULL, "irq", NULL}, 6, 26}, 68 {"PA27", 0, 27, {"gpio_in", "gpio_out", "gmac", "lcd1", NULL, NULL, "irq", NULL}, 6, 27}, 69 70 {"PB0", 1, 0, {"gpio_in", "gpio_out", "i2s0", "uart3", "csi", NULL, "irq", NULL}, 6, 0}, 71 {"PB1", 1, 1, {"gpio_in", "gpio_out", "i2s0", NULL, NULL, NULL, "irq", NULL}, 6, 1}, 72 {"PB2", 1, 2, {"gpio_in", "gpio_out", "i2s0", NULL, NULL, NULL, "irq", NULL}, 6, 2}, 73 {"PB3", 1, 3, {"gpio_in", "gpio_out", "i2s0", NULL, NULL, NULL, "irq", NULL}, 6, 3}, 74 {"PB4", 1, 4, {"gpio_in", "gpio_out", "i2s0", "uart3", NULL, NULL, "irq", NULL}, 6, 4}, 75 {"PB5", 1, 5, {"gpio_in", "gpio_out", "i2s0", "uart3", "i2c3", NULL, "irq", NULL}, 6, 5}, 76 {"PB6", 1, 6, {"gpio_in", "gpio_out", "i2s0", "uart3", "i2c3", NULL, "irq", NULL}, 6, 6}, 77 {"PB7", 1, 7, {"gpio_in", "gpio_out", "i2s0", NULL, NULL, NULL, "irq", NULL}, 6, 7}, 78 79 {"PC0", 2, 0, {"gpio_in", "gpio_out", "nand0", "spi0", NULL, NULL, NULL, NULL}}, 80 {"PC1", 2, 1, {"gpio_in", "gpio_out", "nand0", "spi0", NULL, NULL, NULL, NULL}}, 81 {"PC2", 2, 2, {"gpio_in", "gpio_out", "nand0", "spi0", NULL, NULL, NULL, NULL}}, 82 {"PC3", 2, 3, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}}, 83 {"PC4", 2, 4, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}}, 84 {"PC5", 2, 5, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}}, 85 {"PC6", 2, 6, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 86 {"PC7", 2, 7, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 87 {"PC8", 2, 8, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 88 {"PC9", 2, 9, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 89 {"PC10", 2, 10, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 90 {"PC11", 2, 11, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 91 {"PC12", 2, 12, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 92 {"PC13", 2, 13, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 93 {"PC14", 2, 14, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 94 {"PC15", 2, 15, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 95 {"PC16", 2, 16, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 96 {"PC17", 2, 17, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 97 {"PC18", 2, 18, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 98 {"PC19", 2, 19, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 99 {"PC20", 2, 20, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 100 {"PC21", 2, 21, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 101 {"PC22", 2, 22, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 102 {"PC23", 2, 23, {"gpio_in", "gpio_out", "nand0", "nand1", NULL, NULL, NULL, NULL}}, 103 {"PC24", 2, 24, {"gpio_in", "gpio_out", "nand0", "mmc2", "mmc3", NULL, NULL, NULL}}, 104 {"PC25", 2, 25, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}}, 105 {"PC26", 2, 26, {"gpio_in", "gpio_out", "nand0", NULL, NULL, NULL, NULL, NULL}}, 106 {"PC27", 2, 27, {"gpio_in", "gpio_out", NULL, "spi0",NULL, NULL, NULL, NULL}}, 107 108 {"PD0", 3, 0, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 109 {"PD1", 3, 1, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 110 {"PD2", 3, 2, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 111 {"PD3", 3, 3, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 112 {"PD4", 3, 4, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 113 {"PD5", 3, 5, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 114 {"PD6", 3, 6, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 115 {"PD7", 3, 7, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 116 {"PD8", 3, 8, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 117 {"PD9", 3, 9, {"gpio_in", "gpio_out", "lcd0", "lvds0", NULL, NULL, NULL, NULL}}, 118 {"PD10", 3, 10, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 119 {"PD11", 3, 11, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 120 {"PD12", 3, 12, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 121 {"PD13", 3, 13, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 122 {"PD14", 3, 14, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 123 {"PD15", 3, 15, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 124 {"PD16", 3, 16, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 125 {"PD17", 3, 17, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 126 {"PD18", 3, 18, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 127 {"PD19", 3, 19, {"gpio_in", "gpio_out", "lcd0", "lvds1", NULL, NULL, NULL, NULL}}, 128 {"PD20", 3, 20, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 129 {"PD21", 3, 21, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 130 {"PD22", 3, 22, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 131 {"PD23", 3, 23, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 132 {"PD24", 3, 24, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 133 {"PD25", 3, 25, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 134 {"PD26", 3, 26, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 135 {"PD27", 3, 27, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 136 137 {"PE0", 4, 0, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 0}, 138 {"PE1", 4, 1, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 1}, 139 {"PE2", 4, 2, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 2}, 140 {"PE3", 4, 3, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 3}, 141 {"PE4", 4, 4, {"gpio_in", "gpio_out", "csi", "uart5", NULL, NULL, "irq", NULL}, 6, 4}, 142 {"PE5", 4, 5, {"gpio_in", "gpio_out", "csi", "uart5", NULL, NULL, "irq", NULL}, 6, 5}, 143 {"PE6", 4, 6, {"gpio_in", "gpio_out", "csi", "uart5", NULL, NULL, "irq", NULL}, 6, 6}, 144 {"PE7", 4, 7, {"gpio_in", "gpio_out", "csi", "uart5", NULL, NULL, "irq", NULL}, 6, 7}, 145 {"PE8", 4, 8, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 8}, 146 {"PE9", 4, 9, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 9}, 147 {"PE10", 4, 10, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 10}, 148 {"PE11", 4, 11, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 11}, 149 {"PE12", 4, 12, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 12}, 150 {"PE13", 4, 13, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 13}, 151 {"PE14", 4, 14, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 14}, 152 {"PE15", 4, 15, {"gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "irq", NULL}, 6, 15}, 153 {"PE16", 4, 16, {"gpio_in", "gpio_out", "csi", NULL, NULL, NULL, "irq", NULL}, 6, 16}, 154 155 {"PF0", 5, 0, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}}, 156 {"PF1", 5, 1, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}}, 157 {"PF2", 5, 2, {"gpio_in", "gpio_out", "mmc0", NULL, "uart0", NULL, NULL, NULL}}, 158 {"PF3", 5, 3, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}}, 159 {"PF4", 5, 4, {"gpio_in", "gpio_out", "mmc0", NULL, "uart0", NULL, NULL, NULL}}, 160 {"PF5", 5, 5, {"gpio_in", "gpio_out", "mmc0", NULL, "jtag", NULL, NULL, NULL}}, 161 162 {"PG0", 6, 0, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 0}, 163 {"PG1", 6, 1, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 1}, 164 {"PG2", 6, 2, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 2}, 165 {"PG3", 6, 3, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 3}, 166 {"PG4", 6, 4, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 4}, 167 {"PG5", 6, 5, {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 5}, 168 {"PG6", 6, 6, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 6}, 169 {"PG7", 6, 7, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 7}, 170 {"PG8", 6, 8, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 8}, 171 {"PG9", 6, 9, {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 9}, 172 {"PG10", 6, 10, {"gpio_in", "gpio_out", "i2c3", "usb", NULL, NULL, "irq", NULL}, 6, 10}, 173 {"PG11", 6, 11, {"gpio_in", "gpio_out", "i2c3", "usb", NULL, NULL, "irq", NULL}, 6, 11}, 174 {"PG12", 6, 12, {"gpio_in", "gpio_out", "spi1", "i2s1", NULL, NULL, "irq", NULL}, 6, 12}, 175 {"PG13", 6, 13, {"gpio_in", "gpio_out", "spi1", "i2s1", NULL, NULL, "irq", NULL}, 6, 13}, 176 {"PG14", 6, 14, {"gpio_in", "gpio_out", "spi1", "i2s1", NULL, NULL, "irq", NULL}, 6, 14}, 177 {"PG15", 6, 15, {"gpio_in", "gpio_out", "spi1", "i2s1", NULL, NULL, "irq", NULL}, 6, 15}, 178 {"PG16", 6, 16, {"gpio_in", "gpio_out", "spi1", "i2s1", NULL, NULL, "irq", NULL}, 6, 16}, 179 {"PG17", 6, 17, {"gpio_in", "gpio_out", "uart4", NULL, NULL, NULL, "irq", NULL}, 6, 17}, 180 {"PG18", 6, 18, {"gpio_in", "gpio_out", "uart4", NULL, NULL, NULL, "irq", NULL}, 6, 18}, 181 182 {"PH0", 7, 0, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 183 {"PH1", 7, 1, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 184 {"PH2", 7, 2, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 185 {"PH3", 7, 3, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 186 {"PH4", 7, 4, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 187 {"PH5", 7, 5, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 188 {"PH6", 7, 6, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 189 {"PH7", 7, 7, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 190 {"PH8", 7, 8, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 191 {"PH9", 7, 9, {"gpio_in", "gpio_out", "spi2", "jtag", "pwm1", NULL, NULL, NULL}}, 192 {"PH10", 7, 10, {"gpio_in", "gpio_out", "spi2", "jtag", "pwm1", NULL, NULL, NULL}}, 193 {"PH11", 7, 11, {"gpio_in", "gpio_out", "spi2", "jtag", "pwm2", NULL, NULL, NULL}}, 194 {"PH12", 7, 12, {"gpio_in", "gpio_out", "spi2", "jtag", "pwm2", NULL, NULL, NULL}}, 195 {"PH13", 7, 13, {"gpio_in", "gpio_out", "pwm0", NULL, NULL, NULL, NULL, NULL}}, 196 {"PH14", 7, 14, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}}, 197 {"PH15", 7, 15, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}}, 198 {"PH16", 7, 16, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}}, 199 {"PH17", 7, 17, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}}, 200 {"PH18", 7, 18, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}}, 201 {"PH19", 7, 19, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}}, 202 {"PH20", 7, 20, {"gpio_in", "gpio_out", "uart0", NULL, NULL, NULL, NULL, NULL}}, 203 {"PH21", 7, 21, {"gpio_in", "gpio_out", "uart0", NULL, NULL, NULL, NULL, NULL}}, 204 {"PH22", 7, 22, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 205 {"PH23", 7, 23, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 206 {"PH24", 7, 24, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 207 {"PH25", 7, 25, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 208 {"PH26", 7, 26, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 209 {"PH27", 7, 27, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 210 {"PH28", 7, 28, {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}}, 211 {"PH29", 7, 29, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 212 {"PH30", 7, 30, {"gpio_in", "gpio_out", "nand1", NULL, NULL, NULL, NULL, NULL}}, 213 }; 214 215 static const struct sunxi_gpio_pins a31_r_pins[] = { 216 {"PL0", 0, 0, {"gpio_in", "gpio_out", "s_twi", "s_p2wi", NULL, NULL, NULL, NULL}}, 217 {"PL1", 0, 1, {"gpio_in", "gpio_out", "s_twi", "s_p2wi", NULL, NULL, NULL, NULL}}, 218 {"PL2", 0, 2, {"gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, NULL, NULL}}, 219 {"PL3", 0, 3, {"gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, NULL, NULL}}, 220 {"PL4", 0, 4, {"gpio_in", "gpio_out", "s_ir", NULL, NULL, NULL, NULL, NULL}}, 221 {"PL5", 0, 5, {"gpio_in", "gpio_out", "irq", "s_jtag", NULL, NULL, NULL, NULL}, 2, 0}, 222 {"PL6", 0, 6, {"gpio_in", "gpio_out", "irq", "s_jtag", NULL, NULL, NULL, NULL}, 2, 1}, 223 {"PL7", 0, 7, {"gpio_in", "gpio_out", "irq", "s_jtag", NULL, NULL, NULL, NULL}, 2, 2}, 224 {"PL8", 0, 8, {"gpio_in", "gpio_out", "irq", "s_jtag", NULL, NULL, NULL, NULL}, 2, 3}, 225 226 {"PM0", 1, 0, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 0}, 227 {"PM1", 1, 1, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 1}, 228 {"PM2", 1, 2, {"gpio_in", "gpio_out", "irq", "1wire", NULL, NULL, NULL, NULL}, 2, 2}, 229 {"PM3", 1, 3, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 3}, 230 {"PM4", 1, 4, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 4}, 231 {"PM5", 1, 5, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 5}, 232 {"PM6", 1, 6, {"gpio_in", "gpio_out", "irq", NULL, NULL, NULL, NULL, NULL}, 2, 6}, 233 {"PM7", 1, 7, {"gpio_in", "gpio_out", "irq", "rtc", NULL, NULL, NULL, NULL}, 2, 7}, 234 }; 235 236 const struct sunxi_gpio_padconf sun6i_a31_padconf = { 237 .npins = __arraycount(a31_pins), 238 .pins = a31_pins, 239 }; 240 241 const struct sunxi_gpio_padconf sun6i_a31_r_padconf = { 242 .npins = __arraycount(a31_r_pins), 243 .pins = a31_r_pins, 244 }; 245
Indexes created Wed Oct 01 07:09:59 GMT 2025