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sun8i_a83t_gpio.c revision 1.3.2.1
      1  1.3.2.1  christos /* $NetBSD: sun8i_a83t_gpio.c,v 1.3.2.1 2019/06/10 22:05:56 christos Exp $ */
      2      1.1  jmcneill 
      3      1.1  jmcneill /*-
      4      1.1  jmcneill  * Copyright (c) 2016-2017 Jared McNeill <jmcneill (at) invisible.ca>
      5      1.1  jmcneill  * All rights reserved.
      6      1.1  jmcneill  *
      7      1.1  jmcneill  * Redistribution and use in source and binary forms, with or without
      8      1.1  jmcneill  * modification, are permitted provided that the following conditions
      9      1.1  jmcneill  * are met:
     10      1.1  jmcneill  * 1. Redistributions of source code must retain the above copyright
     11      1.1  jmcneill  *    notice, this list of conditions and the following disclaimer.
     12      1.1  jmcneill  * 2. Redistributions in binary form must reproduce the above copyright
     13      1.1  jmcneill  *    notice, this list of conditions and the following disclaimer in the
     14      1.1  jmcneill  *    documentation and/or other materials provided with the distribution.
     15      1.1  jmcneill  *
     16      1.1  jmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17      1.1  jmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18      1.1  jmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19      1.1  jmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20      1.1  jmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21      1.1  jmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22      1.1  jmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23      1.1  jmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24      1.1  jmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25      1.1  jmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26      1.1  jmcneill  * SUCH DAMAGE.
     27      1.1  jmcneill  *
     28      1.1  jmcneill  * $FreeBSD$
     29      1.1  jmcneill  */
     30      1.1  jmcneill 
     31      1.1  jmcneill #include <sys/cdefs.h>
     32  1.3.2.1  christos __KERNEL_RCSID(0, "$NetBSD: sun8i_a83t_gpio.c,v 1.3.2.1 2019/06/10 22:05:56 christos Exp $");
     33      1.1  jmcneill 
     34      1.1  jmcneill #include <sys/param.h>
     35      1.1  jmcneill #include <sys/systm.h>
     36      1.1  jmcneill #include <sys/kernel.h>
     37      1.1  jmcneill #include <sys/types.h>
     38      1.1  jmcneill 
     39      1.1  jmcneill #include <arm/sunxi/sunxi_gpio.h>
     40      1.1  jmcneill 
     41      1.1  jmcneill static const struct sunxi_gpio_pins a83t_pins[] = {
     42      1.2    bouyer 	{ "PB0",  1, 0,   { "gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "irq" } },
     43      1.2    bouyer 	{ "PB1",  1, 1,   { "gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "irq" } },
     44      1.2    bouyer 	{ "PB2",  1, 2,   { "gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "irq" } },
     45      1.2    bouyer 	{ "PB3",  1, 3,   { "gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "irq" } },
     46      1.2    bouyer 	{ "PB4",  1, 4,   { "gpio_in", "gpio_out", "i2s0", "tdm", NULL, NULL, "irq" } },
     47      1.2    bouyer 	{ "PB5",  1, 5,   { "gpio_in", "gpio_out", "i2s0", "tdm", NULL, NULL, "irq" } },
     48      1.2    bouyer 	{ "PB6",  1, 6,   { "gpio_in", "gpio_out", "i2s0", "tdm", NULL, NULL, "irq" } },
     49      1.2    bouyer 	{ "PB7",  1, 7,   { "gpio_in", "gpio_out", "i2s0", "tdm", NULL, NULL, "irq" } },
     50      1.2    bouyer 	{ "PB8",  1, 8,   { "gpio_in", "gpio_out", "i2s0", "tdm", NULL, NULL, "irq" } },
     51      1.2    bouyer 	{ "PB9",  1, 9,   { "gpio_in", "gpio_out", "uart0", NULL, NULL, NULL, "irq" } },
     52      1.2    bouyer 	{ "PB10", 1, 10,  { "gpio_in", "gpio_out", "uart0", NULL, NULL, NULL, "irq" } },
     53      1.1  jmcneill 
     54      1.1  jmcneill 	{ "PC0",  2, 0,   { "gpio_in", "gpio_out", "nand", "spi0" } },
     55      1.1  jmcneill 	{ "PC1",  2, 1,   { "gpio_in", "gpio_out", "nand", "spi0" } },
     56      1.1  jmcneill 	{ "PC2",  2, 2,   { "gpio_in", "gpio_out", "nand", "spi0" } },
     57      1.1  jmcneill 	{ "PC3",  2, 3,   { "gpio_in", "gpio_out", "nand", "spi0" } },
     58      1.1  jmcneill 	{ "PC4",  2, 4,   { "gpio_in", "gpio_out", "nand" } },
     59      1.1  jmcneill 	{ "PC5",  2, 5,   { "gpio_in", "gpio_out", "nand", "mmc2" } },
     60      1.1  jmcneill 	{ "PC6",  2, 6,   { "gpio_in", "gpio_out", "nand", "mmc2" } },
     61      1.1  jmcneill 	{ "PC7",  2, 7,   { "gpio_in", "gpio_out", "nand" } },
     62      1.1  jmcneill 	{ "PC8",  2, 8,   { "gpio_in", "gpio_out", "nand", "mmc2" } },
     63      1.1  jmcneill 	{ "PC9",  2, 9,   { "gpio_in", "gpio_out", "nand", "mmc2" } },
     64      1.1  jmcneill 	{ "PC10", 2, 10,  { "gpio_in", "gpio_out", "nand", "mmc2" } },
     65      1.1  jmcneill 	{ "PC11", 2, 11,  { "gpio_in", "gpio_out", "nand", "mmc2" } },
     66      1.1  jmcneill 	{ "PC12", 2, 12,  { "gpio_in", "gpio_out", "nand", "mmc2" } },
     67      1.1  jmcneill 	{ "PC13", 2, 13,  { "gpio_in", "gpio_out", "nand", "mmc2" } },
     68      1.1  jmcneill 	{ "PC14", 2, 14,  { "gpio_in", "gpio_out", "nand", "mmc2" } },
     69      1.1  jmcneill 	{ "PC15", 2, 15,  { "gpio_in", "gpio_out", "nand", "mmc2" } },
     70      1.1  jmcneill 	{ "PC16", 2, 16,  { "gpio_in", "gpio_out", "nand", "mmc2" } },
     71      1.1  jmcneill 	{ "PC17", 2, 17,  { "gpio_in", "gpio_out", "nand" } },
     72      1.1  jmcneill 	{ "PC18", 2, 18,  { "gpio_in", "gpio_out", "nand" } },
     73      1.1  jmcneill 
     74  1.3.2.1  christos 	{ "PD2",  3, 2,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     75  1.3.2.1  christos 	{ "PD3",  3, 3,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     76  1.3.2.1  christos 	{ "PD4",  3, 4,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     77  1.3.2.1  christos 	{ "PD5",  3, 5,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     78  1.3.2.1  christos 	{ "PD6",  3, 6,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     79  1.3.2.1  christos 	{ "PD7",  3, 7,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     80  1.3.2.1  christos 	{ "PD10", 3, 10,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     81  1.3.2.1  christos 	{ "PD11", 3, 11,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     82  1.3.2.1  christos 	{ "PD12", 3, 12,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     83  1.3.2.1  christos 	{ "PD13", 3, 13,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     84  1.3.2.1  christos 	{ "PD14", 3, 14,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     85  1.3.2.1  christos 	{ "PD15", 3, 15,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },
     86  1.3.2.1  christos 	{ "PD18", 3, 18,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },
     87  1.3.2.1  christos 	{ "PD19", 3, 19,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },
     88  1.3.2.1  christos 	{ "PD20", 3, 20,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },
     89  1.3.2.1  christos 	{ "PD21", 3, 21,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },
     90  1.3.2.1  christos 	{ "PD22", 3, 22,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },
     91  1.3.2.1  christos 	{ "PD23", 3, 23,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },
     92      1.1  jmcneill 	{ "PD24", 3, 24,  { "gpio_in", "gpio_out", "lcd", "lvds" } },
     93      1.1  jmcneill 	{ "PD25", 3, 25,  { "gpio_in", "gpio_out", "lcd", "lvds" } },
     94      1.1  jmcneill 	{ "PD26", 3, 26,  { "gpio_in", "gpio_out", "lcd", "lvds" } },
     95      1.1  jmcneill 	{ "PD27", 3, 27,  { "gpio_in", "gpio_out", "lcd", "lvds" } },
     96      1.1  jmcneill 	{ "PD28", 3, 28,  { "gpio_in", "gpio_out", "pwm" } },
     97      1.1  jmcneill 	{ "PD29", 3, 29,  { "gpio_in", "gpio_out" } },
     98      1.1  jmcneill 
     99      1.1  jmcneill 	{ "PE0",  4, 0,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },
    100      1.1  jmcneill 	{ "PE1",  4, 1,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },
    101      1.1  jmcneill 	{ "PE2",  4, 2,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },
    102      1.1  jmcneill 	{ "PE3",  4, 3,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },
    103      1.1  jmcneill 	{ "PE4",  4, 4,   { "gpio_in", "gpio_out", "csi" } },
    104      1.1  jmcneill 	{ "PE5",  4, 5,   { "gpio_in", "gpio_out", "csi" } },
    105      1.1  jmcneill 	{ "PE6",  4, 6,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },
    106      1.1  jmcneill 	{ "PE7",  4, 7,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },
    107      1.1  jmcneill 	{ "PE8",  4, 8,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },
    108      1.1  jmcneill 	{ "PE9",  4, 9,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },
    109      1.1  jmcneill 	{ "PE10", 4, 10,  { "gpio_in", "gpio_out", "csi", "uart4", "ccir" } },
    110      1.1  jmcneill 	{ "PE11", 4, 11,  { "gpio_in", "gpio_out", "csi", "uart4", "ccir" } },
    111      1.1  jmcneill 	{ "PE12", 4, 12,  { "gpio_in", "gpio_out", "csi", "uart4", "ccir" } },
    112      1.1  jmcneill 	{ "PE13", 4, 13,  { "gpio_in", "gpio_out", "csi", "uart4", "ccir" } },
    113      1.1  jmcneill 	{ "PE14", 4, 14,  { "gpio_in", "gpio_out", "csi", "twi2" } },
    114      1.1  jmcneill 	{ "PE15", 4, 15,  { "gpio_in", "gpio_out", "csi", "twi2" } },
    115      1.1  jmcneill 	{ "PE16", 4, 16,  { "gpio_in", "gpio_out" } },
    116      1.1  jmcneill 	{ "PE17", 4, 17,  { "gpio_in", "gpio_out" } },
    117      1.1  jmcneill 	{ "PE18", 4, 18,  { "gpio_in", "gpio_out", NULL, "owa" } },
    118      1.1  jmcneill 	{ "PE19", 4, 19,  { "gpio_in", "gpio_out" } },
    119      1.1  jmcneill 
    120      1.1  jmcneill 	{ "PF0",  5, 0,   { "gpio_in", "gpio_out", "mmc0", "jtag" } },
    121      1.1  jmcneill 	{ "PF1",  5, 1,   { "gpio_in", "gpio_out", "mmc0", "jtag" } },
    122      1.1  jmcneill 	{ "PF2",  5, 2,   { "gpio_in", "gpio_out", "mmc0", "uart0" } },
    123      1.1  jmcneill 	{ "PF3",  5, 3,   { "gpio_in", "gpio_out", "mmc0", "jtag" } },
    124      1.1  jmcneill 	{ "PF4",  5, 4,   { "gpio_in", "gpio_out", "mmc0", "uart0" } },
    125      1.1  jmcneill 	{ "PF5",  5, 5,   { "gpio_in", "gpio_out", "mmc0", "jtag" } },
    126      1.1  jmcneill 	{ "PF6",  5, 6,   { "gpio_in", "gpio_out" } },
    127      1.1  jmcneill 
    128      1.2    bouyer 	{ "PG0",  6, 0,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq" } },
    129      1.2    bouyer 	{ "PG1",  6, 1,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq" } },
    130      1.2    bouyer 	{ "PG2",  6, 2,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq" } },
    131      1.2    bouyer 	{ "PG3",  6, 3,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq" } },
    132      1.2    bouyer 	{ "PG4",  6, 4,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq" } },
    133      1.2    bouyer 	{ "PG5",  6, 5,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq" } },
    134      1.2    bouyer 	{ "PG6",  6, 6,   { "gpio_in", "gpio_out", "uart1", "spi1", NULL, NULL, "irq" } },
    135      1.2    bouyer 	{ "PG7",  6, 7,   { "gpio_in", "gpio_out", "uart1", "spi1", NULL, NULL, "irq" } },
    136      1.2    bouyer 	{ "PG8",  6, 8,   { "gpio_in", "gpio_out", "uart1", "spi1", NULL, NULL, "irq" } },
    137      1.2    bouyer 	{ "PG9",  6, 9,   { "gpio_in", "gpio_out", "uart1", "spi1", NULL, NULL, "irq" } },
    138      1.2    bouyer 	{ "PG10", 6, 10,  { "gpio_in", "gpio_out", "i2s1", "uart3", NULL, NULL, "irq" } },
    139      1.2    bouyer 	{ "PG11", 6, 11,  { "gpio_in", "gpio_out", "i2s1", "uart3", NULL, NULL, "irq" } },
    140      1.2    bouyer 	{ "PG12", 6, 12,  { "gpio_in", "gpio_out", "i2s1", "uart3", NULL, NULL, "irq" } },
    141      1.2    bouyer 	{ "PG13", 6, 13,  { "gpio_in", "gpio_out", "i2s1", "uart3", NULL, NULL, "irq" } },
    142      1.2    bouyer 
    143      1.2    bouyer 	{ "PH0",  7, 0,   { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "irq" } },
    144      1.2    bouyer 	{ "PH1",  7, 1,   { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "irq" } },
    145      1.2    bouyer 	{ "PH2",  7, 2,   { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, "irq" } },
    146      1.2    bouyer 	{ "PH3",  7, 3,   { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, "irq" } },
    147      1.2    bouyer 	{ "PH4",  7, 4,   { "gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, "irq" } },
    148      1.2    bouyer 	{ "PH5",  7, 5,   { "gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, "irq" } },
    149      1.3  jmcneill 	{ "PH6",  7, 6,   { "gpio_in", "gpio_out", "hdmi", NULL, NULL, NULL, "irq" } },
    150      1.3  jmcneill 	{ "PH7",  7, 7,   { "gpio_in", "gpio_out", "hdmi", NULL, NULL, NULL, "irq" } },
    151      1.3  jmcneill 	{ "PH8",  7, 8,   { "gpio_in", "gpio_out", "hdmi", NULL, NULL, NULL, "irq" } },
    152      1.2    bouyer 	{ "PH9",  7, 9,   { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "irq" } },
    153      1.2    bouyer 	{ "PH10", 7, 10,  { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "irq" } },
    154      1.2    bouyer 	{ "PH11", 7, 11,  { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "irq" } },
    155      1.1  jmcneill };
    156      1.1  jmcneill 
    157      1.1  jmcneill static const struct sunxi_gpio_pins a83t_r_pins[] = {
    158      1.2    bouyer 	{ "PL0",   0, 0,  { "gpio_in", "gpio_out", "s_rsb", "s_i2c", NULL, NULL, "irq" } },
    159      1.2    bouyer 	{ "PL1",   0, 1,  { "gpio_in", "gpio_out", "s_rsb", "s_i2c", NULL, NULL, "irq" } },
    160      1.2    bouyer 	{ "PL2",   0, 2,  { "gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, "irq" } },
    161      1.2    bouyer 	{ "PL3",   0, 3,  { "gpio_in", "gpio_out", "s_uart", NULL, NULL, NULL, "irq" } },
    162      1.2    bouyer 	{ "PL4",   0, 4,  { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, "irq" } },
    163      1.2    bouyer 	{ "PL5",   0, 5,  { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, "irq" } },
    164      1.2    bouyer 	{ "PL6",   0, 6,  { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, "irq" } },
    165      1.2    bouyer 	{ "PL7",   0, 7,  { "gpio_in", "gpio_out", "s_jtag", NULL, NULL, NULL, "irq" } },
    166      1.2    bouyer 	{ "PL8",   0, 8,  { "gpio_in", "gpio_out", "s_i2c", NULL, NULL, NULL, "irq" } },
    167      1.2    bouyer 	{ "PL9",   0, 9,  { "gpio_in", "gpio_out", "s_i2c", NULL, NULL, NULL, "irq" } },
    168      1.2    bouyer 	{ "PL10",  0, 10, { "gpio_in", "gpio_out", "s_pwm", NULL, NULL, NULL, "irq" } },
    169      1.2    bouyer 	{ "PL11",  0, 11, { "gpio_in", "gpio_out", NULL, NULL, NULL, "irq" } },
    170  1.3.2.1  christos 	{ "PL12",  0, 12, { "gpio_in", "gpio_out", "s_cir_rx", NULL, NULL, NULL, "irq" } },
    171      1.1  jmcneill };
    172      1.1  jmcneill 
    173      1.1  jmcneill const struct sunxi_gpio_padconf sun8i_a83t_padconf = {
    174      1.1  jmcneill 	.npins = __arraycount(a83t_pins),
    175      1.1  jmcneill 	.pins = a83t_pins,
    176      1.1  jmcneill };
    177      1.1  jmcneill 
    178      1.1  jmcneill const struct sunxi_gpio_padconf sun8i_a83t_r_padconf = {
    179      1.1  jmcneill 	.npins = __arraycount(a83t_r_pins),
    180      1.1  jmcneill 	.pins = a83t_r_pins,
    181      1.1  jmcneill };
    182