sun8i_h3_codec.c revision 1.1 1 1.1 jmcneill /* $NetBSD: sun8i_h3_codec.c,v 1.1 2017/08/06 17:15:45 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2014-2017 Jared McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #include <sys/cdefs.h>
30 1.1 jmcneill __KERNEL_RCSID(0, "$NetBSD: sun8i_h3_codec.c,v 1.1 2017/08/06 17:15:45 jmcneill Exp $");
31 1.1 jmcneill
32 1.1 jmcneill #include <sys/param.h>
33 1.1 jmcneill #include <sys/bus.h>
34 1.1 jmcneill #include <sys/cpu.h>
35 1.1 jmcneill #include <sys/device.h>
36 1.1 jmcneill #include <sys/kmem.h>
37 1.1 jmcneill #include <sys/bitops.h>
38 1.1 jmcneill
39 1.1 jmcneill #include <sys/audioio.h>
40 1.1 jmcneill #include <dev/audio_if.h>
41 1.1 jmcneill
42 1.1 jmcneill #include <arm/sunxi/sunxi_codec.h>
43 1.1 jmcneill
44 1.1 jmcneill #define H3_PR_CFG 0x00
45 1.1 jmcneill #define H3_AC_PR_RW __BIT(24)
46 1.1 jmcneill #define H3_AC_PR_RST __BIT(18)
47 1.1 jmcneill #define H3_AC_PR_ADDR __BITS(20,16)
48 1.1 jmcneill #define H3_ACDA_PR_WDAT __BITS(15,8)
49 1.1 jmcneill #define H3_ACDA_PR_RDAT __BITS(7,0)
50 1.1 jmcneill
51 1.1 jmcneill #define H3_LOMIXSC 0x01
52 1.1 jmcneill #define H3_LOMIXSC_LDAC __BIT(1)
53 1.1 jmcneill #define H3_ROMIXSC 0x02
54 1.1 jmcneill #define H3_ROMIXSC_RDAC __BIT(1)
55 1.1 jmcneill #define H3_DAC_PA_SRC 0x03
56 1.1 jmcneill #define H3_DACAREN __BIT(7)
57 1.1 jmcneill #define H3_DACALEN __BIT(6)
58 1.1 jmcneill #define H3_RMIXEN __BIT(5)
59 1.1 jmcneill #define H3_LMIXEN __BIT(4)
60 1.1 jmcneill #define H3_LINEIN_GCTR 0x05
61 1.1 jmcneill #define H3_LINEING __BITS(6,4)
62 1.1 jmcneill #define H3_MIC_GCTR 0x06
63 1.1 jmcneill #define H3_MIC1_GAIN __BITS(6,4)
64 1.1 jmcneill #define H3_MIC2_GAIN __BITS(2,0)
65 1.1 jmcneill #define H3_PAEN_CTR 0x07
66 1.1 jmcneill #define H3_LINEOUTEN __BIT(7)
67 1.1 jmcneill #define H3_LINEOUT_VOLC 0x09
68 1.1 jmcneill #define H3_LINEOUTVOL __BITS(7,3)
69 1.1 jmcneill #define H3_MIC2G_LINEOUT_CTR 0x0a
70 1.1 jmcneill #define H3_LINEOUT_LSEL __BIT(3)
71 1.1 jmcneill #define H3_LINEOUT_RSEL __BIT(2)
72 1.1 jmcneill #define H3_LADCMIXSC 0x0c
73 1.1 jmcneill #define H3_RADCMIXSC 0x0d
74 1.1 jmcneill #define H3_ADCMIXSC_MIC1 __BIT(6)
75 1.1 jmcneill #define H3_ADCMIXSC_MIC2 __BIT(5)
76 1.1 jmcneill #define H3_ADCMIXSC_LINEIN __BIT(2)
77 1.1 jmcneill #define H3_ADCMIXSC_OMIXER __BITS(1,0)
78 1.1 jmcneill #define H3_ADC_AP_EN 0x0f
79 1.1 jmcneill #define H3_ADCREN __BIT(7)
80 1.1 jmcneill #define H3_ADCLEN __BIT(6)
81 1.1 jmcneill #define H3_ADCG __BITS(2,0)
82 1.1 jmcneill
83 1.1 jmcneill struct h3_codec_softc {
84 1.1 jmcneill device_t sc_dev;
85 1.1 jmcneill bus_space_tag_t sc_bst;
86 1.1 jmcneill bus_space_handle_t sc_bsh;
87 1.1 jmcneill int sc_phandle;
88 1.1 jmcneill };
89 1.1 jmcneill
90 1.1 jmcneill enum h3_codec_mixer_ctrl {
91 1.1 jmcneill H3_CODEC_OUTPUT_CLASS,
92 1.1 jmcneill H3_CODEC_INPUT_CLASS,
93 1.1 jmcneill H3_CODEC_RECORD_CLASS,
94 1.1 jmcneill
95 1.1 jmcneill H3_CODEC_OUTPUT_MASTER_VOLUME,
96 1.1 jmcneill H3_CODEC_INPUT_DAC_VOLUME,
97 1.1 jmcneill H3_CODEC_INPUT_LINEIN_VOLUME,
98 1.1 jmcneill H3_CODEC_INPUT_MIC1_VOLUME,
99 1.1 jmcneill H3_CODEC_INPUT_MIC2_VOLUME,
100 1.1 jmcneill H3_CODEC_RECORD_AGC_VOLUME,
101 1.1 jmcneill H3_CODEC_RECORD_SOURCE,
102 1.1 jmcneill
103 1.1 jmcneill H3_CODEC_MIXER_CTRL_LAST
104 1.1 jmcneill };
105 1.1 jmcneill
106 1.1 jmcneill static const struct h3_codec_mixer {
107 1.1 jmcneill const char * name;
108 1.1 jmcneill enum h3_codec_mixer_ctrl mixer_class;
109 1.1 jmcneill u_int reg;
110 1.1 jmcneill u_int mask;
111 1.1 jmcneill } h3_codec_mixers[H3_CODEC_MIXER_CTRL_LAST] = {
112 1.1 jmcneill [H3_CODEC_OUTPUT_MASTER_VOLUME] = { AudioNmaster,
113 1.1 jmcneill H3_CODEC_OUTPUT_CLASS, H3_LINEOUT_VOLC, H3_LINEOUTVOL },
114 1.1 jmcneill [H3_CODEC_INPUT_DAC_VOLUME] = { AudioNdac,
115 1.1 jmcneill H3_CODEC_INPUT_CLASS, H3_LINEOUT_VOLC, H3_LINEOUTVOL },
116 1.1 jmcneill [H3_CODEC_INPUT_LINEIN_VOLUME] = { AudioNline,
117 1.1 jmcneill H3_CODEC_INPUT_CLASS, H3_LINEIN_GCTR, H3_LINEING },
118 1.1 jmcneill [H3_CODEC_INPUT_MIC1_VOLUME] = { "mic1",
119 1.1 jmcneill H3_CODEC_INPUT_CLASS, H3_MIC_GCTR, H3_MIC1_GAIN },
120 1.1 jmcneill [H3_CODEC_INPUT_MIC2_VOLUME] = { "mic2",
121 1.1 jmcneill H3_CODEC_INPUT_CLASS, H3_MIC_GCTR, H3_MIC2_GAIN },
122 1.1 jmcneill [H3_CODEC_RECORD_AGC_VOLUME] = { AudioNagc,
123 1.1 jmcneill H3_CODEC_RECORD_CLASS, H3_ADC_AP_EN, H3_ADCG },
124 1.1 jmcneill };
125 1.1 jmcneill
126 1.1 jmcneill #define RD4(sc, reg) \
127 1.1 jmcneill bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
128 1.1 jmcneill #define WR4(sc, reg, val) \
129 1.1 jmcneill bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
130 1.1 jmcneill
131 1.1 jmcneill static struct h3_codec_softc *
132 1.1 jmcneill h3_codec_find(int phandle)
133 1.1 jmcneill {
134 1.1 jmcneill struct h3_codec_softc *csc;
135 1.1 jmcneill device_t dev;
136 1.1 jmcneill
137 1.1 jmcneill dev = device_find_by_driver_unit("h3codec", 0);
138 1.1 jmcneill if (dev == NULL)
139 1.1 jmcneill return NULL;
140 1.1 jmcneill csc = device_private(dev);
141 1.1 jmcneill if (csc->sc_phandle != phandle)
142 1.1 jmcneill return NULL;
143 1.1 jmcneill
144 1.1 jmcneill return csc;
145 1.1 jmcneill }
146 1.1 jmcneill
147 1.1 jmcneill static u_int
148 1.1 jmcneill h3_codec_pr_read(struct h3_codec_softc *csc, u_int addr)
149 1.1 jmcneill {
150 1.1 jmcneill uint32_t val;
151 1.1 jmcneill
152 1.1 jmcneill /* Read current value */
153 1.1 jmcneill val = RD4(csc, H3_PR_CFG);
154 1.1 jmcneill
155 1.1 jmcneill /* De-assert reset */
156 1.1 jmcneill val |= H3_AC_PR_RST;
157 1.1 jmcneill WR4(csc, H3_PR_CFG, val);
158 1.1 jmcneill
159 1.1 jmcneill /* Read mode */
160 1.1 jmcneill val &= ~H3_AC_PR_RW;
161 1.1 jmcneill WR4(csc, H3_PR_CFG, val);
162 1.1 jmcneill
163 1.1 jmcneill /* Set address */
164 1.1 jmcneill val &= ~H3_AC_PR_ADDR;
165 1.1 jmcneill val |= __SHIFTIN(addr, H3_AC_PR_ADDR);
166 1.1 jmcneill WR4(csc, H3_PR_CFG, val);
167 1.1 jmcneill
168 1.1 jmcneill /* Read data */
169 1.1 jmcneill return __SHIFTOUT(RD4(csc, H3_PR_CFG), H3_ACDA_PR_RDAT);
170 1.1 jmcneill }
171 1.1 jmcneill
172 1.1 jmcneill static void
173 1.1 jmcneill h3_codec_pr_write(struct h3_codec_softc *csc, u_int addr, u_int data)
174 1.1 jmcneill {
175 1.1 jmcneill uint32_t val;
176 1.1 jmcneill
177 1.1 jmcneill /* Read current value */
178 1.1 jmcneill val = RD4(csc, H3_PR_CFG);
179 1.1 jmcneill
180 1.1 jmcneill /* De-assert reset */
181 1.1 jmcneill val |= H3_AC_PR_RST;
182 1.1 jmcneill WR4(csc, H3_PR_CFG, val);
183 1.1 jmcneill
184 1.1 jmcneill /* Set address */
185 1.1 jmcneill val &= ~H3_AC_PR_ADDR;
186 1.1 jmcneill val |= __SHIFTIN(addr, H3_AC_PR_ADDR);
187 1.1 jmcneill WR4(csc, H3_PR_CFG, val);
188 1.1 jmcneill
189 1.1 jmcneill /* Write data */
190 1.1 jmcneill val &= ~H3_ACDA_PR_WDAT;
191 1.1 jmcneill val |= __SHIFTIN(data, H3_ACDA_PR_WDAT);
192 1.1 jmcneill WR4(csc, H3_PR_CFG, val);
193 1.1 jmcneill
194 1.1 jmcneill /* Write mode */
195 1.1 jmcneill val |= H3_AC_PR_RW;
196 1.1 jmcneill WR4(csc, H3_PR_CFG, val);
197 1.1 jmcneill }
198 1.1 jmcneill
199 1.1 jmcneill static void
200 1.1 jmcneill h3_codec_pr_set_clear(struct h3_codec_softc *csc, u_int addr, u_int set, u_int clr)
201 1.1 jmcneill {
202 1.1 jmcneill u_int old, new;
203 1.1 jmcneill
204 1.1 jmcneill old = h3_codec_pr_read(csc, addr);
205 1.1 jmcneill new = set | (old & ~clr);
206 1.1 jmcneill h3_codec_pr_write(csc, addr, new);
207 1.1 jmcneill }
208 1.1 jmcneill
209 1.1 jmcneill static int
210 1.1 jmcneill h3_codec_init(struct sunxi_codec_softc *sc)
211 1.1 jmcneill {
212 1.1 jmcneill struct h3_codec_softc *csc;
213 1.1 jmcneill int phandle;
214 1.1 jmcneill
215 1.1 jmcneill /* Lookup the codec analog controls phandle */
216 1.1 jmcneill phandle = fdtbus_get_phandle(sc->sc_phandle,
217 1.1 jmcneill "allwinner,codec-analog-controls");
218 1.1 jmcneill if (phandle < 0) {
219 1.1 jmcneill aprint_error_dev(sc->sc_dev,
220 1.1 jmcneill "missing allwinner,codec-analog-controls property\n");
221 1.1 jmcneill return ENXIO;
222 1.1 jmcneill }
223 1.1 jmcneill
224 1.1 jmcneill /* Find a matching h3codec instance */
225 1.1 jmcneill sc->sc_codec_priv = h3_codec_find(phandle);
226 1.1 jmcneill if (sc->sc_codec_priv == NULL) {
227 1.1 jmcneill aprint_error_dev(sc->sc_dev, "couldn't find codec analog controls\n");
228 1.1 jmcneill return ENOENT;
229 1.1 jmcneill }
230 1.1 jmcneill csc = sc->sc_codec_priv;
231 1.1 jmcneill
232 1.1 jmcneill /* Right & Left LINEOUT enable */
233 1.1 jmcneill h3_codec_pr_set_clear(csc, H3_PAEN_CTR, H3_LINEOUTEN, 0);
234 1.1 jmcneill h3_codec_pr_set_clear(csc, H3_MIC2G_LINEOUT_CTR,
235 1.1 jmcneill H3_LINEOUT_LSEL | H3_LINEOUT_RSEL, 0);
236 1.1 jmcneill
237 1.1 jmcneill return 0;
238 1.1 jmcneill }
239 1.1 jmcneill
240 1.1 jmcneill static void
241 1.1 jmcneill h3_codec_mute(struct sunxi_codec_softc *sc, int mute, u_int mode)
242 1.1 jmcneill {
243 1.1 jmcneill struct h3_codec_softc * const csc = sc->sc_codec_priv;
244 1.1 jmcneill
245 1.1 jmcneill if (mode == AUMODE_PLAY) {
246 1.1 jmcneill if (mute) {
247 1.1 jmcneill /* Mute DAC l/r channels to output mixer */
248 1.1 jmcneill h3_codec_pr_set_clear(csc, H3_LOMIXSC,
249 1.1 jmcneill 0, H3_LOMIXSC_LDAC);
250 1.1 jmcneill h3_codec_pr_set_clear(csc, H3_ROMIXSC,
251 1.1 jmcneill 0, H3_ROMIXSC_RDAC);
252 1.1 jmcneill /* Disable DAC analog l/r channels and output mixer */
253 1.1 jmcneill h3_codec_pr_set_clear(csc, H3_DAC_PA_SRC,
254 1.1 jmcneill 0, H3_DACAREN | H3_DACALEN | H3_RMIXEN | H3_LMIXEN);
255 1.1 jmcneill } else {
256 1.1 jmcneill /* Enable DAC analog l/r channels and output mixer */
257 1.1 jmcneill h3_codec_pr_set_clear(csc, H3_DAC_PA_SRC,
258 1.1 jmcneill H3_DACAREN | H3_DACALEN | H3_RMIXEN | H3_LMIXEN, 0);
259 1.1 jmcneill /* Unmute DAC l/r channels to output mixer */
260 1.1 jmcneill h3_codec_pr_set_clear(csc, H3_LOMIXSC, H3_LOMIXSC_LDAC, 0);
261 1.1 jmcneill h3_codec_pr_set_clear(csc, H3_ROMIXSC, H3_ROMIXSC_RDAC, 0);
262 1.1 jmcneill }
263 1.1 jmcneill } else {
264 1.1 jmcneill if (mute) {
265 1.1 jmcneill /* Disable ADC analog l/r channels */
266 1.1 jmcneill h3_codec_pr_set_clear(csc, H3_ADC_AP_EN,
267 1.1 jmcneill 0, H3_ADCREN | H3_ADCLEN);
268 1.1 jmcneill } else {
269 1.1 jmcneill /* Enable ADC analog l/r channels */
270 1.1 jmcneill h3_codec_pr_set_clear(csc, H3_ADC_AP_EN,
271 1.1 jmcneill H3_ADCREN | H3_ADCLEN, 0);
272 1.1 jmcneill }
273 1.1 jmcneill }
274 1.1 jmcneill }
275 1.1 jmcneill
276 1.1 jmcneill static int
277 1.1 jmcneill h3_codec_set_port(struct sunxi_codec_softc *sc, mixer_ctrl_t *mc)
278 1.1 jmcneill {
279 1.1 jmcneill struct h3_codec_softc * const csc = sc->sc_codec_priv;
280 1.1 jmcneill const struct h3_codec_mixer *mix;
281 1.1 jmcneill u_int val, shift;
282 1.1 jmcneill int nvol;
283 1.1 jmcneill
284 1.1 jmcneill switch (mc->dev) {
285 1.1 jmcneill case H3_CODEC_OUTPUT_MASTER_VOLUME:
286 1.1 jmcneill case H3_CODEC_INPUT_DAC_VOLUME:
287 1.1 jmcneill case H3_CODEC_INPUT_LINEIN_VOLUME:
288 1.1 jmcneill case H3_CODEC_INPUT_MIC1_VOLUME:
289 1.1 jmcneill case H3_CODEC_INPUT_MIC2_VOLUME:
290 1.1 jmcneill case H3_CODEC_RECORD_AGC_VOLUME:
291 1.1 jmcneill mix = &h3_codec_mixers[mc->dev];
292 1.1 jmcneill val = h3_codec_pr_read(csc, mix->reg);
293 1.1 jmcneill shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
294 1.1 jmcneill nvol = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] >> shift;
295 1.1 jmcneill val &= ~mix->mask;
296 1.1 jmcneill val |= __SHIFTIN(nvol, mix->mask);
297 1.1 jmcneill h3_codec_pr_write(csc, mix->reg, val);
298 1.1 jmcneill return 0;
299 1.1 jmcneill
300 1.1 jmcneill case H3_CODEC_RECORD_SOURCE:
301 1.1 jmcneill h3_codec_pr_write(csc, H3_LADCMIXSC, mc->un.mask);
302 1.1 jmcneill h3_codec_pr_write(csc, H3_RADCMIXSC, mc->un.mask);
303 1.1 jmcneill return 0;
304 1.1 jmcneill }
305 1.1 jmcneill
306 1.1 jmcneill return ENXIO;
307 1.1 jmcneill }
308 1.1 jmcneill
309 1.1 jmcneill static int
310 1.1 jmcneill h3_codec_get_port(struct sunxi_codec_softc *sc, mixer_ctrl_t *mc)
311 1.1 jmcneill {
312 1.1 jmcneill struct h3_codec_softc * const csc = sc->sc_codec_priv;
313 1.1 jmcneill const struct h3_codec_mixer *mix;
314 1.1 jmcneill u_int val, shift;
315 1.1 jmcneill int nvol;
316 1.1 jmcneill
317 1.1 jmcneill switch (mc->dev) {
318 1.1 jmcneill case H3_CODEC_OUTPUT_MASTER_VOLUME:
319 1.1 jmcneill case H3_CODEC_INPUT_DAC_VOLUME:
320 1.1 jmcneill case H3_CODEC_INPUT_LINEIN_VOLUME:
321 1.1 jmcneill case H3_CODEC_INPUT_MIC1_VOLUME:
322 1.1 jmcneill case H3_CODEC_INPUT_MIC2_VOLUME:
323 1.1 jmcneill case H3_CODEC_RECORD_AGC_VOLUME:
324 1.1 jmcneill mix = &h3_codec_mixers[mc->dev];
325 1.1 jmcneill val = h3_codec_pr_read(csc, mix->reg);
326 1.1 jmcneill shift = 8 - fls32(__SHIFTOUT_MASK(mix->mask));
327 1.1 jmcneill nvol = __SHIFTOUT(val, mix->mask) << shift;
328 1.1 jmcneill mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = nvol;
329 1.1 jmcneill mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = nvol;
330 1.1 jmcneill return 0;
331 1.1 jmcneill
332 1.1 jmcneill case H3_CODEC_RECORD_SOURCE:
333 1.1 jmcneill mc->un.mask =
334 1.1 jmcneill h3_codec_pr_read(csc, H3_LADCMIXSC) |
335 1.1 jmcneill h3_codec_pr_read(csc, H3_RADCMIXSC);
336 1.1 jmcneill return 0;
337 1.1 jmcneill }
338 1.1 jmcneill
339 1.1 jmcneill return ENXIO;
340 1.1 jmcneill }
341 1.1 jmcneill
342 1.1 jmcneill static int
343 1.1 jmcneill h3_codec_query_devinfo(struct sunxi_codec_softc *sc, mixer_devinfo_t *di)
344 1.1 jmcneill {
345 1.1 jmcneill const struct h3_codec_mixer *mix;
346 1.1 jmcneill
347 1.1 jmcneill switch (di->index) {
348 1.1 jmcneill case H3_CODEC_OUTPUT_CLASS:
349 1.1 jmcneill di->mixer_class = di->index;
350 1.1 jmcneill strcpy(di->label.name, AudioCoutputs);
351 1.1 jmcneill di->type = AUDIO_MIXER_CLASS;
352 1.1 jmcneill di->next = di->prev = AUDIO_MIXER_LAST;
353 1.1 jmcneill return 0;
354 1.1 jmcneill
355 1.1 jmcneill case H3_CODEC_INPUT_CLASS:
356 1.1 jmcneill di->mixer_class = di->index;
357 1.1 jmcneill strcpy(di->label.name, AudioCinputs);
358 1.1 jmcneill di->type = AUDIO_MIXER_CLASS;
359 1.1 jmcneill di->next = di->prev = AUDIO_MIXER_LAST;
360 1.1 jmcneill return 0;
361 1.1 jmcneill
362 1.1 jmcneill case H3_CODEC_RECORD_CLASS:
363 1.1 jmcneill di->mixer_class = di->index;
364 1.1 jmcneill strcpy(di->label.name, AudioCrecord);
365 1.1 jmcneill di->type = AUDIO_MIXER_CLASS;
366 1.1 jmcneill di->next = di->prev = AUDIO_MIXER_LAST;
367 1.1 jmcneill return 0;
368 1.1 jmcneill
369 1.1 jmcneill case H3_CODEC_OUTPUT_MASTER_VOLUME:
370 1.1 jmcneill case H3_CODEC_INPUT_DAC_VOLUME:
371 1.1 jmcneill case H3_CODEC_INPUT_LINEIN_VOLUME:
372 1.1 jmcneill case H3_CODEC_INPUT_MIC1_VOLUME:
373 1.1 jmcneill case H3_CODEC_INPUT_MIC2_VOLUME:
374 1.1 jmcneill case H3_CODEC_RECORD_AGC_VOLUME:
375 1.1 jmcneill mix = &h3_codec_mixers[di->index];
376 1.1 jmcneill di->mixer_class = mix->mixer_class;
377 1.1 jmcneill strcpy(di->label.name, mix->name);
378 1.1 jmcneill di->un.v.delta =
379 1.1 jmcneill 256 / (__SHIFTOUT_MASK(mix->mask) + 1);
380 1.1 jmcneill di->type = AUDIO_MIXER_VALUE;
381 1.1 jmcneill di->next = di->prev = AUDIO_MIXER_LAST;
382 1.1 jmcneill di->un.v.num_channels = 2;
383 1.1 jmcneill strcpy(di->un.v.units.name, AudioNvolume);
384 1.1 jmcneill return 0;
385 1.1 jmcneill
386 1.1 jmcneill case H3_CODEC_RECORD_SOURCE:
387 1.1 jmcneill di->mixer_class = H3_CODEC_RECORD_CLASS;
388 1.1 jmcneill strcpy(di->label.name, AudioNsource);
389 1.1 jmcneill di->type = AUDIO_MIXER_SET;
390 1.1 jmcneill di->next = di->prev = AUDIO_MIXER_LAST;
391 1.1 jmcneill di->un.s.num_mem = 4;
392 1.1 jmcneill strcpy(di->un.s.member[0].label.name, AudioNline);
393 1.1 jmcneill di->un.s.member[0].mask = H3_ADCMIXSC_LINEIN;
394 1.1 jmcneill strcpy(di->un.s.member[1].label.name, "mic1");
395 1.1 jmcneill di->un.s.member[1].mask = H3_ADCMIXSC_MIC1;
396 1.1 jmcneill strcpy(di->un.s.member[2].label.name, "mic2");
397 1.1 jmcneill di->un.s.member[2].mask = H3_ADCMIXSC_MIC2;
398 1.1 jmcneill strcpy(di->un.s.member[3].label.name, AudioNdac);
399 1.1 jmcneill di->un.s.member[3].mask = H3_ADCMIXSC_OMIXER;
400 1.1 jmcneill return 0;
401 1.1 jmcneill
402 1.1 jmcneill }
403 1.1 jmcneill
404 1.1 jmcneill return ENXIO;
405 1.1 jmcneill }
406 1.1 jmcneill
407 1.1 jmcneill const struct sunxi_codec_conf sun8i_h3_codecconf = {
408 1.1 jmcneill .name = "H3 Audio Codec",
409 1.1 jmcneill
410 1.1 jmcneill .init = h3_codec_init,
411 1.1 jmcneill .mute = h3_codec_mute,
412 1.1 jmcneill .set_port = h3_codec_set_port,
413 1.1 jmcneill .get_port = h3_codec_get_port,
414 1.1 jmcneill .query_devinfo = h3_codec_query_devinfo,
415 1.1 jmcneill
416 1.1 jmcneill .DPC = 0x00,
417 1.1 jmcneill .DAC_FIFOC = 0x04,
418 1.1 jmcneill .DAC_FIFOS = 0x08,
419 1.1 jmcneill .DAC_TXDATA = 0x20,
420 1.1 jmcneill .ADC_FIFOC = 0x10,
421 1.1 jmcneill .ADC_FIFOS = 0x14,
422 1.1 jmcneill .ADC_RXDATA = 0x18,
423 1.1 jmcneill .DAC_CNT = 0x40,
424 1.1 jmcneill .ADC_CNT = 0x44,
425 1.1 jmcneill };
426 1.1 jmcneill
427 1.1 jmcneill /*
428 1.1 jmcneill * Device glue, only here to claim resources on behalf of the sunxi_codec driver.
429 1.1 jmcneill */
430 1.1 jmcneill
431 1.1 jmcneill static const char * compatible[] = {
432 1.1 jmcneill "allwinner,sun8i-h3-codec-analog",
433 1.1 jmcneill NULL
434 1.1 jmcneill };
435 1.1 jmcneill
436 1.1 jmcneill static int
437 1.1 jmcneill h3_codec_match(device_t parent, cfdata_t cf, void *aux)
438 1.1 jmcneill {
439 1.1 jmcneill struct fdt_attach_args * const faa = aux;
440 1.1 jmcneill
441 1.1 jmcneill return of_match_compatible(faa->faa_phandle, compatible);
442 1.1 jmcneill }
443 1.1 jmcneill
444 1.1 jmcneill static void
445 1.1 jmcneill h3_codec_attach(device_t parent, device_t self, void *aux)
446 1.1 jmcneill {
447 1.1 jmcneill struct h3_codec_softc * const sc = device_private(self);
448 1.1 jmcneill struct fdt_attach_args * const faa = aux;
449 1.1 jmcneill const int phandle = faa->faa_phandle;
450 1.1 jmcneill bus_addr_t addr;
451 1.1 jmcneill bus_size_t size;
452 1.1 jmcneill
453 1.1 jmcneill sc->sc_dev = self;
454 1.1 jmcneill if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
455 1.1 jmcneill aprint_error(": couldn't get registers\n");
456 1.1 jmcneill return;
457 1.1 jmcneill }
458 1.1 jmcneill sc->sc_bst = faa->faa_bst;
459 1.1 jmcneill if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
460 1.1 jmcneill aprint_error(": couldn't map registers\n");
461 1.1 jmcneill return;
462 1.1 jmcneill }
463 1.1 jmcneill
464 1.1 jmcneill sc->sc_phandle = phandle;
465 1.1 jmcneill
466 1.1 jmcneill aprint_naive("\n");
467 1.1 jmcneill aprint_normal(": H3 Audio Codec (analog part)\n");
468 1.1 jmcneill }
469 1.1 jmcneill
470 1.1 jmcneill CFATTACH_DECL_NEW(h3_codec, sizeof(struct h3_codec_softc),
471 1.1 jmcneill h3_codec_match, h3_codec_attach, NULL, NULL);
472