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sun8i_v3s_gpio.c revision 1.1
      1  1.1  skrll /* $NetBSD: sun8i_v3s_gpio.c,v 1.1 2022/06/28 05:19:03 skrll Exp $ */
      2  1.1  skrll 
      3  1.1  skrll /*-
      4  1.1  skrll  * Copyright (c) 2021 Rui-Xiang Guo
      5  1.1  skrll  * All rights reserved.
      6  1.1  skrll  *
      7  1.1  skrll  * Redistribution and use in source and binary forms, with or without
      8  1.1  skrll  * modification, are permitted provided that the following conditions
      9  1.1  skrll  * are met:
     10  1.1  skrll  * 1. Redistributions of source code must retain the above copyright
     11  1.1  skrll  *    notice, this list of conditions and the following disclaimer.
     12  1.1  skrll  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  skrll  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  skrll  *    documentation and/or other materials provided with the distribution.
     15  1.1  skrll  *
     16  1.1  skrll  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     17  1.1  skrll  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     18  1.1  skrll  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     19  1.1  skrll  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     20  1.1  skrll  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21  1.1  skrll  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     22  1.1  skrll  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23  1.1  skrll  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     24  1.1  skrll  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  1.1  skrll  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  1.1  skrll  * SUCH DAMAGE.
     27  1.1  skrll  *
     28  1.1  skrll  */
     29  1.1  skrll 
     30  1.1  skrll #include <sys/cdefs.h>
     31  1.1  skrll __KERNEL_RCSID(0, "$NetBSD: sun8i_v3s_gpio.c,v 1.1 2022/06/28 05:19:03 skrll Exp $");
     32  1.1  skrll 
     33  1.1  skrll #include <sys/param.h>
     34  1.1  skrll #include <sys/systm.h>
     35  1.1  skrll #include <sys/kernel.h>
     36  1.1  skrll #include <sys/types.h>
     37  1.1  skrll 
     38  1.1  skrll #include <arm/sunxi/sunxi_gpio.h>
     39  1.1  skrll 
     40  1.1  skrll static const struct sunxi_gpio_pins v3s_pins[] = {
     41  1.1  skrll 	{"PB0",  1, 0,  {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 0},
     42  1.1  skrll 	{"PB1",  1, 1,  {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 1},
     43  1.1  skrll 	{"PB2",  1, 2,  {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 2},
     44  1.1  skrll 	{"PB3",  1, 3,  {"gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "irq", NULL}, 6, 3},
     45  1.1  skrll 	{"PB4",  1, 4,  {"gpio_in", "gpio_out", "pwm0", NULL, NULL, NULL, "irq", NULL}, 6, 4},
     46  1.1  skrll 	{"PB5",  1, 5,  {"gpio_in", "gpio_out", "pwm1", NULL, NULL, NULL, "irq", NULL}, 6, 5},
     47  1.1  skrll 	{"PB6",  1, 6,  {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "irq", NULL}, 6, 6},
     48  1.1  skrll 	{"PB7",  1, 7,  {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "irq", NULL}, 6, 7},
     49  1.1  skrll 	{"PB8",  1, 8,  {"gpio_in", "gpio_out", "i2c1", "uart0", NULL, NULL, "irq", NULL}, 6, 8},
     50  1.1  skrll 	{"PB9",  1, 9,  {"gpio_in", "gpio_out", "i2c1", "uart0", NULL, NULL, "irq", NULL}, 6, 9},
     51  1.1  skrll 
     52  1.1  skrll 	{"PC0",  2, 0,  {"gpio_in", "gpio_out", "mmc2", "spi0", NULL, NULL, NULL, NULL}},
     53  1.1  skrll 	{"PC1",  2, 1,  {"gpio_in", "gpio_out", "mmc2", "spi0", NULL, NULL, NULL, NULL}},
     54  1.1  skrll 	{"PC2",  2, 2,  {"gpio_in", "gpio_out", "mmc2", "spi0", NULL, NULL, NULL, NULL}},
     55  1.1  skrll 	{"PC3",  2, 3,  {"gpio_in", "gpio_out", "mmc2", "spi0", NULL, NULL, NULL, NULL}},
     56  1.1  skrll 
     57  1.1  skrll 	{"PE0",  4, 0,  {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     58  1.1  skrll 	{"PE1",  4, 1,  {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     59  1.1  skrll 	{"PE2",  4, 2,  {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     60  1.1  skrll 	{"PE3",  4, 3,  {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     61  1.1  skrll 	{"PE4",  4, 4,  {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     62  1.1  skrll 	{"PE5",  4, 5,  {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     63  1.1  skrll 	{"PE6",  4, 6,  {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     64  1.1  skrll 	{"PE7",  4, 7,  {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     65  1.1  skrll 	{"PE8",  4, 8,  {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     66  1.1  skrll 	{"PE9",  4, 9,  {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     67  1.1  skrll 	{"PE10", 4, 10, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     68  1.1  skrll 	{"PE11", 4, 11, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     69  1.1  skrll 	{"PE12", 4, 12, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     70  1.1  skrll 	{"PE13", 4, 13, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     71  1.1  skrll 	{"PE14", 4, 14, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     72  1.1  skrll 	{"PE15", 4, 15, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     73  1.1  skrll 	{"PE16", 4, 16, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     74  1.1  skrll 	{"PE17", 4, 17, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     75  1.1  skrll 	{"PE18", 4, 18, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     76  1.1  skrll 	{"PE19", 4, 19, {"gpio_in", "gpio_out", "csi", "lcd", NULL, NULL, NULL, NULL}},
     77  1.1  skrll 	{"PE20", 4, 20, {"gpio_in", "gpio_out", "csi", "csi_mipi", NULL, NULL, NULL, NULL}},
     78  1.1  skrll 	{"PE21", 4, 21, {"gpio_in", "gpio_out", "csi", "i2c1", "uart1", NULL, NULL, NULL}},
     79  1.1  skrll 	{"PE22", 4, 22, {"gpio_in", "gpio_out", "csi", "i2c1", "uart1", NULL, NULL, NULL}},
     80  1.1  skrll 	{"PE23", 4, 23, {"gpio_in", "gpio_out", "lcd", "uart1", NULL, NULL, NULL, NULL}},
     81  1.1  skrll 	{"PE24", 4, 24, {"gpio_in", "gpio_out", "lcd", "uart1", NULL, NULL, NULL, NULL}},
     82  1.1  skrll 
     83  1.1  skrll 	{"PF0",  5, 0,  {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}},
     84  1.1  skrll 	{"PF1",  5, 1,  {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}},
     85  1.1  skrll 	{"PF2",  5, 2,  {"gpio_in", "gpio_out", "mmc0", "uart0", NULL, NULL, NULL, NULL}},
     86  1.1  skrll 	{"PF3",  5, 3,  {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}},
     87  1.1  skrll 	{"PF4",  5, 4,  {"gpio_in", "gpio_out", "mmc0", "uart0", NULL, NULL, NULL, NULL}},
     88  1.1  skrll 	{"PF5",  5, 5,  {"gpio_in", "gpio_out", "mmc0", "jtag", NULL, NULL, NULL, NULL}},
     89  1.1  skrll 	{"PF6",  5, 6,  {"gpio_in", "gpio_out", NULL, NULL, NULL, NULL, NULL, NULL}},
     90  1.1  skrll 
     91  1.1  skrll 	{"PG0",  6, 0,  {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 0},
     92  1.1  skrll 	{"PG1",  6, 1,  {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 1},
     93  1.1  skrll 	{"PG2",  6, 2,  {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 2},
     94  1.1  skrll 	{"PG3",  6, 3,  {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 3},
     95  1.1  skrll 	{"PG4",  6, 4,  {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 4},
     96  1.1  skrll 	{"PG5",  6, 5,  {"gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "irq", NULL}, 6, 5},
     97  1.1  skrll };
     98  1.1  skrll 
     99  1.1  skrll const struct sunxi_gpio_padconf sun8i_v3s_padconf = {
    100  1.1  skrll 	.npins = __arraycount(v3s_pins),
    101  1.1  skrll 	.pins = v3s_pins,
    102  1.1  skrll };
    103