sun9i_a80_gpio.c revision 1.1 1 1.1 jmcneill /* $NetBSD: sun9i_a80_gpio.c,v 1.1 2017/10/08 18:00:36 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill *
28 1.1 jmcneill * $FreeBSD$
29 1.1 jmcneill */
30 1.1 jmcneill
31 1.1 jmcneill #include <sys/cdefs.h>
32 1.1 jmcneill __KERNEL_RCSID(0, "$NetBSD: sun9i_a80_gpio.c,v 1.1 2017/10/08 18:00:36 jmcneill Exp $");
33 1.1 jmcneill
34 1.1 jmcneill #include <sys/param.h>
35 1.1 jmcneill #include <sys/systm.h>
36 1.1 jmcneill #include <sys/kernel.h>
37 1.1 jmcneill #include <sys/types.h>
38 1.1 jmcneill
39 1.1 jmcneill #include <arm/sunxi/sunxi_gpio.h>
40 1.1 jmcneill
41 1.1 jmcneill static const struct sunxi_gpio_pins a80_pins[] = {
42 1.1 jmcneill { "PA0", 0, 0, { "gpio_in", "gpio_out", "gmac", NULL, "uart1", NULL, "eint" }, 6, 0, 0 },
43 1.1 jmcneill { "PA1", 0, 1, { "gpio_in", "gpio_out", "gmac", NULL, "uart1", NULL, "eint" }, 6, 1, 0 },
44 1.1 jmcneill { "PA2", 0, 2, { "gpio_in", "gpio_out", "gmac", NULL, "uart1", NULL, "eint" }, 6, 2, 0 },
45 1.1 jmcneill { "PA3", 0, 3, { "gpio_in", "gpio_out", "gmac", NULL, "uart1", NULL, "eint" }, 6, 3, 0 },
46 1.1 jmcneill { "PA4", 0, 4, { "gpio_in", "gpio_out", "gmac", NULL, "uart1", NULL, "eint" }, 6, 4, 0 },
47 1.1 jmcneill { "PA5", 0, 5, { "gpio_in", "gpio_out", "gmac", NULL, "uart1", NULL, "eint" }, 6, 5, 0 },
48 1.1 jmcneill { "PA6", 0, 6, { "gpio_in", "gpio_out", "gmac", NULL, "uart1", NULL, "eint" }, 6, 6, 0 },
49 1.1 jmcneill { "PA7", 0, 7, { "gpio_in", "gpio_out", "gmac", NULL, "uart1", NULL, "eint" }, 6, 7, 0 },
50 1.1 jmcneill { "PA8", 0, 8, { "gpio_in", "gpio_out", "gmac", NULL, "eclk", NULL, "eint" }, 6, 8, 0 },
51 1.1 jmcneill { "PA9", 0, 9, { "gpio_in", "gpio_out", "gmac", NULL, "eclk", NULL, "eint" }, 6, 9, 0 },
52 1.1 jmcneill { "PA10", 0, 10, { "gpio_in", "gpio_out", "gmac", NULL, "clk_out_a", NULL, "eint" }, 6, 10, 0 },
53 1.1 jmcneill { "PA11", 0, 11, { "gpio_in", "gpio_out", "gmac", NULL, "clk_out_b", NULL, "eint" }, 6, 11, 0 },
54 1.1 jmcneill { "PA12", 0, 12, { "gpio_in", "gpio_out", "gmac", NULL, "pwm3", NULL, "eint" }, 6, 12, 0 },
55 1.1 jmcneill { "PA13", 0, 13, { "gpio_in", "gpio_out", "gmac", NULL, "pwm3", NULL, "eint" }, 6, 13, 0 },
56 1.1 jmcneill { "PA14", 0, 14, { "gpio_in", "gpio_out", "gmac", NULL, "spi1", NULL, "eint" }, 6, 14, 0 },
57 1.1 jmcneill { "PA15", 0, 15, { "gpio_in", "gpio_out", "gmac", NULL, "spi1", NULL, "eint" }, 6, 15, 0 },
58 1.1 jmcneill { "PA16", 0, 16, { "gpio_in", "gpio_out", "gmac", NULL, "spi1", NULL, "eint" }, 6, 16, 0 },
59 1.1 jmcneill { "PA17", 0, 17, { "gpio_in", "gpio_out", "gmac", NULL, "spi1", NULL, "eint" }, 6, 17, 0 },
60 1.1 jmcneill
61 1.1 jmcneill { "PB5", 1, 5, { "gpio_in", "gpio_out", NULL, "uart3", NULL, NULL, "eint" }, 6, 5, 1 },
62 1.1 jmcneill { "PB6", 1, 6, { "gpio_in", "gpio_out", NULL, "uart3", NULL, NULL, "eint" }, 6, 6, 1 },
63 1.1 jmcneill { "PB14", 1, 14, { "gpio_in", "gpio_out", NULL, "mcsi", NULL, NULL, "eint" }, 6, 14, 1 },
64 1.1 jmcneill { "PB15", 1, 15, { "gpio_in", "gpio_out", NULL, "mcsi", "i2c4", NULL, "eint" }, 6, 15, 1 },
65 1.1 jmcneill { "PB16", 1, 16, { "gpio_in", "gpio_out", NULL, "mcsi", "i2c4", NULL, "eint" }, 6, 16, 1 },
66 1.1 jmcneill
67 1.1 jmcneill { "PC0", 2, 0, { "gpio_in", "gpio_out", "nand0", "spi0" } },
68 1.1 jmcneill { "PC1", 2, 1, { "gpio_in", "gpio_out", "nand0", "spi0" } },
69 1.1 jmcneill { "PC2", 2, 2, { "gpio_in", "gpio_out", "nand0", "spi0" } },
70 1.1 jmcneill { "PC3", 2, 3, { "gpio_in", "gpio_out", "nand0" } },
71 1.1 jmcneill { "PC4", 2, 4, { "gpio_in", "gpio_out", "nand0" } },
72 1.1 jmcneill { "PC5", 2, 5, { "gpio_in", "gpio_out", "nand0" } },
73 1.1 jmcneill { "PC6", 2, 6, { "gpio_in", "gpio_out", "nand0", "mmc2" } },
74 1.1 jmcneill { "PC7", 2, 7, { "gpio_in", "gpio_out", "nand0", "mmc2" } },
75 1.1 jmcneill { "PC8", 2, 8, { "gpio_in", "gpio_out", "nand0", "mmc2" } },
76 1.1 jmcneill { "PC9", 2, 9, { "gpio_in", "gpio_out", "nand0", "mmc2" } },
77 1.1 jmcneill { "PC10", 2, 10, { "gpio_in", "gpio_out", "nand0", "mmc2" } },
78 1.1 jmcneill { "PC11", 2, 11, { "gpio_in", "gpio_out", "nand0", "mmc2" } },
79 1.1 jmcneill { "PC12", 2, 12, { "gpio_in", "gpio_out", "nand0", "mmc2" } },
80 1.1 jmcneill { "PC13", 2, 13, { "gpio_in", "gpio_out", "nand0", "mmc2" } },
81 1.1 jmcneill { "PC14", 2, 14, { "gpio_in", "gpio_out", "nand0", "mmc2" } },
82 1.1 jmcneill { "PC15", 2, 15, { "gpio_in", "gpio_out", "nand0", "mmc2" } },
83 1.1 jmcneill { "PC16", 2, 16, { "gpio_in", "gpio_out", "nand0", "mmc2" } },
84 1.1 jmcneill { "PC17", 2, 17, { "gpio_in", "gpio_out", "nand0", "nand0_b" } },
85 1.1 jmcneill { "PC18", 2, 18, { "gpio_in", "gpio_out", "nand0", "nand0_b" } },
86 1.1 jmcneill { "PC19", 2, 19, { "gpio_in", "gpio_out", NULL, "spi0" } },
87 1.1 jmcneill
88 1.1 jmcneill { "PD0", 3, 0, { "gpio_in", "gpio_out", "lcd0", "lvds0" } },
89 1.1 jmcneill { "PD1", 3, 1, { "gpio_in", "gpio_out", "lcd0", "lvds0" } },
90 1.1 jmcneill { "PD2", 3, 2, { "gpio_in", "gpio_out", "lcd0", "lvds0" } },
91 1.1 jmcneill { "PD3", 3, 3, { "gpio_in", "gpio_out", "lcd0", "lvds0" } },
92 1.1 jmcneill { "PD4", 3, 4, { "gpio_in", "gpio_out", "lcd0", "lvds0" } },
93 1.1 jmcneill { "PD5", 3, 5, { "gpio_in", "gpio_out", "lcd0", "lvds0" } },
94 1.1 jmcneill { "PD6", 3, 6, { "gpio_in", "gpio_out", "lcd0", "lvds0" } },
95 1.1 jmcneill { "PD7", 3, 7, { "gpio_in", "gpio_out", "lcd0", "lvds0" } },
96 1.1 jmcneill { "PD8", 3, 8, { "gpio_in", "gpio_out", "lcd0", "lvds0" } },
97 1.1 jmcneill { "PD9", 3, 9, { "gpio_in", "gpio_out", "lcd0", "lvds0" } },
98 1.1 jmcneill { "PD10", 3, 10, { "gpio_in", "gpio_out", "lcd0", "lvds1" } },
99 1.1 jmcneill { "PD11", 3, 11, { "gpio_in", "gpio_out", "lcd0", "lvds1" } },
100 1.1 jmcneill { "PD12", 3, 12, { "gpio_in", "gpio_out", "lcd0", "lvds1" } },
101 1.1 jmcneill { "PD13", 3, 13, { "gpio_in", "gpio_out", "lcd0", "lvds1" } },
102 1.1 jmcneill { "PD14", 3, 14, { "gpio_in", "gpio_out", "lcd0", "lvds1" } },
103 1.1 jmcneill { "PD15", 3, 15, { "gpio_in", "gpio_out", "lcd0", "lvds1" } },
104 1.1 jmcneill { "PD16", 3, 16, { "gpio_in", "gpio_out", "lcd0", "lvds1" } },
105 1.1 jmcneill { "PD17", 3, 17, { "gpio_in", "gpio_out", "lcd0", "lvds1" } },
106 1.1 jmcneill { "PD18", 3, 18, { "gpio_in", "gpio_out", "lcd0", "lvds1" } },
107 1.1 jmcneill { "PD19", 3, 19, { "gpio_in", "gpio_out", "lcd0", "lvds1" } },
108 1.1 jmcneill { "PD20", 3, 20, { "gpio_in", "gpio_out", "lcd0" } },
109 1.1 jmcneill { "PD21", 3, 21, { "gpio_in", "gpio_out", "lcd0" } },
110 1.1 jmcneill { "PD22", 3, 22, { "gpio_in", "gpio_out", "lcd0" } },
111 1.1 jmcneill { "PD23", 3, 23, { "gpio_in", "gpio_out", "lcd0" } },
112 1.1 jmcneill { "PD24", 3, 24, { "gpio_in", "gpio_out", "lcd0" } },
113 1.1 jmcneill { "PD25", 3, 25, { "gpio_in", "gpio_out", "lcd0" } },
114 1.1 jmcneill { "PD26", 3, 26, { "gpio_in", "gpio_out", "lcd0" } },
115 1.1 jmcneill { "PD27", 3, 27, { "gpio_in", "gpio_out", "lcd0" } },
116 1.1 jmcneill
117 1.1 jmcneill { "PE0", 4, 0, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 0, 2 },
118 1.1 jmcneill { "PE1", 4, 1, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 1, 2 },
119 1.1 jmcneill { "PE2", 4, 2, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 2, 2 },
120 1.1 jmcneill { "PE3", 4, 3, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 3, 2 },
121 1.1 jmcneill { "PE4", 4, 4, { "gpio_in", "gpio_out", "csi", "spi2", "uart5", NULL, "eint" }, 6, 4, 2 },
122 1.1 jmcneill { "PE5", 4, 5, { "gpio_in", "gpio_out", "csi", "spi2", "uart5", NULL, "eint" }, 6, 5, 2 },
123 1.1 jmcneill { "PE6", 4, 6, { "gpio_in", "gpio_out", "csi", "spi2", "uart5", NULL, "eint" }, 6, 6, 2 },
124 1.1 jmcneill { "PE7", 4, 7, { "gpio_in", "gpio_out", "csi", "spi2", "uart5", NULL, "eint" }, 6, 7, 2 },
125 1.1 jmcneill { "PE8", 4, 8, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 8, 2 },
126 1.1 jmcneill { "PE9", 4, 9, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 9, 2 },
127 1.1 jmcneill { "PE10", 4, 10, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 10, 2 },
128 1.1 jmcneill { "PE11", 4, 11, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 11, 2 },
129 1.1 jmcneill { "PE12", 4, 12, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 12, 2 },
130 1.1 jmcneill { "PE13", 4, 13, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 13, 2 },
131 1.1 jmcneill { "PE14", 4, 14, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 14, 2 },
132 1.1 jmcneill { "PE15", 4, 15, { "gpio_in", "gpio_out", "csi", "ts", NULL, NULL, "eint" }, 6, 15, 2 },
133 1.1 jmcneill { "PE16", 4, 16, { "gpio_in", "gpio_out", "csi", "i2c4", NULL, NULL, "eint" }, 6, 16, 2 },
134 1.1 jmcneill { "PE17", 4, 17, { "gpio_in", "gpio_out", "csi", "i2c4", NULL, NULL, "eint" }, 6, 17, 2 },
135 1.1 jmcneill
136 1.1 jmcneill { "PF0", 5, 0, { "gpio_in", "gpio_out", "mmc0" } },
137 1.1 jmcneill { "PF1", 5, 1, { "gpio_in", "gpio_out", "mmc0" } },
138 1.1 jmcneill { "PF2", 5, 2, { "gpio_in", "gpio_out", "mmc0", "uart0" } },
139 1.1 jmcneill { "PF3", 5, 3, { "gpio_in", "gpio_out", "mmc0" } },
140 1.1 jmcneill { "PF4", 5, 4, { "gpio_in", "gpio_out", "mmc0", "uart0" } },
141 1.1 jmcneill { "PF5", 5, 5, { "gpio_in", "gpio_out", "mmc0" } },
142 1.1 jmcneill
143 1.1 jmcneill { "PG0", 6, 0, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" }, 6, 0, 3 },
144 1.1 jmcneill { "PG1", 6, 1, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" }, 6, 1, 3 },
145 1.1 jmcneill { "PG2", 6, 2, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" }, 6, 2, 3 },
146 1.1 jmcneill { "PG3", 6, 3, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" }, 6, 3, 3 },
147 1.1 jmcneill { "PG4", 6, 4, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" }, 6, 4, 3 },
148 1.1 jmcneill { "PG5", 6, 5, { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "eint" }, 6, 5, 3 },
149 1.1 jmcneill { "PG6", 6, 6, { "gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "eint" }, 6, 6, 3 },
150 1.1 jmcneill { "PG7", 6, 7, { "gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "eint" }, 6, 7, 3 },
151 1.1 jmcneill { "PG8", 6, 8, { "gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "eint" }, 6, 8, 3 },
152 1.1 jmcneill { "PG9", 6, 9, { "gpio_in", "gpio_out", "uart2", NULL, NULL, NULL, "eint" }, 6, 9, 3 },
153 1.1 jmcneill { "PG10", 6, 10, { "gpio_in", "gpio_out", "i2c3", NULL, NULL, NULL, "eint" }, 6, 10, 3 },
154 1.1 jmcneill { "PG11", 6, 11, { "gpio_in", "gpio_out", "i2c3", NULL, NULL, NULL, "eint" }, 6, 11, 3 },
155 1.1 jmcneill { "PG12", 6, 12, { "gpio_in", "gpio_out", "uart4", NULL, NULL, NULL, "eint" }, 6, 12, 3 },
156 1.1 jmcneill { "PG13", 6, 13, { "gpio_in", "gpio_out", "uart4", NULL, NULL, NULL, "eint" }, 6, 13, 3 },
157 1.1 jmcneill { "PG14", 6, 14, { "gpio_in", "gpio_out", "uart4", NULL, NULL, NULL, "eint" }, 6, 14, 3 },
158 1.1 jmcneill { "PG15", 6, 15, { "gpio_in", "gpio_out", "uart4", NULL, NULL, NULL, "eint" }, 6, 15, 3 },
159 1.1 jmcneill
160 1.1 jmcneill { "PH0", 7, 0, { "gpio_in", "gpio_out", "i2c0" } },
161 1.1 jmcneill { "PH1", 7, 1, { "gpio_in", "gpio_out", "i2c0" } },
162 1.1 jmcneill { "PH2", 7, 2, { "gpio_in", "gpio_out", "i2c1" } },
163 1.1 jmcneill { "PH3", 7, 3, { "gpio_in", "gpio_out", "i2c1" } },
164 1.1 jmcneill { "PH4", 7, 4, { "gpio_in", "gpio_out", "i2c2" } },
165 1.1 jmcneill { "PH5", 7, 5, { "gpio_in", "gpio_out", "i2c2" } },
166 1.1 jmcneill { "PH6", 7, 6, { "gpio_in", "gpio_out", "pwm0" } },
167 1.1 jmcneill { "PH8", 7, 8, { "gpio_in", "gpio_out", NULL, "pwm1", NULL, NULL, "eint" }, 6, 8, 4 },
168 1.1 jmcneill { "PH9", 7, 9, { "gpio_in", "gpio_out", NULL, "pwm1", NULL, NULL, "eint" }, 6, 9, 4 },
169 1.1 jmcneill { "PH10", 7, 10, { "gpio_in", "gpio_out", NULL, "pwm2", NULL, NULL, "eint" }, 6, 10, 4 },
170 1.1 jmcneill { "PH11", 7, 11, { "gpio_in", "gpio_out", NULL, "pwm2", NULL, NULL, "eint" }, 6, 11, 4 },
171 1.1 jmcneill { "PH12", 7, 12, { "gpio_in", "gpio_out", "uart0", "spi3", NULL, NULL, "eint" }, 6, 12, 4 },
172 1.1 jmcneill { "PH13", 7, 13, { "gpio_in", "gpio_out", "uart0", "spi3", NULL, NULL, "eint" }, 6, 13, 4 },
173 1.1 jmcneill { "PH14", 7, 14, { "gpio_in", "gpio_out", "spi3", NULL, NULL, NULL, "eint" }, 6, 14, 4 },
174 1.1 jmcneill { "PH15", 7, 15, { "gpio_in", "gpio_out", "spi3", NULL, NULL, NULL, "eint" }, 6, 15, 4 },
175 1.1 jmcneill { "PH16", 7, 16, { "gpio_in", "gpio_out", "spi3", NULL, NULL, NULL, "eint" }, 6, 16, 4 },
176 1.1 jmcneill { "PH17", 7, 17, { "gpio_in", "gpio_out", "spi3", NULL, NULL, NULL, "eint" }, 6, 17, 4 },
177 1.1 jmcneill { "PH18", 7, 18, { "gpio_in", "gpio_out", "spi3", NULL, NULL, NULL, "eint" }, 6, 18, 4 },
178 1.1 jmcneill { "PH19", 7, 19, { "gpio_in", "gpio_out", "hdmi" } },
179 1.1 jmcneill { "PH20", 7, 20, { "gpio_in", "gpio_out", "hdmi" } },
180 1.1 jmcneill { "PH21", 7, 21, { "gpio_in", "gpio_out", "hdmi" } },
181 1.1 jmcneill };
182 1.1 jmcneill
183 1.1 jmcneill static const struct sunxi_gpio_pins a80_r_pins[] = {
184 1.1 jmcneill { "PL0", 0, 0, { "gpio_in", "gpio_out", NULL, "s_uart", NULL, NULL, "eint" }, 6, 0, 0 },
185 1.1 jmcneill { "PL1", 0, 1, { "gpio_in", "gpio_out", NULL, "s_uart", NULL, NULL, "eint" }, 6, 1, 0 },
186 1.1 jmcneill { "PL2", 0, 2, { "gpio_in", "gpio_out", NULL, "s_jtag", NULL, NULL, "eint" }, 6, 2, 0 },
187 1.1 jmcneill { "PL3", 0, 3, { "gpio_in", "gpio_out", NULL, "s_jtag", NULL, NULL, "eint" }, 6, 3, 0 },
188 1.1 jmcneill { "PL4", 0, 4, { "gpio_in", "gpio_out", NULL, "s_jtag", NULL, NULL, "eint" }, 6, 4, 0 },
189 1.1 jmcneill { "PL5", 0, 5, { "gpio_in", "gpio_out", NULL, "s_jtag", NULL, NULL, "eint" }, 6, 5, 0 },
190 1.1 jmcneill { "PL6", 0, 6, { "gpio_in", "gpio_out", NULL, "s_cir_rx", NULL, NULL, "eint" }, 6, 6, 0 },
191 1.1 jmcneill { "PL7", 0, 7, { "gpio_in", "gpio_out", NULL, "1wire", NULL, NULL, "eint" }, 6, 7, 0 },
192 1.1 jmcneill { "PL8", 0, 8, { "gpio_in", "gpio_out", "s_ps2", NULL, NULL, NULL, "eint" }, 6, 8, 0 },
193 1.1 jmcneill { "PL9", 0, 9, { "gpio_in", "gpio_out", "s_ps2", NULL, NULL, NULL, "eint" }, 6, 9, 0 },
194 1.1 jmcneill
195 1.1 jmcneill { "PM0", 1, 0, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "eint" }, 6, 0, 1 },
196 1.1 jmcneill { "PM1", 1, 1, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "eint" }, 6, 1, 1 },
197 1.1 jmcneill { "PM2", 1, 2, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "eint" }, 6, 2, 1 },
198 1.1 jmcneill { "PM3", 1, 3, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "eint" }, 6, 3, 1 },
199 1.1 jmcneill { "PM4", 1, 4, { "gpio_in", "gpio_out", NULL, "s_i2s1", NULL, NULL, "eint" }, 6, 4, 1 },
200 1.1 jmcneill { "PM8", 1, 8, { "gpio_in", "gpio_out", NULL, "s_i2c1", NULL, NULL, "eint" }, 6, 8, 1 },
201 1.1 jmcneill { "PM9", 1, 9, { "gpio_in", "gpio_out", NULL, "s_i2c1", NULL, NULL, "eint" }, 6, 9, 1 },
202 1.1 jmcneill { "PM10", 1, 10, { "gpio_in", "gpio_out", "s_i2s0", "s_i2s1" } },
203 1.1 jmcneill { "PM11", 1, 11, { "gpio_in", "gpio_out", "s_i2s0", "s_i2s1" } },
204 1.1 jmcneill { "PM12", 1, 12, { "gpio_in", "gpio_out", "s_i2s0", "s_i2s1" } },
205 1.1 jmcneill { "PM13", 1, 13, { "gpio_in", "gpio_out", "s_i2s0", "s_i2s1" } },
206 1.1 jmcneill { "PM14", 1, 14, { "gpio_in", "gpio_out", "s_i2s0", "s_i2s1" } },
207 1.1 jmcneill { "PM15", 1, 15, { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "eint" }, 6, 15, 1 },
208 1.1 jmcneill
209 1.1 jmcneill { "PN0", 2, 0, { "gpio_in", "gpio_out", "s_i2c0", "s_rsb" } },
210 1.1 jmcneill { "PN1", 2, 1, { "gpio_in", "gpio_out", "s_i2c0", "s_rsb" } },
211 1.1 jmcneill };
212 1.1 jmcneill
213 1.1 jmcneill const struct sunxi_gpio_padconf sun9i_a80_padconf = {
214 1.1 jmcneill .npins = __arraycount(a80_pins),
215 1.1 jmcneill .pins = a80_pins,
216 1.1 jmcneill };
217 1.1 jmcneill
218 1.1 jmcneill const struct sunxi_gpio_padconf sun9i_a80_r_padconf = {
219 1.1 jmcneill .npins = __arraycount(a80_r_pins),
220 1.1 jmcneill .pins = a80_r_pins,
221 1.1 jmcneill };
222