sunxi_can.c revision 1.5
1 /* $NetBSD: sunxi_can.c,v 1.5 2021/01/18 02:35:49 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2017,2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Manuel Bouyer. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 33 #include "locators.h" 34 #include "opt_can.h" 35 36 37 #include <sys/cdefs.h> 38 39 __KERNEL_RCSID(1, "$NetBSD: sunxi_can.c,v 1.5 2021/01/18 02:35:49 thorpej Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/bus.h> 43 #include <sys/device.h> 44 #include <sys/intr.h> 45 #include <sys/ioctl.h> 46 #include <sys/mutex.h> 47 #include <sys/rndsource.h> 48 #include <sys/mbuf.h> 49 #include <sys/systm.h> 50 51 #include <net/if.h> 52 #include <net/if_types.h> 53 #include <net/bpf.h> 54 55 #ifdef CAN 56 #include <netcan/can.h> 57 #include <netcan/can_var.h> 58 #endif 59 60 #include <dev/fdt/fdtvar.h> 61 62 #include <arm/sunxi/sunxi_can.h> 63 64 /* shortcut for all error interrupts */ 65 #define SUNXI_CAN_INT_ALLERRS (\ 66 SUNXI_CAN_INT_BERR | \ 67 SUNXI_CAN_INT_ARB_LOST | \ 68 SUNXI_CAN_INT_ERR_PASSIVE | \ 69 SUNXI_CAN_INT_DATA_OR | \ 70 SUNXI_CAN_INT_ERR \ 71 ) 72 73 struct sunxi_can_softc { 74 struct canif_softc sc_cansc; 75 bus_space_tag_t sc_bst; 76 bus_space_handle_t sc_bsh; 77 kmutex_t sc_intr_lock; 78 void *sc_ih; 79 struct ifnet *sc_ifp; 80 krndsource_t sc_rnd_source; /* random source */ 81 struct mbuf *sc_m_transmit; /* mbuf being transmitted */ 82 }; 83 #define sc_dev sc_cansc.csc_dev 84 #define sc_timecaps sc_cansc.csc_timecaps 85 #define sc_timings sc_cansc.csc_timings 86 #define sc_linkmodes sc_cansc.csc_linkmodes 87 88 static const struct device_compatible_entry compat_data[] = { 89 { .compat = "allwinner,sun4i-a10-can" }, 90 91 { 0 } 92 }; 93 94 static int sunxi_can_match(device_t, cfdata_t, void *); 95 static void sunxi_can_attach(device_t, device_t, void *); 96 97 static int sunxi_can_intr(void *); 98 99 static void sunxi_can_ifstart(struct ifnet *); 100 static int sunxi_can_ifioctl(struct ifnet *, u_long, void *); 101 static void sunxi_can_ifwatchdog(struct ifnet *); 102 103 static void sunxi_can_enter_reset(struct sunxi_can_softc *); 104 static void sunxi_can_exit_reset(struct sunxi_can_softc *); 105 106 CFATTACH_DECL_NEW(sunxi_can, sizeof(struct sunxi_can_softc), 107 sunxi_can_match, sunxi_can_attach, NULL, NULL); 108 109 static inline uint32_t 110 sunxi_can_read(struct sunxi_can_softc *sc, bus_size_t o) 111 { 112 return bus_space_read_4(sc->sc_bst, sc->sc_bsh, o); 113 } 114 115 static inline void 116 sunxi_can_write(struct sunxi_can_softc *sc, bus_size_t o, uint32_t v) 117 { 118 return bus_space_write_4(sc->sc_bst, sc->sc_bsh, o, v); 119 } 120 121 static int 122 sunxi_can_match(device_t parent, cfdata_t cf, void *aux) 123 { 124 struct fdt_attach_args * const faa = aux; 125 126 return of_match_compat_data(faa->faa_phandle, compat_data); 127 } 128 129 static void 130 sunxi_can_attach(device_t parent, device_t self, void *aux) 131 { 132 struct sunxi_can_softc * const sc = device_private(self); 133 struct fdt_attach_args * const faa = aux; 134 struct ifnet *ifp; 135 const int phandle = faa->faa_phandle; 136 bus_addr_t addr; 137 bus_size_t size; 138 char intrstr[128]; 139 struct clk *clk; 140 struct fdtbus_reset *rst; 141 142 sc->sc_dev = self; 143 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_NET); 144 145 sc->sc_bst = faa->faa_bst; 146 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 147 aprint_error(": couldn't get registers\n"); 148 return; 149 } 150 151 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 152 aprint_error(": couldn't map registers\n"); 153 return; 154 } 155 156 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 157 aprint_error(": failed to decode interrupt\n"); 158 return; 159 } 160 161 if ((clk = fdtbus_clock_get_index(phandle, 0)) != NULL) { 162 if (clk_enable(clk) != 0) { 163 aprint_error(": couldn't enable clock\n"); 164 return; 165 } 166 } 167 168 if ((rst = fdtbus_reset_get_index(phandle, 0)) != NULL) { 169 if (fdtbus_reset_deassert(rst) != 0) { 170 aprint_error(": couldn't de-assert reset\n"); 171 return; 172 } 173 } 174 175 sc->sc_timecaps.cltc_prop_min = 0; 176 sc->sc_timecaps.cltc_prop_max = 0; 177 sc->sc_timecaps.cltc_ps1_min = 1; 178 sc->sc_timecaps.cltc_ps1_max = 16; 179 sc->sc_timecaps.cltc_ps2_min = 1; 180 sc->sc_timecaps.cltc_ps2_max = 8; 181 sc->sc_timecaps.cltc_sjw_max = 4; 182 sc->sc_timecaps.cltc_brp_min = 1; 183 sc->sc_timecaps.cltc_brp_max = 64; 184 sc->sc_timecaps.cltc_brp_inc = 1; 185 sc->sc_timecaps.cltc_clock_freq = clk_get_rate(clk); 186 sc->sc_timecaps.cltc_linkmode_caps = 187 CAN_LINKMODE_3SAMPLES | CAN_LINKMODE_LISTENONLY | 188 CAN_LINKMODE_LOOPBACK; 189 can_ifinit_timings(&sc->sc_cansc); 190 sc->sc_timings.clt_prop = 0; 191 sc->sc_timings.clt_sjw = 1; 192 193 aprint_naive("\n"); 194 aprint_normal(": CAN bus controller\n"); 195 aprint_debug_dev(self, ": clock freq %d\n", 196 sc->sc_timecaps.cltc_clock_freq); 197 198 sunxi_can_enter_reset(sc); 199 /* 200 * Disable and then clear all interrupts 201 */ 202 sunxi_can_write(sc, SUNXI_CAN_INTE_REG, 0); 203 sunxi_can_write(sc, SUNXI_CAN_INT_REG, 204 sunxi_can_read(sc, SUNXI_CAN_INT_REG)); 205 206 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_NET, 0, 207 sunxi_can_intr, sc, device_xname(self)); 208 if (sc->sc_ih == NULL) { 209 aprint_error_dev(self, "failed to establish interrupt on %s\n", 210 intrstr); 211 return; 212 } 213 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 214 215 ifp = if_alloc(IFT_OTHER); 216 sc->sc_ifp = ifp; 217 strlcpy(ifp->if_xname, device_xname(self), IFNAMSIZ); 218 ifp->if_softc = sc; 219 ifp->if_capabilities = 0; 220 ifp->if_flags = 0; 221 ifp->if_start = sunxi_can_ifstart; 222 ifp->if_ioctl = sunxi_can_ifioctl; 223 ifp->if_watchdog = sunxi_can_ifwatchdog; 224 225 /* 226 * Attach the interface. 227 */ 228 can_ifattach(ifp); 229 if_deferred_start_init(ifp, NULL); 230 bpf_mtap_softint_init(ifp); 231 rnd_attach_source(&sc->sc_rnd_source, device_xname(self), 232 RND_TYPE_NET, RND_FLAG_DEFAULT); 233 #ifdef MBUFTRACE 234 ifp->if_mowner = malloc(sizeof(struct mowner), M_DEVBUF, 235 M_WAITOK | M_ZERO); 236 strlcpy(ifp->if_mowner->mo_name, ifp->if_xname, 237 sizeof(ifp->if_mowner->mo_name)); 238 MOWNER_ATTACH(ifp->if_mowner); 239 #endif 240 } 241 242 static void 243 sunxi_can_rx_intr(struct sunxi_can_softc *sc) 244 { 245 uint32_t reg0v; 246 struct mbuf *m; 247 struct ifnet *ifp = sc->sc_ifp; 248 struct can_frame *cf; 249 int dlc; 250 int regd, i; 251 252 KASSERT(mutex_owned(&sc->sc_intr_lock)); 253 reg0v = sunxi_can_read(sc, SUNXI_CAN_TXBUF0_REG); 254 dlc = reg0v & SUNXI_CAN_TXBUF0_DL; 255 256 if (dlc > CAN_MAX_DLC) { 257 if_statinc(ifp, if_ierrors); 258 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_REL_RX_BUF); 259 return; 260 } 261 262 m = m_gethdr(M_NOWAIT, MT_HEADER); 263 if (m == NULL) { 264 if_statinc(ifp, if_ierrors); 265 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_REL_RX_BUF); 266 return; 267 } 268 cf = mtod(m, struct can_frame *); 269 memset(cf, 0, sizeof(struct can_frame)); 270 271 cf->can_dlc = dlc; 272 273 if (reg0v & SUNXI_CAN_TXBUF0_EFF) { 274 cf->can_id = 275 (sunxi_can_read(sc, SUNXI_CAN_TXBUF1_REG) << 21) | 276 (sunxi_can_read(sc, SUNXI_CAN_TXBUF2_REG) << 13) | 277 (sunxi_can_read(sc, SUNXI_CAN_TXBUF3_REG) << 5) | 278 ((sunxi_can_read(sc, SUNXI_CAN_TXBUF4_REG) >> 3) & 0x1f); 279 cf->can_id |= CAN_EFF_FLAG; 280 regd = SUNXI_CAN_TXBUF5_REG; 281 } else { 282 cf->can_id = 283 (sunxi_can_read(sc, SUNXI_CAN_TXBUF1_REG) << 3) | 284 ((sunxi_can_read(sc, SUNXI_CAN_TXBUF2_REG) << 5) & 0x7); 285 regd = SUNXI_CAN_TXBUF3_REG; 286 } 287 if (reg0v & SUNXI_CAN_TXBUF0_RTR) { 288 cf->can_id |= CAN_RTR_FLAG; 289 } else { 290 for (i = 0; i < cf->can_dlc; i++) { 291 cf->data[i] = sunxi_can_read(sc, regd + i * 4); 292 } 293 } 294 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_REL_RX_BUF); 295 m->m_len = m->m_pkthdr.len = CAN_MTU; 296 if_statadd(ifp, if_ibytes, m->m_len); 297 m_set_rcvif(m, ifp); 298 can_bpf_mtap(ifp, m, 1); 299 can_input(ifp, m); 300 } 301 302 static void 303 sunxi_can_tx_intr(struct sunxi_can_softc *sc) 304 { 305 struct ifnet * const ifp = sc->sc_ifp; 306 struct mbuf *m; 307 308 KASSERT(mutex_owned(&sc->sc_intr_lock)); 309 if ((m = sc->sc_m_transmit) != NULL) { 310 if_statadd2(ifp, if_obytes, m->m_len, if_opackets, 1); 311 can_mbuf_tag_clean(m); 312 m_set_rcvif(m, ifp); 313 can_input(ifp, m); /* loopback */ 314 sc->sc_m_transmit = NULL; 315 ifp->if_timer = 0; 316 } 317 ifp->if_flags &= ~IFF_OACTIVE; 318 if_schedule_deferred_start(ifp); 319 } 320 321 static int 322 sunxi_can_tx_abort(struct sunxi_can_softc *sc) 323 { 324 KASSERT(mutex_owned(&sc->sc_intr_lock)); 325 if (sc->sc_m_transmit) { 326 m_freem(sc->sc_m_transmit); 327 sc->sc_m_transmit = NULL; 328 sc->sc_ifp->if_timer = 0; 329 /* 330 * the transmit abort will trigger a TX interrupt 331 * which will restart the queue or cleae OACTIVE, 332 * as appropriate 333 */ 334 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_ABT_REQ); 335 return 1; 336 } 337 return 0; 338 } 339 340 static void 341 sunxi_can_err_intr(struct sunxi_can_softc *sc, uint32_t irq, uint32_t sts) 342 { 343 struct ifnet * const ifp = sc->sc_ifp; 344 KASSERT(mutex_owned(&sc->sc_intr_lock)); 345 int txerr = 0; 346 uint32_t reg; 347 348 if (irq & SUNXI_CAN_INT_DATA_OR) { 349 if_statinc(ifp, if_ierrors); 350 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_CLR_OR); 351 } 352 if (irq & SUNXI_CAN_INT_ERR) { 353 reg = sunxi_can_read(sc, SUNXI_CAN_REC_REG); 354 printf("%s: ERR interrupt status 0x%x counters 0x%x\n", 355 device_xname(sc->sc_dev), sts, reg); 356 357 } 358 if (irq & SUNXI_CAN_INT_BERR) { 359 if (sts & SUNXI_CAN_STA_TX) 360 txerr++; 361 if (sts & SUNXI_CAN_STA_RX) 362 if_statinc(ifp, if_ierrors); 363 } 364 if (irq & SUNXI_CAN_INT_ERR_PASSIVE) { 365 printf("%s: PASSV interrupt status 0x%x\n", 366 device_xname(sc->sc_dev), sts); 367 } 368 if (irq & SUNXI_CAN_INT_ARB_LOST) { 369 txerr++; 370 } 371 if (txerr) { 372 if_statadd(ifp, if_oerrors, txerr); 373 (void) sunxi_can_tx_abort(sc); 374 } 375 } 376 377 int 378 sunxi_can_intr(void *arg) 379 { 380 struct sunxi_can_softc * const sc = arg; 381 int rv = 0; 382 int irq; 383 384 mutex_enter(&sc->sc_intr_lock); 385 386 while ((irq = sunxi_can_read(sc, SUNXI_CAN_INT_REG)) != 0) { 387 uint32_t sts = sunxi_can_read(sc, SUNXI_CAN_STA_REG); 388 rv = 1; 389 390 if (irq & SUNXI_CAN_INT_TX_FLAG) { 391 sunxi_can_tx_intr(sc); 392 } 393 if (irq & SUNXI_CAN_INT_RX_FLAG) { 394 while (sts & SUNXI_CAN_STA_RX_RDY) { 395 sunxi_can_rx_intr(sc); 396 sts = sunxi_can_read(sc, SUNXI_CAN_STA_REG); 397 } 398 } 399 if (irq & SUNXI_CAN_INT_ALLERRS) { 400 sunxi_can_err_intr(sc, irq, sts); 401 } 402 sunxi_can_write(sc, SUNXI_CAN_INT_REG, irq); 403 rnd_add_uint32(&sc->sc_rnd_source, irq); 404 405 } 406 mutex_exit(&sc->sc_intr_lock); 407 408 return rv; 409 } 410 411 void 412 sunxi_can_ifstart(struct ifnet *ifp) 413 { 414 struct sunxi_can_softc * const sc = ifp->if_softc; 415 struct mbuf *m; 416 struct can_frame *cf; 417 int regd; 418 uint32_t reg0val; 419 int i; 420 421 mutex_enter(&sc->sc_intr_lock); 422 if (ifp->if_flags & IFF_OACTIVE) 423 goto out; 424 425 IF_DEQUEUE(&ifp->if_snd, m); 426 427 if (m == NULL) 428 goto out; 429 430 MCLAIM(m, ifp->if_mowner); 431 sc->sc_m_transmit = m; 432 433 KASSERT((m->m_flags & M_PKTHDR) != 0); 434 KASSERT(m->m_len == m->m_pkthdr.len); 435 436 cf = mtod(m, struct can_frame *); 437 reg0val = cf->can_dlc & SUNXI_CAN_TXBUF0_DL; 438 if (cf->can_id & CAN_RTR_FLAG) 439 reg0val |= SUNXI_CAN_TXBUF0_RTR; 440 441 if (cf->can_id & CAN_EFF_FLAG) { 442 reg0val |= SUNXI_CAN_TXBUF0_EFF; 443 sunxi_can_write(sc, SUNXI_CAN_TXBUF1_REG, 444 (cf->can_id >> 21) & 0xff); 445 sunxi_can_write(sc, SUNXI_CAN_TXBUF2_REG, 446 (cf->can_id >> 13) & 0xff); 447 sunxi_can_write(sc, SUNXI_CAN_TXBUF3_REG, 448 (cf->can_id >> 5) & 0xff); 449 sunxi_can_write(sc, SUNXI_CAN_TXBUF4_REG, 450 (cf->can_id << 3) & 0xf8); 451 regd = SUNXI_CAN_TXBUF5_REG; 452 } else { 453 sunxi_can_write(sc, SUNXI_CAN_TXBUF1_REG, 454 (cf->can_id >> 3) & 0xff); 455 sunxi_can_write(sc, SUNXI_CAN_TXBUF2_REG, 456 (cf->can_id << 5) & 0xe0); 457 regd = SUNXI_CAN_TXBUF3_REG; 458 } 459 460 for (i = 0; i < cf->can_dlc; i++) { 461 sunxi_can_write(sc, regd + i * 4, cf->data[i]); 462 } 463 sunxi_can_write(sc, SUNXI_CAN_TXBUF0_REG, reg0val); 464 465 if (sc->sc_linkmodes & CAN_LINKMODE_LOOPBACK) { 466 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, 467 SUNXI_CAN_CMD_TANS_REQ | SUNXI_CAN_CMD_SELF_REQ); 468 } else { 469 sunxi_can_write(sc, SUNXI_CAN_CMD_REG, SUNXI_CAN_CMD_TANS_REQ); 470 } 471 ifp->if_flags |= IFF_OACTIVE; 472 ifp->if_timer = 5; 473 can_bpf_mtap(ifp, m, 0); 474 out: 475 mutex_exit(&sc->sc_intr_lock); 476 } 477 478 static int 479 sunxi_can_ifup(struct sunxi_can_softc * const sc) 480 { 481 uint32_t reg; 482 483 /* setup timings and mode - has to be done in reset */ 484 reg = SUNXI_CAN_MODSEL_RST; 485 if (sc->sc_linkmodes & CAN_LINKMODE_LISTENONLY) 486 reg |= SUNXI_CAN_MODSEL_LST_ONLY; 487 488 if (sc->sc_linkmodes & CAN_LINKMODE_LOOPBACK) 489 reg |= SUNXI_CAN_MODSEL_LB_MOD; 490 491 sunxi_can_write(sc, SUNXI_CAN_MODSEL_REG, reg); 492 493 reg = 0; 494 if (sc->sc_timings.clt_prop != 0) 495 return EINVAL; 496 497 if (sc->sc_timings.clt_brp > sc->sc_timecaps.cltc_brp_max || 498 sc->sc_timings.clt_brp < sc->sc_timecaps.cltc_brp_min) 499 return EINVAL; 500 reg |= (sc->sc_timings.clt_brp - 1) << 0; 501 502 if (sc->sc_timings.clt_ps1 > sc->sc_timecaps.cltc_ps1_max || 503 sc->sc_timings.clt_ps1 < sc->sc_timecaps.cltc_ps1_min) 504 return EINVAL; 505 reg |= (sc->sc_timings.clt_ps1 - 1) << 16; 506 507 if (sc->sc_timings.clt_ps2 > sc->sc_timecaps.cltc_ps2_max || 508 sc->sc_timings.clt_ps2 < sc->sc_timecaps.cltc_ps2_min) 509 return EINVAL; 510 reg |= (sc->sc_timings.clt_ps2 - 1) << 20; 511 512 if (sc->sc_timings.clt_sjw > sc->sc_timecaps.cltc_sjw_max || 513 sc->sc_timings.clt_sjw < 1) 514 return EINVAL; 515 reg |= (sc->sc_timings.clt_sjw - 1) << 14; 516 517 if (sc->sc_linkmodes & CAN_LINKMODE_3SAMPLES) 518 reg |= SUNXI_CAN_BUS_TIME_SAM; 519 520 sunxi_can_write(sc, SUNXI_CAN_BUS_TIME_REG, reg); 521 522 /* set filters to accept all frames */ 523 sunxi_can_write(sc, SUNXI_CAN_ACPC, 0x00000000); 524 sunxi_can_write(sc, SUNXI_CAN_ACPM, 0xffffffff); 525 526 /* clear errors counter */ 527 sunxi_can_write(sc, SUNXI_CAN_REC_REG, 0); 528 529 /* leave reset mode and enable interrupts */ 530 sunxi_can_exit_reset(sc); 531 sunxi_can_write(sc, SUNXI_CAN_INTE_REG, 532 SUNXI_CAN_INT_TX_FLAG | SUNXI_CAN_INT_RX_FLAG | SUNXI_CAN_INT_ALLERRS); 533 sc->sc_ifp->if_flags |= IFF_RUNNING; 534 return 0; 535 } 536 537 static void 538 sunxi_can_ifdown(struct sunxi_can_softc * const sc) 539 { 540 sc->sc_ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 541 sc->sc_ifp->if_timer = 0; 542 sunxi_can_enter_reset(sc); 543 sunxi_can_write(sc, SUNXI_CAN_INTE_REG, 0); 544 sunxi_can_write(sc, SUNXI_CAN_INT_REG, 545 sunxi_can_read(sc, SUNXI_CAN_INT_REG)); 546 } 547 548 static int 549 sunxi_can_ifioctl(struct ifnet *ifp, u_long cmd, void *data) 550 { 551 struct sunxi_can_softc * const sc = ifp->if_softc; 552 struct ifreq *ifr = (struct ifreq *)data; 553 int error = 0; 554 555 mutex_enter(&sc->sc_intr_lock); 556 557 switch (cmd) { 558 case SIOCINITIFADDR: 559 error = EAFNOSUPPORT; 560 break; 561 case SIOCSIFMTU: 562 if ((unsigned)ifr->ifr_mtu != sizeof(struct can_frame)) 563 error = EINVAL; 564 break; 565 case SIOCADDMULTI: 566 case SIOCDELMULTI: 567 error = EAFNOSUPPORT; 568 break; 569 default: 570 error = ifioctl_common(ifp, cmd, data); 571 if (error == 0) { 572 if ((ifp->if_flags & IFF_UP) != 0 && 573 (ifp->if_flags & IFF_RUNNING) == 0) { 574 error = sunxi_can_ifup(sc); 575 if (error) { 576 ifp->if_flags &= ~IFF_UP; 577 } 578 } else if ((ifp->if_flags & IFF_UP) == 0 && 579 (ifp->if_flags & IFF_RUNNING) != 0) { 580 sunxi_can_ifdown(sc); 581 } 582 } 583 break; 584 } 585 586 mutex_exit(&sc->sc_intr_lock); 587 return error; 588 } 589 590 void 591 sunxi_can_ifwatchdog(struct ifnet *ifp) 592 { 593 struct sunxi_can_softc * const sc = ifp->if_softc; 594 printf("%s: watchdog timeout\n", device_xname(sc->sc_dev)); 595 596 mutex_enter(&sc->sc_intr_lock); 597 printf("irq 0x%x en 0x%x mode 0x%x status 0x%x timings 0x%x err 0x%x\n", 598 sunxi_can_read(sc, SUNXI_CAN_INT_REG), 599 sunxi_can_read(sc, SUNXI_CAN_INTE_REG), 600 sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG), 601 sunxi_can_read(sc, SUNXI_CAN_STA_REG), 602 sunxi_can_read(sc, SUNXI_CAN_BUS_TIME_REG), 603 sunxi_can_read(sc, SUNXI_CAN_REC_REG)); 604 /* if there is a transmit in progress abort */ 605 if (sunxi_can_tx_abort(sc)) { 606 if_statinc(ifp, if_oerrors); 607 } 608 mutex_exit(&sc->sc_intr_lock); 609 } 610 611 static void 612 sunxi_can_enter_reset(struct sunxi_can_softc *sc) 613 { 614 int i; 615 uint32_t val; 616 617 for (i = 0; i < 1000; i++) { 618 val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG); 619 val |= SUNXI_CAN_MODSEL_RST; 620 sunxi_can_write(sc, SUNXI_CAN_MODSEL_REG, val); 621 val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG); 622 if (val & SUNXI_CAN_MODSEL_RST) 623 return; 624 } 625 printf("%s: couldn't enter reset mode\n", device_xname(sc->sc_dev)); 626 } 627 628 static void 629 sunxi_can_exit_reset(struct sunxi_can_softc *sc) 630 { 631 int i; 632 uint32_t val; 633 634 for (i = 0; i < 1000; i++) { 635 val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG); 636 val &= ~SUNXI_CAN_MODSEL_RST; 637 sunxi_can_write(sc, SUNXI_CAN_MODSEL_REG, val); 638 val = sunxi_can_read(sc, SUNXI_CAN_MODSEL_REG); 639 if ((val & SUNXI_CAN_MODSEL_RST) == 0) 640 return; 641 } 642 printf("%s: couldn't leave reset mode\n", device_xname(sc->sc_dev)); 643 } 644
Indexes created Thu Oct 02 10:09:58 GMT 2025